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19 #ifndef AVCODEC_AARCH64_CABAC_H
20 #define AVCODEC_AARCH64_CABAC_H
29 #define get_cabac_inline get_cabac_inline_aarch64
34 void *reg_a, *reg_b, *reg_c, *
tmp;
37 "ldrb %w[bit] , [%[state]] \n\t"
38 "add %[r_b] , %[tables] , %[lps_off] \n\t"
39 "mov %w[tmp] , %w[range] \n\t"
40 "and %w[range] , %w[range] , #0xC0 \n\t"
41 "lsl %w[r_c] , %w[range] , #1 \n\t"
42 "add %[r_b] , %[r_b] , %w[bit], UXTW \n\t"
43 "ldrb %w[range] , [%[r_b], %w[r_c], SXTW] \n\t"
44 "sub %w[r_c] , %w[tmp] , %w[range] \n\t"
45 "lsl %w[tmp] , %w[r_c] , #17 \n\t"
46 "cmp %w[tmp] , %w[low] \n\t"
47 "csel %w[tmp] , %w[tmp] , wzr , cc \n\t"
48 "csel %w[range] , %w[r_c] , %w[range], gt \n\t"
49 "cinv %w[bit] , %w[bit] , cc \n\t"
50 "sub %w[low] , %w[low] , %w[tmp] \n\t"
51 "add %[r_b] , %[tables] , %[norm_off] \n\t"
52 "add %[r_a] , %[tables] , %[mlps_off] \n\t"
53 "ldrb %w[tmp] , [%[r_b], %w[range], SXTW] \n\t"
54 "ldrb %w[r_a] , [%[r_a], %w[bit], SXTW] \n\t"
55 "lsl %w[low] , %w[low] , %w[tmp] \n\t"
56 "lsl %w[range] , %w[range] , %w[tmp] \n\t"
57 "uxth %w[r_c] , %w[low] \n\t"
58 "strb %w[r_a] , [%[state]] \n\t"
59 "cbnz %w[r_c] , 2f \n\t"
60 "ldr %[r_c] , [%[c], %[byte]] \n\t"
61 "ldr %[r_a] , [%[c], %[end]] \n\t"
62 "ldrh %w[tmp] , [%[r_c]] \n\t"
63 "cmp %[r_c] , %[r_a] \n\t"
65 "add %[r_a] , %[r_c] , #2 \n\t"
66 "str %[r_a] , [%[c], %[byte]] \n\t"
68 "sub %w[r_c] , %w[low] , #1 \n\t"
69 "eor %w[r_c] , %w[r_c] , %w[low] \n\t"
70 "rev %w[tmp] , %w[tmp] \n\t"
71 "lsr %w[r_c] , %w[r_c] , #15 \n\t"
72 "lsr %w[tmp] , %w[tmp] , #15 \n\t"
73 "ldrb %w[r_c] , [%[r_b], %w[r_c], SXTW] \n\t"
74 "mov %w[r_b] , #0xFFFF \n\t"
75 "mov %w[r_a] , #7 \n\t"
76 "sub %w[tmp] , %w[tmp] , %w[r_b] \n\t"
77 "sub %w[r_c] , %w[r_a] , %w[r_c] \n\t"
78 "lsl %w[tmp] , %w[tmp] , %w[r_c] \n\t"
79 "add %w[low] , %w[low] , %w[tmp] \n\t"
#define bit(string, value)
Writing a table generator This documentation is preliminary Parts of the API are not good and should be changed Basic concepts A table generator consists of two *_tablegen c and *_tablegen h The h file will provide the variable declarations and initialization code for the tables
const uint8_t ff_h264_cabac_tables[512+4 *2 *64+4 *64+63]
Undefined Behavior In the C some operations are like signed integer dereferencing freed accessing outside allocated Undefined Behavior must not occur in a C it is not safe even if the output of undefined operations is unused The unsafety may seem nit picking but Optimizing compilers have in fact optimized code on the assumption that no undefined Behavior occurs Optimizing code based on wrong assumptions can and has in some cases lead to effects beyond the output of computations The signed integer overflow problem in speed critical code Code which is highly optimized and works with signed integers sometimes has the problem that often the output of the computation does not c
uint64_t_TMPL AV_WL64 unsigned int_TMPL AV_WL32 unsigned int_TMPL AV_WL24 unsigned int_TMPL AV_WL16 uint64_t_TMPL AV_WB64 unsigned int_TMPL AV_WB32 unsigned int_TMPL AV_WB24 unsigned int_TMPL AV_WB16 unsigned int_TMPL byte
#define H264_LPS_RANGE_OFFSET
#define H264_NORM_SHIFT_OFFSET
__asm__(".macro parse_r var r\n\t" "\\var = -1\n\t" _IFC_REG(0) _IFC_REG(1) _IFC_REG(2) _IFC_REG(3) _IFC_REG(4) _IFC_REG(5) _IFC_REG(6) _IFC_REG(7) _IFC_REG(8) _IFC_REG(9) _IFC_REG(10) _IFC_REG(11) _IFC_REG(12) _IFC_REG(13) _IFC_REG(14) _IFC_REG(15) _IFC_REG(16) _IFC_REG(17) _IFC_REG(18) _IFC_REG(19) _IFC_REG(20) _IFC_REG(21) _IFC_REG(22) _IFC_REG(23) _IFC_REG(24) _IFC_REG(25) _IFC_REG(26) _IFC_REG(27) _IFC_REG(28) _IFC_REG(29) _IFC_REG(30) _IFC_REG(31) ".iflt \\var\n\t" ".error \"Unable to parse register name \\r\"\n\t" ".endif\n\t" ".endm")
#define H264_MLPS_STATE_OFFSET