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cpu.c
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1 /*
2  * This file is part of FFmpeg.
3  *
4  * FFmpeg is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU Lesser General Public
6  * License as published by the Free Software Foundation; either
7  * version 2.1 of the License, or (at your option) any later version.
8  *
9  * FFmpeg is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12  * Lesser General Public License for more details.
13  *
14  * You should have received a copy of the GNU Lesser General Public
15  * License along with FFmpeg; if not, write to the Free Software
16  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
17  */
18 
19 #include <stdint.h>
20 #include <stdatomic.h>
21 
22 #include "cpu.h"
23 #include "cpu_internal.h"
24 #include "config.h"
25 #include "opt.h"
26 #include "common.h"
27 
28 #if HAVE_SCHED_GETAFFINITY
29 #ifndef _GNU_SOURCE
30 # define _GNU_SOURCE
31 #endif
32 #include <sched.h>
33 #endif
34 #if HAVE_GETPROCESSAFFINITYMASK || HAVE_WINRT
35 #include <windows.h>
36 #endif
37 #if HAVE_SYSCTL
38 #if HAVE_SYS_PARAM_H
39 #include <sys/param.h>
40 #endif
41 #include <sys/types.h>
42 #include <sys/sysctl.h>
43 #endif
44 #if HAVE_UNISTD_H
45 #include <unistd.h>
46 #endif
47 
48 static atomic_int cpu_flags = ATOMIC_VAR_INIT(-1);
49 
50 static int get_cpu_flags(void)
51 {
52  if (ARCH_AARCH64)
53  return ff_get_cpu_flags_aarch64();
54  if (ARCH_ARM)
55  return ff_get_cpu_flags_arm();
56  if (ARCH_PPC)
57  return ff_get_cpu_flags_ppc();
58  if (ARCH_X86)
59  return ff_get_cpu_flags_x86();
60  return 0;
61 }
62 
63 void av_force_cpu_flags(int arg){
64  if ( (arg & ( AV_CPU_FLAG_3DNOW |
65  AV_CPU_FLAG_3DNOWEXT |
66  AV_CPU_FLAG_MMXEXT |
67  AV_CPU_FLAG_SSE |
68  AV_CPU_FLAG_SSE2 |
69  AV_CPU_FLAG_SSE2SLOW |
70  AV_CPU_FLAG_SSE3 |
71  AV_CPU_FLAG_SSE3SLOW |
72  AV_CPU_FLAG_SSSE3 |
73  AV_CPU_FLAG_SSE4 |
74  AV_CPU_FLAG_SSE42 |
75  AV_CPU_FLAG_AVX |
76  AV_CPU_FLAG_AVXSLOW |
77  AV_CPU_FLAG_XOP |
78  AV_CPU_FLAG_FMA3 |
79  AV_CPU_FLAG_FMA4 |
80  AV_CPU_FLAG_AVX2 ))
81  && !(arg & AV_CPU_FLAG_MMX)) {
82  av_log(NULL, AV_LOG_WARNING, "MMX implied by specified flags\n");
83  arg |= AV_CPU_FLAG_MMX;
84  }
85 
86  atomic_store_explicit(&cpu_flags, arg, memory_order_relaxed);
87 }
88 
89 int av_get_cpu_flags(void)
90 {
91  int flags = atomic_load_explicit(&cpu_flags, memory_order_relaxed);
92  if (flags == -1) {
93  flags = get_cpu_flags();
94  atomic_store_explicit(&cpu_flags, flags, memory_order_relaxed);
95  }
96  return flags;
97 }
98 
99 void av_set_cpu_flags_mask(int mask)
100 {
101  atomic_store_explicit(&cpu_flags, get_cpu_flags() & mask,
102  memory_order_relaxed);
103 }
104 
105 int av_parse_cpu_flags(const char *s)
106 {
107 #define CPUFLAG_MMXEXT (AV_CPU_FLAG_MMX | AV_CPU_FLAG_MMXEXT | AV_CPU_FLAG_CMOV)
108 #define CPUFLAG_3DNOW (AV_CPU_FLAG_3DNOW | AV_CPU_FLAG_MMX)
109 #define CPUFLAG_3DNOWEXT (AV_CPU_FLAG_3DNOWEXT | CPUFLAG_3DNOW)
110 #define CPUFLAG_SSE (AV_CPU_FLAG_SSE | CPUFLAG_MMXEXT)
111 #define CPUFLAG_SSE2 (AV_CPU_FLAG_SSE2 | CPUFLAG_SSE)
112 #define CPUFLAG_SSE2SLOW (AV_CPU_FLAG_SSE2SLOW | CPUFLAG_SSE2)
113 #define CPUFLAG_SSE3 (AV_CPU_FLAG_SSE3 | CPUFLAG_SSE2)
114 #define CPUFLAG_SSE3SLOW (AV_CPU_FLAG_SSE3SLOW | CPUFLAG_SSE3)
115 #define CPUFLAG_SSSE3 (AV_CPU_FLAG_SSSE3 | CPUFLAG_SSE3)
116 #define CPUFLAG_SSE4 (AV_CPU_FLAG_SSE4 | CPUFLAG_SSSE3)
117 #define CPUFLAG_SSE42 (AV_CPU_FLAG_SSE42 | CPUFLAG_SSE4)
118 #define CPUFLAG_AVX (AV_CPU_FLAG_AVX | CPUFLAG_SSE42)
119 #define CPUFLAG_AVXSLOW (AV_CPU_FLAG_AVXSLOW | CPUFLAG_AVX)
120 #define CPUFLAG_XOP (AV_CPU_FLAG_XOP | CPUFLAG_AVX)
121 #define CPUFLAG_FMA3 (AV_CPU_FLAG_FMA3 | CPUFLAG_AVX)
122 #define CPUFLAG_FMA4 (AV_CPU_FLAG_FMA4 | CPUFLAG_AVX)
123 #define CPUFLAG_AVX2 (AV_CPU_FLAG_AVX2 | CPUFLAG_AVX)
124 #define CPUFLAG_BMI2 (AV_CPU_FLAG_BMI2 | AV_CPU_FLAG_BMI1)
125 #define CPUFLAG_AESNI (AV_CPU_FLAG_AESNI | CPUFLAG_SSE42)
126  static const AVOption cpuflags_opts[] = {
127  { "flags" , NULL, 0, AV_OPT_TYPE_FLAGS, { .i64 = 0 }, INT64_MIN, INT64_MAX, .unit = "flags" },
128 #if ARCH_PPC
129  { "altivec" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ALTIVEC }, .unit = "flags" },
130 #elif ARCH_X86
131  { "mmx" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_MMX }, .unit = "flags" },
132  { "mmxext" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_MMXEXT }, .unit = "flags" },
133  { "sse" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_SSE }, .unit = "flags" },
134  { "sse2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_SSE2 }, .unit = "flags" },
135  { "sse2slow", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_SSE2SLOW }, .unit = "flags" },
136  { "sse3" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_SSE3 }, .unit = "flags" },
137  { "sse3slow", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_SSE3SLOW }, .unit = "flags" },
138  { "ssse3" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_SSSE3 }, .unit = "flags" },
139  { "atom" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ATOM }, .unit = "flags" },
140  { "sse4.1" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_SSE4 }, .unit = "flags" },
141  { "sse4.2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_SSE42 }, .unit = "flags" },
142  { "avx" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_AVX }, .unit = "flags" },
143  { "avxslow" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_AVXSLOW }, .unit = "flags" },
144  { "xop" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_XOP }, .unit = "flags" },
145  { "fma3" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_FMA3 }, .unit = "flags" },
146  { "fma4" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_FMA4 }, .unit = "flags" },
147  { "avx2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_AVX2 }, .unit = "flags" },
148  { "bmi1" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_BMI1 }, .unit = "flags" },
149  { "bmi2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_BMI2 }, .unit = "flags" },
150  { "3dnow" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_3DNOW }, .unit = "flags" },
151  { "3dnowext", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_3DNOWEXT }, .unit = "flags" },
152  { "cmov", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_CMOV }, .unit = "flags" },
153  { "aesni" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_AESNI }, .unit = "flags" },
154 #elif ARCH_ARM
155  { "armv5te", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV5TE }, .unit = "flags" },
156  { "armv6", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV6 }, .unit = "flags" },
157  { "armv6t2", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV6T2 }, .unit = "flags" },
158  { "vfp", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VFP }, .unit = "flags" },
159  { "vfp_vm", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VFP_VM }, .unit = "flags" },
160  { "vfpv3", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VFPV3 }, .unit = "flags" },
161  { "neon", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_NEON }, .unit = "flags" },
162 #elif ARCH_AARCH64
163  { "armv8", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV8 }, .unit = "flags" },
164  { "neon", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_NEON }, .unit = "flags" },
165  { "vfp", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VFP }, .unit = "flags" },
166 #endif
167  { NULL },
168  };
169  static const AVClass class = {
170  .class_name = "cpuflags",
171  .item_name = av_default_item_name,
172  .option = cpuflags_opts,
173  .version = LIBAVUTIL_VERSION_INT,
174  };
175 
176  int flags = 0, ret;
177  const AVClass *pclass = &class;
178 
179  if ((ret = av_opt_eval_flags(&pclass, &cpuflags_opts[0], s, &flags)) < 0)
180  return ret;
181 
182  return flags & INT_MAX;
183 }
184 
185 int av_parse_cpu_caps(unsigned *flags, const char *s)
186 {
187  static const AVOption cpuflags_opts[] = {
188  { "flags" , NULL, 0, AV_OPT_TYPE_FLAGS, { .i64 = 0 }, INT64_MIN, INT64_MAX, .unit = "flags" },
189 #if ARCH_PPC
190  { "altivec" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ALTIVEC }, .unit = "flags" },
191 #elif ARCH_X86
192  { "mmx" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_MMX }, .unit = "flags" },
193  { "mmx2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_MMX2 }, .unit = "flags" },
194  { "mmxext" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_MMX2 }, .unit = "flags" },
195  { "sse" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE }, .unit = "flags" },
196  { "sse2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE2 }, .unit = "flags" },
197  { "sse2slow", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE2SLOW }, .unit = "flags" },
198  { "sse3" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE3 }, .unit = "flags" },
199  { "sse3slow", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE3SLOW }, .unit = "flags" },
200  { "ssse3" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSSE3 }, .unit = "flags" },
201  { "atom" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ATOM }, .unit = "flags" },
202  { "sse4.1" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE4 }, .unit = "flags" },
203  { "sse4.2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE42 }, .unit = "flags" },
204  { "avx" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AVX }, .unit = "flags" },
205  { "avxslow" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AVXSLOW }, .unit = "flags" },
206  { "xop" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_XOP }, .unit = "flags" },
207  { "fma3" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_FMA3 }, .unit = "flags" },
208  { "fma4" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_FMA4 }, .unit = "flags" },
209  { "avx2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AVX2 }, .unit = "flags" },
210  { "bmi1" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_BMI1 }, .unit = "flags" },
211  { "bmi2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_BMI2 }, .unit = "flags" },
212  { "3dnow" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_3DNOW }, .unit = "flags" },
213  { "3dnowext", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_3DNOWEXT }, .unit = "flags" },
214  { "cmov", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_CMOV }, .unit = "flags" },
215  { "aesni", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AESNI }, .unit = "flags" },
216 
217 #define CPU_FLAG_P2 AV_CPU_FLAG_CMOV | AV_CPU_FLAG_MMX
218 #define CPU_FLAG_P3 CPU_FLAG_P2 | AV_CPU_FLAG_MMX2 | AV_CPU_FLAG_SSE
219 #define CPU_FLAG_P4 CPU_FLAG_P3| AV_CPU_FLAG_SSE2
220  { "pentium2", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_P2 }, .unit = "flags" },
221  { "pentium3", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_P3 }, .unit = "flags" },
222  { "pentium4", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_P4 }, .unit = "flags" },
223 
224 #define CPU_FLAG_K62 AV_CPU_FLAG_MMX | AV_CPU_FLAG_3DNOW
225 #define CPU_FLAG_ATHLON CPU_FLAG_K62 | AV_CPU_FLAG_CMOV | AV_CPU_FLAG_3DNOWEXT | AV_CPU_FLAG_MMX2
226 #define CPU_FLAG_ATHLONXP CPU_FLAG_ATHLON | AV_CPU_FLAG_SSE
227 #define CPU_FLAG_K8 CPU_FLAG_ATHLONXP | AV_CPU_FLAG_SSE2
228  { "k6", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_MMX }, .unit = "flags" },
229  { "k62", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_K62 }, .unit = "flags" },
230  { "athlon", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_ATHLON }, .unit = "flags" },
231  { "athlonxp", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_ATHLONXP }, .unit = "flags" },
232  { "k8", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_K8 }, .unit = "flags" },
233 #elif ARCH_ARM
234  { "armv5te", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV5TE }, .unit = "flags" },
235  { "armv6", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV6 }, .unit = "flags" },
236  { "armv6t2", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV6T2 }, .unit = "flags" },
237  { "vfp", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VFP }, .unit = "flags" },
238  { "vfp_vm", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VFP_VM }, .unit = "flags" },
239  { "vfpv3", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VFPV3 }, .unit = "flags" },
240  { "neon", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_NEON }, .unit = "flags" },
241  { "setend", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SETEND }, .unit = "flags" },
242 #elif ARCH_AARCH64
243  { "armv8", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV8 }, .unit = "flags" },
244  { "neon", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_NEON }, .unit = "flags" },
245  { "vfp", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VFP }, .unit = "flags" },
246 #endif
247  { NULL },
248  };
249  static const AVClass class = {
250  .class_name = "cpuflags",
251  .item_name = av_default_item_name,
252  .option = cpuflags_opts,
253  .version = LIBAVUTIL_VERSION_INT,
254  };
255  const AVClass *pclass = &class;
256 
257  return av_opt_eval_flags(&pclass, &cpuflags_opts[0], s, flags);
258 }
259 
260 int av_cpu_count(void)
261 {
262  static volatile int printed;
263 
264  int nb_cpus = 1;
265 #if HAVE_WINRT
266  SYSTEM_INFO sysinfo;
267 #endif
268 #if HAVE_SCHED_GETAFFINITY && defined(CPU_COUNT)
269  cpu_set_t cpuset;
270 
271  CPU_ZERO(&cpuset);
272 
273  if (!sched_getaffinity(0, sizeof(cpuset), &cpuset))
274  nb_cpus = CPU_COUNT(&cpuset);
275 #elif HAVE_GETPROCESSAFFINITYMASK
276  DWORD_PTR proc_aff, sys_aff;
277  if (GetProcessAffinityMask(GetCurrentProcess(), &proc_aff, &sys_aff))
278  nb_cpus = av_popcount64(proc_aff);
279 #elif HAVE_SYSCTL && defined(HW_NCPU)
280  int mib[2] = { CTL_HW, HW_NCPU };
281  size_t len = sizeof(nb_cpus);
282 
283  if (sysctl(mib, 2, &nb_cpus, &len, NULL, 0) == -1)
284  nb_cpus = 0;
285 #elif HAVE_SYSCONF && defined(_SC_NPROC_ONLN)
286  nb_cpus = sysconf(_SC_NPROC_ONLN);
287 #elif HAVE_SYSCONF && defined(_SC_NPROCESSORS_ONLN)
288  nb_cpus = sysconf(_SC_NPROCESSORS_ONLN);
289 #elif HAVE_WINRT
290  GetNativeSystemInfo(&sysinfo);
291  nb_cpus = sysinfo.dwNumberOfProcessors;
292 #endif
293 
294  if (!printed) {
295  av_log(NULL, AV_LOG_DEBUG, "detected %d logical cores\n", nb_cpus);
296  printed = 1;
297  }
298 
299  return nb_cpus;
300 }
CPUFLAG_3DNOW
#define CPUFLAG_3DNOW
AV_CPU_FLAG_AVX
#define AV_CPU_FLAG_AVX
AVX functions: requires OS support even if YMM registers aren't used.
Definition: cpu.h:47
ATOMIC_VAR_INIT
#define ATOMIC_VAR_INIT(value)
Definition: stdatomic.h:31
NULL
#define NULL
Definition: coverity.c:32
AV_CPU_FLAG_ALTIVEC
#define AV_CPU_FLAG_ALTIVEC
standard
Definition: cpu.h:57
s
const char * s
Definition: avisynth_c.h:768
AVOption
AVOption.
Definition: opt.h:246
av_cpu_count
int av_cpu_count(void)
Definition: cpu.c:260
AV_LOG_WARNING
#define AV_LOG_WARNING
Something somehow does not look correct.
Definition: log.h:182
LIBAVUTIL_VERSION_INT
#define LIBAVUTIL_VERSION_INT
Definition: version.h:85
AV_CPU_FLAG_SSE
#define AV_CPU_FLAG_SSE
SSE functions.
Definition: cpu.h:33
CPUFLAG_SSE3
#define CPUFLAG_SSE3
av_set_cpu_flags_mask
void av_set_cpu_flags_mask(int mask)
Set a mask on flags returned by av_get_cpu_flags().
Definition: cpu.c:99
AV_CPU_FLAG_MMX2
#define AV_CPU_FLAG_MMX2
SSE integer functions or AMD MMX ext.
Definition: cpu.h:31
CPUFLAG_SSE4
#define CPUFLAG_SSE4
AV_CPU_FLAG_CMOV
#define AV_CPU_FLAG_CMOV
supports cmov instruction
Definition: cpu.h:51
AV_CPU_FLAG_VFP
#define AV_CPU_FLAG_VFP
Definition: cpu.h:64
cpu_flags
static atomic_int cpu_flags
Definition: cpu.c:48
atomic_int
intptr_t atomic_int
Definition: stdatomic.h:55
AV_OPT_TYPE_FLAGS
Definition: opt.h:222
CPUFLAG_AESNI
#define CPUFLAG_AESNI
AVClass::class_name
const char * class_name
The name of the class; usually it is the same name as the context structure type to which the AVClass...
Definition: log.h:72
AV_OPT_TYPE_CONST
Definition: opt.h:232
opt.h
AVOptions.
CPUFLAG_SSE3SLOW
#define CPUFLAG_SSE3SLOW
AV_CPU_FLAG_FMA3
#define AV_CPU_FLAG_FMA3
Haswell FMA3 functions.
Definition: cpu.h:53
AV_CPU_FLAG_NEON
#define AV_CPU_FLAG_NEON
Definition: cpu.h:66
AV_CPU_FLAG_MMXEXT
#define AV_CPU_FLAG_MMXEXT
SSE integer functions or AMD MMX ext.
Definition: cpu.h:30
ff_get_cpu_flags_ppc
int ff_get_cpu_flags_ppc(void)
This function MAY rely on signal() or fork() in order to make sure AltiVec is present.
Definition: cpu.c:48
av_parse_cpu_flags
int av_parse_cpu_flags(const char *s)
Parse CPU flags from a string.
Definition: cpu.c:105
AV_CPU_FLAG_ATOM
#define AV_CPU_FLAG_ATOM
Atom processor, some SSSE3 instructions are slower.
Definition: cpu.h:43
flags
static int flags
Definition: log.c:57
AV_CPU_FLAG_AVX2
#define AV_CPU_FLAG_AVX2
AVX2 functions: requires OS support even if YMM registers aren't used.
Definition: cpu.h:52
AV_CPU_FLAG_SSE2SLOW
#define AV_CPU_FLAG_SSE2SLOW
SSE2 supported, but usually not faster.
Definition: cpu.h:35
AV_CPU_FLAG_XOP
#define AV_CPU_FLAG_XOP
Bulldozer XOP functions.
Definition: cpu.h:49
av_log
#define av_log(a,...)
Definition: tableprint_vlc.h:28
AV_CPU_FLAG_SSE42
#define AV_CPU_FLAG_SSE42
Nehalem SSE4.2 functions.
Definition: cpu.h:45
AV_CPU_FLAG_SSSE3
#define AV_CPU_FLAG_SSSE3
Conroe SSSE3 functions.
Definition: cpu.h:41
mask
static const uint16_t mask[17]
Definition: lzw.c:38
av_default_item_name
av_default_item_name
Definition: libopenh264enc.c:78
av_opt_eval_flags
int av_opt_eval_flags(void *obj, const AVOption *o, const char *val, int *flags_out)
AV_LOG_DEBUG
#define AV_LOG_DEBUG
Stuff which is only useful for libav* developers.
Definition: log.h:197
arg
const char * arg
Definition: jacosubdec.c:66
AV_CPU_FLAG_ARMV6T2
#define AV_CPU_FLAG_ARMV6T2
Definition: cpu.h:63
AV_CPU_FLAG_VFP_VM
#define AV_CPU_FLAG_VFP_VM
VFPv2 vector mode, deprecated in ARMv7-A and unavailable in various CPUs implementations.
Definition: cpu.h:68
CPUFLAG_SSE
#define CPUFLAG_SSE
av_parse_cpu_caps
int av_parse_cpu_caps(unsigned *flags, const char *s)
Parse CPU caps from a string and update the given AV_CPU_* flags based on that.
Definition: cpu.c:185
AV_CPU_FLAG_ARMV5TE
#define AV_CPU_FLAG_ARMV5TE
Definition: cpu.h:61
CPUFLAG_SSE2
#define CPUFLAG_SSE2
AV_CPU_FLAG_SSE3
#define AV_CPU_FLAG_SSE3
Prescott SSE3 functions.
Definition: cpu.h:38
ff_get_cpu_flags_x86
int ff_get_cpu_flags_x86(void)
Definition: cpu.c:90
atomic_load_explicit
#define atomic_load_explicit(object, order)
Definition: stdatomic.h:96
AV_CPU_FLAG_BMI2
#define AV_CPU_FLAG_BMI2
Bit Manipulation Instruction Set 2.
Definition: cpu.h:55
AV_CPU_FLAG_VFPV3
#define AV_CPU_FLAG_VFPV3
Definition: cpu.h:65
CPUFLAG_BMI2
#define CPUFLAG_BMI2
AV_CPU_FLAG_3DNOW
#define AV_CPU_FLAG_3DNOW
AMD 3DNOW.
Definition: cpu.h:32
AV_CPU_FLAG_ARMV6
#define AV_CPU_FLAG_ARMV6
Definition: cpu.h:62
ff_get_cpu_flags_aarch64
int ff_get_cpu_flags_aarch64(void)
Definition: cpu.c:23
AV_CPU_FLAG_SSE3SLOW
#define AV_CPU_FLAG_SSE3SLOW
SSE3 supported, but usually not faster.
Definition: cpu.h:39
AV_CPU_FLAG_AVXSLOW
#define AV_CPU_FLAG_AVXSLOW
AVX supported, but slow when using YMM registers (e.g. Bulldozer)
Definition: cpu.h:48
CPUFLAG_FMA4
#define CPUFLAG_FMA4
AV_CPU_FLAG_BMI1
#define AV_CPU_FLAG_BMI1
Bit Manipulation Instruction Set 1.
Definition: cpu.h:54
AV_CPU_FLAG_MMX
#define AV_CPU_FLAG_MMX
standard MMX
Definition: cpu.h:29
CPUFLAG_FMA3
#define CPUFLAG_FMA3
AVClass
Describe the class of an AVClass context structure.
Definition: log.h:67
AV_CPU_FLAG_FMA4
#define AV_CPU_FLAG_FMA4
Bulldozer FMA4 functions.
Definition: cpu.h:50
AV_CPU_FLAG_SSE4
#define AV_CPU_FLAG_SSE4
Penryn SSE4.1 functions.
Definition: cpu.h:44
CPUFLAG_AVXSLOW
#define CPUFLAG_AVXSLOW
AV_CPU_FLAG_AESNI
#define AV_CPU_FLAG_AESNI
Advanced Encryption Standard functions.
Definition: cpu.h:46
atomic_store_explicit
#define atomic_store_explicit(object, desired, order)
Definition: stdatomic.h:90
av_get_cpu_flags
int av_get_cpu_flags(void)
Return the flags which specify extensions supported by the CPU.
Definition: cpu.c:89
CPUFLAG_SSE2SLOW
#define CPUFLAG_SSE2SLOW
CPUFLAG_XOP
#define CPUFLAG_XOP
AV_CPU_FLAG_3DNOWEXT
#define AV_CPU_FLAG_3DNOWEXT
AMD 3DNowExt.
Definition: cpu.h:37
common.h
common internal and external API header
AV_CPU_FLAG_ARMV8
#define AV_CPU_FLAG_ARMV8
Definition: cpu.h:67
cpu_internal.h
CPUFLAG_AVX2
#define CPUFLAG_AVX2
len
int len
Definition: vorbis_enc_data.h:452
DWORD_PTR
DWORD * DWORD_PTR
Definition: basicDataTypeConversions.h:56
ff_get_cpu_flags_arm
int ff_get_cpu_flags_arm(void)
Definition: cpu.c:149
AV_CPU_FLAG_SETEND
#define AV_CPU_FLAG_SETEND
Definition: cpu.h:69
get_cpu_flags
static int get_cpu_flags(void)
Definition: cpu.c:50
AV_CPU_FLAG_SSE2
#define AV_CPU_FLAG_SSE2
PIV SSE2 functions.
Definition: cpu.h:34
CPUFLAG_3DNOWEXT
#define CPUFLAG_3DNOWEXT
av_force_cpu_flags
void av_force_cpu_flags(int arg)
Disables cpu detection and forces the specified flags.
Definition: cpu.c:63
CPUFLAG_MMXEXT
#define CPUFLAG_MMXEXT
CPUFLAG_AVX
#define CPUFLAG_AVX
CPUFLAG_SSE42
#define CPUFLAG_SSE42
CPUFLAG_SSSE3
#define CPUFLAG_SSSE3
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