FFmpeg
nvenc.c
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1 /*
2  * H.264/HEVC/AV1 hardware encoding using nvidia nvenc
3  * Copyright (c) 2016 Timo Rothenpieler <timo@rothenpieler.org>
4  *
5  * This file is part of FFmpeg.
6  *
7  * FFmpeg is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU Lesser General Public
9  * License as published by the Free Software Foundation; either
10  * version 2.1 of the License, or (at your option) any later version.
11  *
12  * FFmpeg is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15  * Lesser General Public License for more details.
16  *
17  * You should have received a copy of the GNU Lesser General Public
18  * License along with FFmpeg; if not, write to the Free Software
19  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
20  */
21 
22 #include "config.h"
23 #include "config_components.h"
24 
25 #include "nvenc.h"
26 #include "hevc/sei.h"
27 #if CONFIG_AV1_NVENC_ENCODER
28 #include "av1.h"
29 #endif
30 
32 #include "libavutil/hwcontext.h"
33 #include "libavutil/cuda_check.h"
34 #include "libavutil/imgutils.h"
35 #include "libavutil/mem.h"
36 #include "libavutil/pixdesc.h"
38 #include "libavutil/mathematics.h"
40 #include "atsc_a53.h"
41 #include "codec_desc.h"
42 #include "encode.h"
43 #include "internal.h"
44 #include "packet_internal.h"
45 
46 #define CHECK_CU(x) FF_CUDA_CHECK_DL(avctx, dl_fn->cuda_dl, x)
47 
48 #define NVENC_CAP 0x30
49 
50 #ifndef NVENC_NO_DEPRECATED_RC
51 #define IS_CBR(rc) (rc == NV_ENC_PARAMS_RC_CBR || \
52  rc == NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ || \
53  rc == NV_ENC_PARAMS_RC_CBR_HQ)
54 #else
55 #define IS_CBR(rc) (rc == NV_ENC_PARAMS_RC_CBR)
56 #endif
57 
63  AV_PIX_FMT_P016, // Truncated to 10bits
64 #ifdef NVENC_HAVE_422_SUPPORT
68 #endif
69  AV_PIX_FMT_YUV444P16, // Truncated to 10bits
77  AV_PIX_FMT_GBRP16, // Truncated to 10bits
79 #if CONFIG_D3D11VA
81 #endif
83 };
84 
86  HW_CONFIG_ENCODER_FRAMES(CUDA, CUDA),
88 #if CONFIG_D3D11VA
89  HW_CONFIG_ENCODER_FRAMES(D3D11, D3D11VA),
91 #endif
92  NULL,
93 };
94 
95 #define IS_10BIT(pix_fmt) (pix_fmt == AV_PIX_FMT_P010 || \
96  pix_fmt == AV_PIX_FMT_P016 || \
97  pix_fmt == AV_PIX_FMT_P210 || \
98  pix_fmt == AV_PIX_FMT_P216 || \
99  pix_fmt == AV_PIX_FMT_YUV444P16 || \
100  pix_fmt == AV_PIX_FMT_X2RGB10 || \
101  pix_fmt == AV_PIX_FMT_X2BGR10 || \
102  pix_fmt == AV_PIX_FMT_GBRP16)
103 
104 #define IS_RGB(pix_fmt) (pix_fmt == AV_PIX_FMT_0RGB32 || \
105  pix_fmt == AV_PIX_FMT_RGB32 || \
106  pix_fmt == AV_PIX_FMT_0BGR32 || \
107  pix_fmt == AV_PIX_FMT_BGR32 || \
108  pix_fmt == AV_PIX_FMT_X2RGB10 || \
109  pix_fmt == AV_PIX_FMT_X2BGR10)
110 
111 #define IS_YUV444(pix_fmt) (pix_fmt == AV_PIX_FMT_YUV444P || \
112  pix_fmt == AV_PIX_FMT_YUV444P16 || \
113  pix_fmt == AV_PIX_FMT_GBRP || \
114  pix_fmt == AV_PIX_FMT_GBRP16 || \
115  (ctx->rgb_mode == NVENC_RGB_MODE_444 && IS_RGB(pix_fmt)))
116 
117 #define IS_YUV422(pix_fmt) (pix_fmt == AV_PIX_FMT_NV16 || \
118  pix_fmt == AV_PIX_FMT_P210 || \
119  pix_fmt == AV_PIX_FMT_P216)
120 
121 #define IS_GBRP(pix_fmt) (pix_fmt == AV_PIX_FMT_GBRP || \
122  pix_fmt == AV_PIX_FMT_GBRP16)
123 
124 static const struct {
125  NVENCSTATUS nverr;
126  int averr;
127  const char *desc;
128 } nvenc_errors[] = {
129  { NV_ENC_SUCCESS, 0, "success" },
130  { NV_ENC_ERR_NO_ENCODE_DEVICE, AVERROR(ENOENT), "no encode device" },
131  { NV_ENC_ERR_UNSUPPORTED_DEVICE, AVERROR(ENOSYS), "unsupported device" },
132  { NV_ENC_ERR_INVALID_ENCODERDEVICE, AVERROR(EINVAL), "invalid encoder device" },
133  { NV_ENC_ERR_INVALID_DEVICE, AVERROR(EINVAL), "invalid device" },
134  { NV_ENC_ERR_DEVICE_NOT_EXIST, AVERROR(EIO), "device does not exist" },
135  { NV_ENC_ERR_INVALID_PTR, AVERROR(EFAULT), "invalid ptr" },
136  { NV_ENC_ERR_INVALID_EVENT, AVERROR(EINVAL), "invalid event" },
137  { NV_ENC_ERR_INVALID_PARAM, AVERROR(EINVAL), "invalid param" },
138  { NV_ENC_ERR_INVALID_CALL, AVERROR(EINVAL), "invalid call" },
139  { NV_ENC_ERR_OUT_OF_MEMORY, AVERROR(ENOMEM), "out of memory" },
140  { NV_ENC_ERR_ENCODER_NOT_INITIALIZED, AVERROR(EINVAL), "encoder not initialized" },
141  { NV_ENC_ERR_UNSUPPORTED_PARAM, AVERROR(ENOSYS), "unsupported param" },
142  { NV_ENC_ERR_LOCK_BUSY, AVERROR(EAGAIN), "lock busy" },
143  { NV_ENC_ERR_NOT_ENOUGH_BUFFER, AVERROR_BUFFER_TOO_SMALL, "not enough buffer"},
144  { NV_ENC_ERR_INVALID_VERSION, AVERROR(EINVAL), "invalid version" },
145  { NV_ENC_ERR_MAP_FAILED, AVERROR(EIO), "map failed" },
146  { NV_ENC_ERR_NEED_MORE_INPUT, AVERROR(EAGAIN), "need more input" },
147  { NV_ENC_ERR_ENCODER_BUSY, AVERROR(EAGAIN), "encoder busy" },
148  { NV_ENC_ERR_EVENT_NOT_REGISTERD, AVERROR(EBADF), "event not registered" },
149  { NV_ENC_ERR_GENERIC, AVERROR_UNKNOWN, "generic error" },
150  { NV_ENC_ERR_INCOMPATIBLE_CLIENT_KEY, AVERROR(EINVAL), "incompatible client key" },
151  { NV_ENC_ERR_UNIMPLEMENTED, AVERROR(ENOSYS), "unimplemented" },
152  { NV_ENC_ERR_RESOURCE_REGISTER_FAILED, AVERROR(EIO), "resource register failed" },
153  { NV_ENC_ERR_RESOURCE_NOT_REGISTERED, AVERROR(EBADF), "resource not registered" },
154  { NV_ENC_ERR_RESOURCE_NOT_MAPPED, AVERROR(EBADF), "resource not mapped" },
155 };
156 
157 static int nvenc_map_error(NVENCSTATUS err, const char **desc)
158 {
159  int i;
160  for (i = 0; i < FF_ARRAY_ELEMS(nvenc_errors); i++) {
161  if (nvenc_errors[i].nverr == err) {
162  if (desc)
163  *desc = nvenc_errors[i].desc;
164  return nvenc_errors[i].averr;
165  }
166  }
167  if (desc)
168  *desc = "unknown error";
169  return AVERROR_UNKNOWN;
170 }
171 
172 static int nvenc_print_error(AVCodecContext *avctx, NVENCSTATUS err,
173  const char *error_string)
174 {
175  const char *desc;
176  const char *details = "(no details)";
177  int ret = nvenc_map_error(err, &desc);
178 
179 #ifdef NVENC_HAVE_GETLASTERRORSTRING
180  NvencContext *ctx = avctx->priv_data;
181  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
182 
183  if (p_nvenc && ctx->nvencoder)
184  details = p_nvenc->nvEncGetLastErrorString(ctx->nvencoder);
185 #endif
186 
187  av_log(avctx, AV_LOG_ERROR, "%s: %s (%d): %s\n", error_string, desc, err, details);
188 
189  return ret;
190 }
191 
192 typedef struct GUIDTuple {
193  const GUID guid;
194  int flags;
195 } GUIDTuple;
196 
197 #define PRESET_ALIAS(alias, name, ...) \
198  [PRESET_ ## alias] = { NV_ENC_PRESET_ ## name ## _GUID, __VA_ARGS__ }
199 
200 #define PRESET(name, ...) PRESET_ALIAS(name, name, __VA_ARGS__)
201 
203 {
204  GUIDTuple presets[] = {
205 #ifdef NVENC_HAVE_NEW_PRESETS
206  PRESET(P1),
207  PRESET(P2),
208  PRESET(P3),
209  PRESET(P4),
210  PRESET(P5),
211  PRESET(P6),
212  PRESET(P7),
214  PRESET_ALIAS(MEDIUM, P4, NVENC_ONE_PASS),
216  // Compat aliases
221  PRESET_ALIAS(LOW_LATENCY_DEFAULT, P4, NVENC_DEPRECATED_PRESET | NVENC_LOWLATENCY),
226 #else
227  PRESET(DEFAULT),
228  PRESET(HP),
229  PRESET(HQ),
230  PRESET(BD),
231  PRESET_ALIAS(SLOW, HQ, NVENC_TWO_PASSES),
232  PRESET_ALIAS(MEDIUM, HQ, NVENC_ONE_PASS),
234  PRESET(LOW_LATENCY_DEFAULT, NVENC_LOWLATENCY),
235  PRESET(LOW_LATENCY_HP, NVENC_LOWLATENCY),
236  PRESET(LOW_LATENCY_HQ, NVENC_LOWLATENCY),
237  PRESET(LOSSLESS_DEFAULT, NVENC_LOSSLESS),
238  PRESET(LOSSLESS_HP, NVENC_LOSSLESS),
239 #endif
240  };
241 
242  GUIDTuple *t = &presets[ctx->preset];
243 
244  ctx->init_encode_params.presetGUID = t->guid;
245  ctx->flags = t->flags;
246 
247 #ifdef NVENC_HAVE_NEW_PRESETS
248  if (ctx->tuning_info == NV_ENC_TUNING_INFO_LOSSLESS)
250 #endif
251 }
252 
253 #undef PRESET
254 #undef PRESET_ALIAS
255 
257 {
258 #if NVENCAPI_CHECK_VERSION(13, 1)
259  const char *minver = "(unknown)";
260 #elif NVENCAPI_CHECK_VERSION(13, 0)
261  const char *minver = "570.0";
262 #elif NVENCAPI_CHECK_VERSION(12, 2)
263 # if defined(_WIN32) || defined(__CYGWIN__)
264  const char *minver = "551.76";
265 # else
266  const char *minver = "550.54.14";
267 # endif
268 #elif NVENCAPI_CHECK_VERSION(12, 1)
269 # if defined(_WIN32) || defined(__CYGWIN__)
270  const char *minver = "531.61";
271 # else
272  const char *minver = "530.41.03";
273 # endif
274 #elif NVENCAPI_CHECK_VERSION(12, 0)
275 # if defined(_WIN32) || defined(__CYGWIN__)
276  const char *minver = "522.25";
277 # else
278  const char *minver = "520.56.06";
279 # endif
280 #elif NVENCAPI_CHECK_VERSION(11, 1)
281 # if defined(_WIN32) || defined(__CYGWIN__)
282  const char *minver = "471.41";
283 # else
284  const char *minver = "470.57.02";
285 # endif
286 #elif NVENCAPI_CHECK_VERSION(11, 0)
287 # if defined(_WIN32) || defined(__CYGWIN__)
288  const char *minver = "456.71";
289 # else
290  const char *minver = "455.28";
291 # endif
292 #elif NVENCAPI_CHECK_VERSION(10, 0)
293 # if defined(_WIN32) || defined(__CYGWIN__)
294  const char *minver = "450.51";
295 # else
296  const char *minver = "445.87";
297 # endif
298 #elif NVENCAPI_CHECK_VERSION(9, 1)
299 # if defined(_WIN32) || defined(__CYGWIN__)
300  const char *minver = "436.15";
301 # else
302  const char *minver = "435.21";
303 # endif
304 #elif NVENCAPI_CHECK_VERSION(9, 0)
305 # if defined(_WIN32) || defined(__CYGWIN__)
306  const char *minver = "418.81";
307 # else
308  const char *minver = "418.30";
309 # endif
310 #elif NVENCAPI_CHECK_VERSION(8, 2)
311 # if defined(_WIN32) || defined(__CYGWIN__)
312  const char *minver = "397.93";
313 # else
314  const char *minver = "396.24";
315 #endif
316 #elif NVENCAPI_CHECK_VERSION(8, 1)
317 # if defined(_WIN32) || defined(__CYGWIN__)
318  const char *minver = "390.77";
319 # else
320  const char *minver = "390.25";
321 # endif
322 #else
323 # if defined(_WIN32) || defined(__CYGWIN__)
324  const char *minver = "378.66";
325 # else
326  const char *minver = "378.13";
327 # endif
328 #endif
329  av_log(avctx, level, "The minimum required Nvidia driver for nvenc is %s or newer\n", minver);
330 }
331 
333 {
334  NvencContext *ctx = avctx->priv_data;
335  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
336  NVENCSTATUS err;
337  uint32_t nvenc_max_ver;
338  int ret;
339 
340  ret = cuda_load_functions(&dl_fn->cuda_dl, avctx);
341  if (ret < 0)
342  return ret;
343 
344  ret = nvenc_load_functions(&dl_fn->nvenc_dl, avctx);
345  if (ret < 0) {
347  return ret;
348  }
349 
350  err = dl_fn->nvenc_dl->NvEncodeAPIGetMaxSupportedVersion(&nvenc_max_ver);
351  if (err != NV_ENC_SUCCESS)
352  return nvenc_print_error(avctx, err, "Failed to query nvenc max version");
353 
354  av_log(avctx, AV_LOG_VERBOSE, "Loaded Nvenc version %d.%d\n", nvenc_max_ver >> 4, nvenc_max_ver & 0xf);
355 
356  if ((NVENCAPI_MAJOR_VERSION << 4 | NVENCAPI_MINOR_VERSION) > nvenc_max_ver) {
357  av_log(avctx, AV_LOG_ERROR, "Driver does not support the required nvenc API version. "
358  "Required: %d.%d Found: %d.%d\n",
359  NVENCAPI_MAJOR_VERSION, NVENCAPI_MINOR_VERSION,
360  nvenc_max_ver >> 4, nvenc_max_ver & 0xf);
362  return AVERROR(ENOSYS);
363  }
364 
365  dl_fn->nvenc_funcs.version = NV_ENCODE_API_FUNCTION_LIST_VER;
366 
367  err = dl_fn->nvenc_dl->NvEncodeAPICreateInstance(&dl_fn->nvenc_funcs);
368  if (err != NV_ENC_SUCCESS)
369  return nvenc_print_error(avctx, err, "Failed to create nvenc instance");
370 
371  av_log(avctx, AV_LOG_VERBOSE, "Nvenc initialized successfully\n");
372 
373  return 0;
374 }
375 
377 {
378  NvencContext *ctx = avctx->priv_data;
379  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
380 
381  if (ctx->d3d11_device)
382  return 0;
383 
384  return CHECK_CU(dl_fn->cuda_dl->cuCtxPushCurrent(ctx->cu_context));
385 }
386 
388 {
389  NvencContext *ctx = avctx->priv_data;
390  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
391  CUcontext dummy;
392 
393  if (ctx->d3d11_device)
394  return 0;
395 
396  return CHECK_CU(dl_fn->cuda_dl->cuCtxPopCurrent(&dummy));
397 }
398 
400 {
401  NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS params = { 0 };
402  NvencContext *ctx = avctx->priv_data;
403  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
404  NVENCSTATUS ret;
405 
406  params.version = NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS_VER;
407  params.apiVersion = NVENCAPI_VERSION;
408  if (ctx->d3d11_device) {
409  params.device = ctx->d3d11_device;
410  params.deviceType = NV_ENC_DEVICE_TYPE_DIRECTX;
411  } else {
412  params.device = ctx->cu_context;
413  params.deviceType = NV_ENC_DEVICE_TYPE_CUDA;
414  }
415 
416  ret = p_nvenc->nvEncOpenEncodeSessionEx(&params, &ctx->nvencoder);
417  if (ret != NV_ENC_SUCCESS) {
418  ctx->nvencoder = NULL;
419  return nvenc_print_error(avctx, ret, "OpenEncodeSessionEx failed");
420  }
421 
422  return 0;
423 }
424 
426 {
427  NvencContext *ctx = avctx->priv_data;
428  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
429  int i, ret, count = 0;
430  GUID *guids = NULL;
431 
432  ret = p_nvenc->nvEncGetEncodeGUIDCount(ctx->nvencoder, &count);
433 
434  if (ret != NV_ENC_SUCCESS || !count)
435  return AVERROR(ENOSYS);
436 
437  guids = av_malloc(count * sizeof(GUID));
438  if (!guids)
439  return AVERROR(ENOMEM);
440 
441  ret = p_nvenc->nvEncGetEncodeGUIDs(ctx->nvencoder, guids, count, &count);
442  if (ret != NV_ENC_SUCCESS) {
443  ret = AVERROR(ENOSYS);
444  goto fail;
445  }
446 
447  ret = AVERROR(ENOSYS);
448  for (i = 0; i < count; i++) {
449  if (!memcmp(&guids[i], &ctx->init_encode_params.encodeGUID, sizeof(*guids))) {
450  ret = 0;
451  break;
452  }
453  }
454 
455 fail:
456  av_free(guids);
457 
458  return ret;
459 }
460 
461 static int nvenc_check_cap(AVCodecContext *avctx, NV_ENC_CAPS cap)
462 {
463  NvencContext *ctx = avctx->priv_data;
464  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
465  NV_ENC_CAPS_PARAM params = { 0 };
466  int ret, val = 0;
467 
468  params.version = NV_ENC_CAPS_PARAM_VER;
469  params.capsToQuery = cap;
470 
471  ret = p_nvenc->nvEncGetEncodeCaps(ctx->nvencoder, ctx->init_encode_params.encodeGUID, &params, &val);
472 
473  if (ret == NV_ENC_SUCCESS)
474  return val;
475  return 0;
476 }
477 
479 {
480  NvencContext *ctx = avctx->priv_data;
481  int tmp, ret;
482 
484  if (ret < 0) {
485  av_log(avctx, AV_LOG_WARNING, "Codec not supported\n");
486  return ret;
487  }
488 
489  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_YUV444_ENCODE);
490  if (IS_YUV444(ctx->data_pix_fmt) && ret <= 0) {
491  av_log(avctx, AV_LOG_WARNING, "YUV444P not supported\n");
492  return AVERROR(ENOSYS);
493  }
494 
495 #ifdef NVENC_HAVE_422_SUPPORT
496  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_YUV422_ENCODE);
497 #else
498  ret = 0;
499 #endif
500  if (IS_YUV422(ctx->data_pix_fmt) && ret <= 0) {
501  av_log(avctx, AV_LOG_WARNING, "YUV422P not supported\n");
502  return AVERROR(ENOSYS);
503  }
504 
505  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOSSLESS_ENCODE);
506  if (ctx->flags & NVENC_LOSSLESS && ret <= 0) {
507  av_log(avctx, AV_LOG_WARNING, "Lossless encoding not supported\n");
508  return AVERROR(ENOSYS);
509  }
510 
511  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_WIDTH_MAX);
512  if (ret < avctx->width) {
513  av_log(avctx, AV_LOG_WARNING, "Width %d exceeds %d\n",
514  avctx->width, ret);
515  return AVERROR(ENOSYS);
516  }
517 
518  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_HEIGHT_MAX);
519  if (ret < avctx->height) {
520  av_log(avctx, AV_LOG_WARNING, "Height %d exceeds %d\n",
521  avctx->height, ret);
522  return AVERROR(ENOSYS);
523  }
524 
525  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_NUM_MAX_BFRAMES);
526  if (ret < avctx->max_b_frames) {
527  av_log(avctx, AV_LOG_WARNING, "Max B-frames %d exceed %d\n",
528  avctx->max_b_frames, ret);
529 
530  return AVERROR(ENOSYS);
531  }
532 
533  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_FIELD_ENCODING);
534  if (ret < 1 && avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
535  av_log(avctx, AV_LOG_WARNING,
536  "Interlaced encoding is not supported. Supported level: %d\n",
537  ret);
538  return AVERROR(ENOSYS);
539  }
540 
541  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_10BIT_ENCODE);
542  if ((IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) && ret <= 0) {
543  av_log(avctx, AV_LOG_WARNING, "10 bit encode not supported\n");
544  return AVERROR(ENOSYS);
545  }
546 
547  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOOKAHEAD);
548  if (ctx->rc_lookahead > 0 && ret <= 0) {
549  av_log(avctx, AV_LOG_WARNING, "RC lookahead not supported\n");
550  return AVERROR(ENOSYS);
551  }
552 
553  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_TEMPORAL_AQ);
554  if (ctx->temporal_aq > 0 && ret <= 0) {
555  av_log(avctx, AV_LOG_WARNING, "Temporal AQ not supported\n");
556  return AVERROR(ENOSYS);
557  }
558 
559  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_WEIGHTED_PREDICTION);
560  if (ctx->weighted_pred > 0 && ret <= 0) {
561  av_log (avctx, AV_LOG_WARNING, "Weighted Prediction not supported\n");
562  return AVERROR(ENOSYS);
563  }
564 
565  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_CABAC);
566  if (ctx->coder == NV_ENC_H264_ENTROPY_CODING_MODE_CABAC && ret <= 0) {
567  av_log(avctx, AV_LOG_WARNING, "CABAC entropy coding not supported\n");
568  return AVERROR(ENOSYS);
569  }
570 
571 #ifdef NVENC_HAVE_BFRAME_REF_MODE
572  tmp = (ctx->b_ref_mode >= 0) ? ctx->b_ref_mode : NV_ENC_BFRAME_REF_MODE_DISABLED;
573  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_BFRAME_REF_MODE);
574  if (tmp == NV_ENC_BFRAME_REF_MODE_EACH && ret != 1 && ret != 3) {
575  av_log(avctx, AV_LOG_WARNING, "Each B frame as reference is not supported\n");
576  return AVERROR(ENOSYS);
577  } else if (tmp != NV_ENC_BFRAME_REF_MODE_DISABLED && ret == 0) {
578  av_log(avctx, AV_LOG_WARNING, "B frames as references are not supported\n");
579  return AVERROR(ENOSYS);
580  }
581 #else
582  tmp = (ctx->b_ref_mode >= 0) ? ctx->b_ref_mode : 0;
583  if (tmp > 0) {
584  av_log(avctx, AV_LOG_WARNING, "B frames as references need SDK 8.1 at build time\n");
585  return AVERROR(ENOSYS);
586  }
587 #endif
588 
589 #ifdef NVENC_HAVE_MULTIPLE_REF_FRAMES
590  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_MULTIPLE_REF_FRAMES);
591  if(avctx->refs != NV_ENC_NUM_REF_FRAMES_AUTOSELECT && ret <= 0) {
592  av_log(avctx, AV_LOG_WARNING, "Multiple reference frames are not supported by the device\n");
593  return AVERROR(ENOSYS);
594  }
595 #else
596  if(avctx->refs != 0) {
597  av_log(avctx, AV_LOG_WARNING, "Multiple reference frames need SDK 9.1 at build time\n");
598  return AVERROR(ENOSYS);
599  }
600 #endif
601 
602 #ifdef NVENC_HAVE_SINGLE_SLICE_INTRA_REFRESH
603  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SINGLE_SLICE_INTRA_REFRESH);
604  if(ctx->single_slice_intra_refresh && ret <= 0) {
605  av_log(avctx, AV_LOG_WARNING, "Single slice intra refresh not supported by the device\n");
606  return AVERROR(ENOSYS);
607  }
608 #else
609  if(ctx->single_slice_intra_refresh) {
610  av_log(avctx, AV_LOG_WARNING, "Single slice intra refresh needs SDK 11.1 at build time\n");
611  return AVERROR(ENOSYS);
612  }
613 #endif
614 
615  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_INTRA_REFRESH);
616  if((ctx->intra_refresh || ctx->single_slice_intra_refresh) && ret <= 0) {
617  av_log(avctx, AV_LOG_WARNING, "Intra refresh not supported by the device\n");
618  return AVERROR(ENOSYS);
619  }
620 
621 #ifndef NVENC_HAVE_HEVC_CONSTRAINED_ENCODING
622  if (ctx->constrained_encoding && avctx->codec->id == AV_CODEC_ID_HEVC) {
623  av_log(avctx, AV_LOG_WARNING, "HEVC constrained encoding needs SDK 10.0 at build time\n");
624  return AVERROR(ENOSYS);
625  }
626 #endif
627 
628  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_CONSTRAINED_ENCODING);
629  if(ctx->constrained_encoding && ret <= 0) {
630  av_log(avctx, AV_LOG_WARNING, "Constrained encoding not supported by the device\n");
631  return AVERROR(ENOSYS);
632  }
633 
634 #if defined(NVENC_HAVE_TEMPORAL_FILTER) || defined(NVENC_HAVE_H264_AND_AV1_TEMPORAL_FILTER)
635  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_TEMPORAL_FILTER);
636  if(ctx->tf_level > 0 && ret <= 0) {
637  av_log(avctx, AV_LOG_WARNING, "Temporal filtering not supported by the device\n");
638  return AVERROR(ENOSYS);
639  }
640 #endif
641 
642 #ifdef NVENC_HAVE_LOOKAHEAD_LEVEL
643  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOOKAHEAD_LEVEL);
644  if(ctx->rc_lookahead > 0 && ctx->lookahead_level > 0 &&
645  ctx->lookahead_level != NV_ENC_LOOKAHEAD_LEVEL_AUTOSELECT &&
646  ctx->lookahead_level > ret)
647  {
648  av_log(avctx, AV_LOG_WARNING, "Lookahead level not supported. Maximum level: %d\n", ret);
649  return AVERROR(ENOSYS);
650  }
651 #endif
652 
653 #ifdef NVENC_HAVE_UNIDIR_B
654  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_UNIDIRECTIONAL_B);
655  if(ctx->unidir_b && ret <= 0) {
656  av_log(avctx, AV_LOG_WARNING, "Unidirectional B-Frames not supported by the device\n");
657  return AVERROR(ENOSYS);
658  }
659 #endif
660 
661  ctx->support_dyn_bitrate = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_DYN_BITRATE_CHANGE);
662 
663  return 0;
664 }
665 
666 static av_cold int nvenc_check_device(AVCodecContext *avctx, int idx)
667 {
668  NvencContext *ctx = avctx->priv_data;
669  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
670  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
671  char name[128] = { 0};
672  int major, minor, ret;
673  CUdevice cu_device;
674  int loglevel = AV_LOG_VERBOSE;
675 
676  if (ctx->device == LIST_DEVICES)
677  loglevel = AV_LOG_INFO;
678 
679  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceGet(&cu_device, idx));
680  if (ret < 0)
681  return ret;
682 
683  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceGetName(name, sizeof(name), cu_device));
684  if (ret < 0)
685  return ret;
686 
687  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceComputeCapability(&major, &minor, cu_device));
688  if (ret < 0)
689  return ret;
690 
691  av_log(avctx, loglevel, "[ GPU #%d - < %s > has Compute SM %d.%d ]\n", idx, name, major, minor);
692  if (((major << 4) | minor) < NVENC_CAP) {
693  av_log(avctx, loglevel, "does not support NVENC\n");
694  goto fail;
695  }
696 
697  if (ctx->device != idx && ctx->device != ANY_DEVICE)
698  return -1;
699 
700  ret = CHECK_CU(dl_fn->cuda_dl->cuCtxCreate(&ctx->cu_context_internal, 0, cu_device));
701  if (ret < 0)
702  goto fail;
703 
704  ctx->cu_context = ctx->cu_context_internal;
705  ctx->cu_stream = NULL;
706 
707  if ((ret = nvenc_pop_context(avctx)) < 0)
708  goto fail2;
709 
710  if ((ret = nvenc_open_session(avctx)) < 0)
711  goto fail2;
712 
713  if ((ret = nvenc_check_capabilities(avctx)) < 0)
714  goto fail3;
715 
716  av_log(avctx, loglevel, "supports NVENC\n");
717 
718  dl_fn->nvenc_device_count++;
719 
720  if (ctx->device == idx || ctx->device == ANY_DEVICE)
721  return 0;
722 
723 fail3:
724  if ((ret = nvenc_push_context(avctx)) < 0)
725  return ret;
726 
727  p_nvenc->nvEncDestroyEncoder(ctx->nvencoder);
728  ctx->nvencoder = NULL;
729 
730  if ((ret = nvenc_pop_context(avctx)) < 0)
731  return ret;
732 
733 fail2:
734  CHECK_CU(dl_fn->cuda_dl->cuCtxDestroy(ctx->cu_context_internal));
735  ctx->cu_context_internal = NULL;
736 
737 fail:
738  return AVERROR(ENOSYS);
739 }
740 
742 {
743  NvencContext *ctx = avctx->priv_data;
744  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
745 
746  switch (avctx->codec->id) {
747  case AV_CODEC_ID_H264:
748  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_H264_GUID;
749  break;
750  case AV_CODEC_ID_HEVC:
751  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_HEVC_GUID;
752  break;
753 #if CONFIG_AV1_NVENC_ENCODER
754  case AV_CODEC_ID_AV1:
755  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_AV1_GUID;
756  break;
757 #endif
758  default:
759  return AVERROR_BUG;
760  }
761 
763 
765  av_log(avctx, AV_LOG_WARNING, "The selected preset is deprecated. Use p1 to p7 + -tune or fast/medium/slow.\n");
766 
767  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11 || avctx->hw_frames_ctx || avctx->hw_device_ctx) {
768  AVHWFramesContext *frames_ctx;
769  AVHWDeviceContext *hwdev_ctx;
770  AVCUDADeviceContext *cuda_device_hwctx = NULL;
771 #if CONFIG_D3D11VA
772  AVD3D11VADeviceContext *d3d11_device_hwctx = NULL;
773 #endif
774  int ret;
775 
776  if (avctx->hw_frames_ctx) {
777  frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
778  if (frames_ctx->format == AV_PIX_FMT_CUDA)
779  cuda_device_hwctx = frames_ctx->device_ctx->hwctx;
780 #if CONFIG_D3D11VA
781  else if (frames_ctx->format == AV_PIX_FMT_D3D11)
782  d3d11_device_hwctx = frames_ctx->device_ctx->hwctx;
783 #endif
784  else
785  return AVERROR(EINVAL);
786  } else if (avctx->hw_device_ctx) {
787  hwdev_ctx = (AVHWDeviceContext*)avctx->hw_device_ctx->data;
788  if (hwdev_ctx->type == AV_HWDEVICE_TYPE_CUDA)
789  cuda_device_hwctx = hwdev_ctx->hwctx;
790 #if CONFIG_D3D11VA
791  else if (hwdev_ctx->type == AV_HWDEVICE_TYPE_D3D11VA)
792  d3d11_device_hwctx = hwdev_ctx->hwctx;
793 #endif
794  else
795  return AVERROR(EINVAL);
796  } else {
797  return AVERROR(EINVAL);
798  }
799 
800  if (cuda_device_hwctx) {
801  ctx->cu_context = cuda_device_hwctx->cuda_ctx;
802  ctx->cu_stream = cuda_device_hwctx->stream;
803  }
804 #if CONFIG_D3D11VA
805  else if (d3d11_device_hwctx) {
806  ctx->d3d11_device = d3d11_device_hwctx->device;
807  ID3D11Device_AddRef(ctx->d3d11_device);
808  }
809 #endif
810 
811  ret = nvenc_open_session(avctx);
812  if (ret < 0)
813  return ret;
814 
815  ret = nvenc_check_capabilities(avctx);
816  if (ret < 0) {
817  av_log(avctx, AV_LOG_FATAL, "Provided device doesn't support required NVENC features\n");
818  return ret;
819  }
820  } else {
821  int i, nb_devices = 0;
822 
823  if (CHECK_CU(dl_fn->cuda_dl->cuInit(0)) < 0)
824  return AVERROR_UNKNOWN;
825 
826  if (CHECK_CU(dl_fn->cuda_dl->cuDeviceGetCount(&nb_devices)) < 0)
827  return AVERROR_UNKNOWN;
828 
829  if (!nb_devices) {
830  av_log(avctx, AV_LOG_FATAL, "No CUDA capable devices found\n");
831  return AVERROR_EXTERNAL;
832  }
833 
834  av_log(avctx, AV_LOG_VERBOSE, "%d CUDA capable devices found\n", nb_devices);
835 
836  dl_fn->nvenc_device_count = 0;
837  for (i = 0; i < nb_devices; ++i) {
838  if ((nvenc_check_device(avctx, i)) >= 0 && ctx->device != LIST_DEVICES)
839  return 0;
840  }
841 
842  if (ctx->device == LIST_DEVICES)
843  return AVERROR_EXIT;
844 
845  if (!dl_fn->nvenc_device_count) {
846  av_log(avctx, AV_LOG_FATAL, "No capable devices found\n");
847  return AVERROR_EXTERNAL;
848  }
849 
850  av_log(avctx, AV_LOG_FATAL, "Requested GPU %d, but only %d GPUs are available!\n", ctx->device, nb_devices);
851  return AVERROR(EINVAL);
852  }
853 
854  return 0;
855 }
856 
857 static av_cold void set_constqp(AVCodecContext *avctx)
858 {
859  NvencContext *ctx = avctx->priv_data;
860  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
861 #if CONFIG_AV1_NVENC_ENCODER
862  int qmax = avctx->codec->id == AV_CODEC_ID_AV1 ? 255 : 51;
863 #else
864  int qmax = 51;
865 #endif
866 
867  rc->rateControlMode = NV_ENC_PARAMS_RC_CONSTQP;
868 
869  if (ctx->init_qp_p >= 0) {
870  rc->constQP.qpInterP = ctx->init_qp_p;
871  if (ctx->init_qp_i >= 0 && ctx->init_qp_b >= 0) {
872  rc->constQP.qpIntra = ctx->init_qp_i;
873  rc->constQP.qpInterB = ctx->init_qp_b;
874  } else if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
875  rc->constQP.qpIntra = av_clip(
876  rc->constQP.qpInterP * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, qmax);
877  rc->constQP.qpInterB = av_clip(
878  rc->constQP.qpInterP * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, qmax);
879  } else {
880  rc->constQP.qpIntra = rc->constQP.qpInterP;
881  rc->constQP.qpInterB = rc->constQP.qpInterP;
882  }
883  } else if (ctx->cqp >= 0) {
884  rc->constQP.qpInterP = rc->constQP.qpInterB = rc->constQP.qpIntra = ctx->cqp;
885  if (avctx->b_quant_factor != 0.0)
886  rc->constQP.qpInterB = av_clip(ctx->cqp * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, qmax);
887  if (avctx->i_quant_factor != 0.0)
888  rc->constQP.qpIntra = av_clip(ctx->cqp * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, qmax);
889  }
890 
891  avctx->qmin = ctx->qmin = -1;
892  avctx->qmax = ctx->qmax = -1;
893 }
894 
895 static av_cold void set_vbr(AVCodecContext *avctx)
896 {
897  NvencContext *ctx = avctx->priv_data;
898  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
899  int qp_inter_p;
900 #if CONFIG_AV1_NVENC_ENCODER
901  int qmax = avctx->codec->id == AV_CODEC_ID_AV1 ? 255 : 51;
902 #else
903  int qmax = 51;
904 #endif
905 
906  if (avctx->qmin >= 0 || avctx->qmax >= 0)
907  av_log(avctx, AV_LOG_WARNING, "Passing qmin/qmax via global AVCodecContext options. Use encoder options instead.\n");
908 
909  if (avctx->qmin >= 0 && ctx->qmin < 0)
910  ctx->qmin = avctx->qmin;
911  if (avctx->qmax >= 0 && ctx->qmax < 0)
912  ctx->qmax = avctx->qmax;
913  avctx->qmin = ctx->qmin;
914  avctx->qmax = ctx->qmax;
915 
916  if (ctx->qmin >= 0 && ctx->qmax >= 0) {
917  rc->enableMinQP = 1;
918  rc->enableMaxQP = 1;
919 
920  rc->minQP.qpInterB = ctx->qmin;
921  rc->minQP.qpInterP = ctx->qmin;
922  rc->minQP.qpIntra = ctx->qmin;
923 
924  rc->maxQP.qpInterB = ctx->qmax;
925  rc->maxQP.qpInterP = ctx->qmax;
926  rc->maxQP.qpIntra = ctx->qmax;
927 
928  qp_inter_p = (ctx->qmax + 3 * ctx->qmin) / 4; // biased towards Qmin
929  } else if (ctx->qmin >= 0) {
930  rc->enableMinQP = 1;
931 
932  rc->minQP.qpInterB = ctx->qmin;
933  rc->minQP.qpInterP = ctx->qmin;
934  rc->minQP.qpIntra = ctx->qmin;
935 
936  qp_inter_p = ctx->qmin;
937  } else {
938  qp_inter_p = 26; // default to 26
939  }
940 
941  rc->enableInitialRCQP = 1;
942 
943  if (ctx->init_qp_p < 0) {
944  rc->initialRCQP.qpInterP = qp_inter_p;
945  } else {
946  rc->initialRCQP.qpInterP = ctx->init_qp_p;
947  }
948 
949  if (ctx->init_qp_i < 0) {
950  if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
951  rc->initialRCQP.qpIntra = av_clip(
952  rc->initialRCQP.qpInterP * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, qmax);
953  } else {
954  rc->initialRCQP.qpIntra = rc->initialRCQP.qpInterP;
955  }
956  } else {
957  rc->initialRCQP.qpIntra = ctx->init_qp_i;
958  }
959 
960  if (ctx->init_qp_b < 0) {
961  if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
962  rc->initialRCQP.qpInterB = av_clip(
963  rc->initialRCQP.qpInterP * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, qmax);
964  } else {
965  rc->initialRCQP.qpInterB = rc->initialRCQP.qpInterP;
966  }
967  } else {
968  rc->initialRCQP.qpInterB = ctx->init_qp_b;
969  }
970 }
971 
973 {
974  NvencContext *ctx = avctx->priv_data;
975  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
976 
977  rc->rateControlMode = NV_ENC_PARAMS_RC_CONSTQP;
978  rc->constQP.qpInterB = 0;
979  rc->constQP.qpInterP = 0;
980  rc->constQP.qpIntra = 0;
981 
982  avctx->qmin = ctx->qmin = -1;
983  avctx->qmax = ctx->qmax = -1;
984 }
985 
987 {
988  NvencContext *ctx = avctx->priv_data;
989  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
990 
991  switch (ctx->rc) {
992  case NV_ENC_PARAMS_RC_CONSTQP:
993  set_constqp(avctx);
994  return;
995 #ifndef NVENC_NO_DEPRECATED_RC
996  case NV_ENC_PARAMS_RC_VBR_MINQP:
997  if (avctx->qmin < 0 && ctx->qmin < 0) {
998  av_log(avctx, AV_LOG_WARNING,
999  "The variable bitrate rate-control requires "
1000  "the 'qmin' option set.\n");
1001  set_vbr(avctx);
1002  return;
1003  }
1004  /* fall through */
1005  case NV_ENC_PARAMS_RC_VBR_HQ:
1006 #endif
1007  case NV_ENC_PARAMS_RC_VBR:
1008  set_vbr(avctx);
1009  break;
1010  case NV_ENC_PARAMS_RC_CBR:
1011 #ifndef NVENC_NO_DEPRECATED_RC
1012  case NV_ENC_PARAMS_RC_CBR_HQ:
1013  case NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ:
1014 #endif
1015  break;
1016  }
1017 
1018  rc->rateControlMode = ctx->rc;
1019 }
1020 
1022 {
1023  NvencContext *ctx = avctx->priv_data;
1024  // default minimum of 4 surfaces
1025  // multiply by 2 for number of NVENCs on gpu (hardcode to 2)
1026  // another multiply by 2 to avoid blocking next PBB group
1027  int nb_surfaces = FFMAX(4, ctx->encode_config.frameIntervalP * 2 * 2);
1028 
1029  // lookahead enabled
1030  if (ctx->rc_lookahead > 0) {
1031  // +1 is to account for lkd_bound calculation later
1032  // +4 is to allow sufficient pipelining with lookahead
1033  nb_surfaces = FFMAX(1, FFMAX(nb_surfaces, ctx->rc_lookahead + ctx->encode_config.frameIntervalP + 1 + 4));
1034  if (nb_surfaces > ctx->nb_surfaces && ctx->nb_surfaces > 0)
1035  {
1036  av_log(avctx, AV_LOG_WARNING,
1037  "Defined rc_lookahead requires more surfaces, "
1038  "increasing used surfaces %d -> %d\n", ctx->nb_surfaces, nb_surfaces);
1039  }
1040  ctx->nb_surfaces = FFMAX(nb_surfaces, ctx->nb_surfaces);
1041  } else {
1042  if (ctx->encode_config.frameIntervalP > 1 && ctx->nb_surfaces < nb_surfaces && ctx->nb_surfaces > 0)
1043  {
1044  av_log(avctx, AV_LOG_WARNING,
1045  "Defined b-frame requires more surfaces, "
1046  "increasing used surfaces %d -> %d\n", ctx->nb_surfaces, nb_surfaces);
1047  ctx->nb_surfaces = FFMAX(ctx->nb_surfaces, nb_surfaces);
1048  }
1049  else if (ctx->nb_surfaces <= 0)
1050  ctx->nb_surfaces = nb_surfaces;
1051  // otherwise use user specified value
1052  }
1053 
1054  ctx->nb_surfaces = FFMAX(1, FFMIN(MAX_REGISTERED_FRAMES, ctx->nb_surfaces));
1055  ctx->async_depth = FFMIN(ctx->async_depth, ctx->nb_surfaces - 1);
1056 
1057  // Output in the worst case will only start when the surface buffer is completely full.
1058  // Hence we need to keep at least the max amount of surfaces plus the max reorder delay around.
1059  ctx->frame_data_array_nb = FFMAX(ctx->nb_surfaces, ctx->nb_surfaces + ctx->encode_config.frameIntervalP - 1);
1060 
1061  return 0;
1062 }
1063 
1065 {
1066  NvencContext *ctx = avctx->priv_data;
1067 
1068  if (avctx->global_quality > 0)
1069  av_log(avctx, AV_LOG_WARNING, "Using global_quality with nvenc is deprecated. Use qp instead.\n");
1070 
1071  if (ctx->cqp < 0 && avctx->global_quality > 0)
1072  ctx->cqp = avctx->global_quality;
1073 
1074  if (avctx->bit_rate > 0) {
1075  ctx->encode_config.rcParams.averageBitRate = avctx->bit_rate;
1076  } else if (ctx->encode_config.rcParams.averageBitRate > 0) {
1077  ctx->encode_config.rcParams.maxBitRate = ctx->encode_config.rcParams.averageBitRate;
1078  }
1079 
1080  if (avctx->rc_max_rate > 0)
1081  ctx->encode_config.rcParams.maxBitRate = avctx->rc_max_rate;
1082 
1083 #ifdef NVENC_HAVE_MULTIPASS
1084  ctx->encode_config.rcParams.multiPass = ctx->multipass;
1085 
1086  if (ctx->flags & NVENC_ONE_PASS)
1087  ctx->encode_config.rcParams.multiPass = NV_ENC_MULTI_PASS_DISABLED;
1088  if (ctx->flags & NVENC_TWO_PASSES || ctx->twopass > 0)
1089  ctx->encode_config.rcParams.multiPass = NV_ENC_TWO_PASS_FULL_RESOLUTION;
1090 
1091  if (ctx->rc < 0) {
1092  if (ctx->cbr) {
1093  ctx->rc = NV_ENC_PARAMS_RC_CBR;
1094  } else if (ctx->cqp >= 0) {
1095  ctx->rc = NV_ENC_PARAMS_RC_CONSTQP;
1096  } else if (ctx->quality >= 0.0f) {
1097  ctx->rc = NV_ENC_PARAMS_RC_VBR;
1098  }
1099  }
1100 #else
1101  if (ctx->rc < 0) {
1102  if (ctx->flags & NVENC_ONE_PASS)
1103  ctx->twopass = 0;
1104  if (ctx->flags & NVENC_TWO_PASSES)
1105  ctx->twopass = 1;
1106 
1107  if (ctx->twopass < 0)
1108  ctx->twopass = (ctx->flags & NVENC_LOWLATENCY) != 0;
1109 
1110  if (ctx->cbr) {
1111  if (ctx->twopass) {
1112  ctx->rc = NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ;
1113  } else {
1114  ctx->rc = NV_ENC_PARAMS_RC_CBR;
1115  }
1116  } else if (ctx->cqp >= 0) {
1117  ctx->rc = NV_ENC_PARAMS_RC_CONSTQP;
1118  } else if (ctx->twopass) {
1119  ctx->rc = NV_ENC_PARAMS_RC_VBR_HQ;
1120  } else if ((avctx->qmin >= 0 && avctx->qmax >= 0) ||
1121  (ctx->qmin >= 0 && ctx->qmax >= 0)) {
1122  ctx->rc = NV_ENC_PARAMS_RC_VBR_MINQP;
1123  }
1124  }
1125 #endif
1126 
1127  if (ctx->rc >= 0 && ctx->rc & RC_MODE_DEPRECATED) {
1128  av_log(avctx, AV_LOG_WARNING, "Specified rc mode is deprecated.\n");
1129  av_log(avctx, AV_LOG_WARNING, "Use -rc constqp/cbr/vbr, -tune and -multipass instead.\n");
1130 
1131  ctx->rc &= ~RC_MODE_DEPRECATED;
1132  }
1133 
1134 #ifdef NVENC_HAVE_QP_CHROMA_OFFSETS
1135  ctx->encode_config.rcParams.cbQPIndexOffset = ctx->qp_cb_offset;
1136  ctx->encode_config.rcParams.crQPIndexOffset = ctx->qp_cr_offset;
1137 #else
1138  if (ctx->qp_cb_offset || ctx->qp_cr_offset)
1139  av_log(avctx, AV_LOG_WARNING, "Failed setting QP CB/CR offsets, SDK 11.1 or greater required at compile time.\n");
1140 #endif
1141 
1142 #ifdef NVENC_HAVE_LDKFS
1143  if (ctx->ldkfs)
1144  ctx->encode_config.rcParams.lowDelayKeyFrameScale = ctx->ldkfs;
1145 #endif
1146 
1147  if (ctx->flags & NVENC_LOSSLESS) {
1148  set_lossless(avctx);
1149  } else if (ctx->rc >= 0) {
1151  } else {
1152  ctx->encode_config.rcParams.rateControlMode = NV_ENC_PARAMS_RC_VBR;
1153  set_vbr(avctx);
1154  }
1155 
1156  if (avctx->rc_buffer_size > 0) {
1157  ctx->encode_config.rcParams.vbvBufferSize = avctx->rc_buffer_size;
1158  } else if (ctx->encode_config.rcParams.averageBitRate > 0) {
1159  avctx->rc_buffer_size = ctx->encode_config.rcParams.vbvBufferSize = 2 * ctx->encode_config.rcParams.averageBitRate;
1160  }
1161 
1162  if (ctx->aq) {
1163  ctx->encode_config.rcParams.enableAQ = 1;
1164  ctx->encode_config.rcParams.aqStrength = ctx->aq_strength;
1165  av_log(avctx, AV_LOG_VERBOSE, "AQ enabled.\n");
1166  }
1167 
1168  if (ctx->temporal_aq) {
1169  ctx->encode_config.rcParams.enableTemporalAQ = 1;
1170  av_log(avctx, AV_LOG_VERBOSE, "Temporal AQ enabled.\n");
1171  }
1172 
1173  if (ctx->rc_lookahead > 0) {
1174  int lkd_bound = FFMIN(ctx->nb_surfaces, ctx->async_depth) -
1175  ctx->encode_config.frameIntervalP - 4;
1176 
1177  if (lkd_bound < 0) {
1178  ctx->encode_config.rcParams.enableLookahead = 0;
1179  av_log(avctx, AV_LOG_WARNING,
1180  "Lookahead not enabled. Increase buffer delay (-delay).\n");
1181  } else {
1182  ctx->encode_config.rcParams.enableLookahead = 1;
1183  ctx->encode_config.rcParams.lookaheadDepth = av_clip(ctx->rc_lookahead, 0, lkd_bound);
1184  ctx->encode_config.rcParams.disableIadapt = ctx->no_scenecut;
1185  ctx->encode_config.rcParams.disableBadapt = !ctx->b_adapt;
1186  av_log(avctx, AV_LOG_VERBOSE,
1187  "Lookahead enabled: depth %d, scenecut %s, B-adapt %s.\n",
1188  ctx->encode_config.rcParams.lookaheadDepth,
1189  ctx->encode_config.rcParams.disableIadapt ? "disabled" : "enabled",
1190  ctx->encode_config.rcParams.disableBadapt ? "disabled" : "enabled");
1191  if (ctx->encode_config.rcParams.lookaheadDepth < ctx->rc_lookahead)
1192  av_log(avctx, AV_LOG_WARNING, "Clipping lookahead depth to %d (from %d) due to lack of surfaces/delay",
1193  ctx->encode_config.rcParams.lookaheadDepth, ctx->rc_lookahead);
1194 
1195 #ifdef NVENC_HAVE_LOOKAHEAD_LEVEL
1196  if (ctx->lookahead_level >= 0) {
1197  switch (ctx->lookahead_level) {
1198  case NV_ENC_LOOKAHEAD_LEVEL_0:
1199  case NV_ENC_LOOKAHEAD_LEVEL_1:
1200  case NV_ENC_LOOKAHEAD_LEVEL_2:
1201  case NV_ENC_LOOKAHEAD_LEVEL_3:
1202  case NV_ENC_LOOKAHEAD_LEVEL_AUTOSELECT:
1203  break;
1204  default:
1205  av_log(avctx, AV_LOG_ERROR, "Invalid lookahead level.\n");
1206  return AVERROR(EINVAL);
1207  }
1208 
1209  ctx->encode_config.rcParams.lookaheadLevel = ctx->lookahead_level;
1210  }
1211 #endif
1212  }
1213  }
1214 
1215  if (ctx->strict_gop) {
1216  ctx->encode_config.rcParams.strictGOPTarget = 1;
1217  av_log(avctx, AV_LOG_VERBOSE, "Strict GOP target enabled.\n");
1218  }
1219 
1220  if (ctx->nonref_p)
1221  ctx->encode_config.rcParams.enableNonRefP = 1;
1222 
1223  if (ctx->zerolatency)
1224  ctx->encode_config.rcParams.zeroReorderDelay = 1;
1225 
1226  if (ctx->quality) {
1227  //convert from float to fixed point 8.8
1228  int tmp_quality = (int)(ctx->quality * 256.0f);
1229  ctx->encode_config.rcParams.targetQuality = (uint8_t)(tmp_quality >> 8);
1230  ctx->encode_config.rcParams.targetQualityLSB = (uint8_t)(tmp_quality & 0xff);
1231 
1232  av_log(avctx, AV_LOG_VERBOSE, "CQ(%d) mode enabled.\n", tmp_quality);
1233 
1234  // CQ mode shall discard avg bitrate/vbv buffer size and honor only max bitrate
1235  ctx->encode_config.rcParams.averageBitRate = avctx->bit_rate = 0;
1236  ctx->encode_config.rcParams.vbvBufferSize = avctx->rc_buffer_size = 0;
1237  ctx->encode_config.rcParams.maxBitRate = avctx->rc_max_rate;
1238  }
1239 
1240  return 0;
1241 }
1242 
1244 {
1245  NvencContext *ctx = avctx->priv_data;
1246  NV_ENC_CONFIG *cc = &ctx->encode_config;
1247  NV_ENC_CONFIG_H264 *h264 = &cc->encodeCodecConfig.h264Config;
1248  NV_ENC_CONFIG_H264_VUI_PARAMETERS *vui = &h264->h264VUIParameters;
1249 
1250  const AVPixFmtDescriptor *pixdesc = av_pix_fmt_desc_get(ctx->data_pix_fmt);
1251 
1252  if ((pixdesc->flags & AV_PIX_FMT_FLAG_RGB) && !IS_GBRP(ctx->data_pix_fmt)) {
1253  vui->colourMatrix = AVCOL_SPC_BT470BG;
1254  vui->colourPrimaries = avctx->color_primaries;
1255  vui->transferCharacteristics = avctx->color_trc;
1256  vui->videoFullRangeFlag = 0;
1257  } else {
1258  vui->colourMatrix = IS_GBRP(ctx->data_pix_fmt) ? AVCOL_SPC_RGB : avctx->colorspace;
1259  vui->colourPrimaries = avctx->color_primaries;
1260  vui->transferCharacteristics = avctx->color_trc;
1261  vui->videoFullRangeFlag = (avctx->color_range == AVCOL_RANGE_JPEG
1262  || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
1263  }
1264 
1265  vui->colourDescriptionPresentFlag =
1266  (vui->colourMatrix != 2 || vui->colourPrimaries != 2 || vui->transferCharacteristics != 2);
1267 
1268  vui->videoSignalTypePresentFlag =
1269  (vui->colourDescriptionPresentFlag
1270  || vui->videoFormat != 5
1271  || vui->videoFullRangeFlag != 0);
1272 
1273  if (ctx->max_slice_size > 0) {
1274  h264->sliceMode = 1;
1275  h264->sliceModeData = ctx->max_slice_size;
1276  } else {
1277  h264->sliceMode = 3;
1278  h264->sliceModeData = avctx->slices > 0 ? avctx->slices : 1;
1279  }
1280 
1281  if (ctx->intra_refresh) {
1282  h264->enableIntraRefresh = 1;
1283  h264->intraRefreshPeriod = cc->gopLength;
1284  h264->intraRefreshCnt = cc->gopLength - 1;
1285  cc->gopLength = NVENC_INFINITE_GOPLENGTH;
1286  h264->outputRecoveryPointSEI = 1;
1287 #ifdef NVENC_HAVE_SINGLE_SLICE_INTRA_REFRESH
1288  h264->singleSliceIntraRefresh = ctx->single_slice_intra_refresh;
1289 #endif
1290  }
1291 
1292  if (ctx->constrained_encoding)
1293  h264->enableConstrainedEncoding = 1;
1294 
1295  h264->disableSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 1 : 0;
1296  h264->repeatSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 0 : 1;
1297  h264->outputAUD = ctx->aud;
1298 
1299  if (ctx->dpb_size >= 0) {
1300  /* 0 means "let the hardware decide" */
1301  h264->maxNumRefFrames = ctx->dpb_size;
1302  }
1303 
1304  h264->idrPeriod = cc->gopLength;
1305 
1306  if (IS_CBR(cc->rcParams.rateControlMode)) {
1307  /* Older SDKs use outputBufferingPeriodSEI to control filler data */
1308  h264->outputBufferingPeriodSEI = ctx->cbr_padding;
1309 
1310 #ifdef NVENC_HAVE_FILLER_DATA
1311  h264->enableFillerDataInsertion = ctx->cbr_padding;
1312 #endif
1313  }
1314 
1315  h264->outputPictureTimingSEI = 1;
1316 
1317 #ifndef NVENC_NO_DEPRECATED_RC
1318  if (cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ ||
1319  cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_CBR_HQ ||
1320  cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_VBR_HQ) {
1321  h264->adaptiveTransformMode = NV_ENC_H264_ADAPTIVE_TRANSFORM_ENABLE;
1322  h264->fmoMode = NV_ENC_H264_FMO_DISABLE;
1323  }
1324 #endif
1325 
1326  if (ctx->flags & NVENC_LOSSLESS) {
1327  h264->qpPrimeYZeroTransformBypassFlag = 1;
1328  } else {
1329  switch(ctx->profile) {
1331  cc->profileGUID = NV_ENC_H264_PROFILE_BASELINE_GUID;
1333  break;
1335  cc->profileGUID = NV_ENC_H264_PROFILE_MAIN_GUID;
1336  avctx->profile = AV_PROFILE_H264_MAIN;
1337  break;
1339  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_GUID;
1340  avctx->profile = AV_PROFILE_H264_HIGH;
1341  break;
1342 #ifdef NVENC_HAVE_H264_10BIT_SUPPORT
1343  case NV_ENC_H264_PROFILE_HIGH_10:
1344  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_10_GUID;
1346  break;
1347 #endif
1348 #ifdef NVENC_HAVE_422_SUPPORT
1349  case NV_ENC_H264_PROFILE_HIGH_422:
1350  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_422_GUID;
1352  break;
1353 #endif
1355  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_444_GUID;
1357  break;
1358  }
1359  }
1360 
1361 #ifdef NVENC_HAVE_H264_10BIT_SUPPORT
1362  // force setting profile as high10 if input is 10 bit or if it should be encoded as 10 bit
1363  if (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) {
1364  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_10_GUID;
1366  }
1367 #endif
1368 
1369  // force setting profile as high444p if input is AV_PIX_FMT_YUV444P
1370  if (IS_YUV444(ctx->data_pix_fmt)) {
1371  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_444_GUID;
1373  }
1374 
1375 #ifdef NVENC_HAVE_422_SUPPORT
1376  // force setting profile as high422p if input is AV_PIX_FMT_YUV422P
1377  if (IS_YUV422(ctx->data_pix_fmt)) {
1378  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_422_GUID;
1380  }
1381 #endif
1382 
1383  vui->bitstreamRestrictionFlag = cc->gopLength != 1 || avctx->profile < AV_PROFILE_H264_HIGH;
1384 
1385  h264->chromaFormatIDC = IS_YUV444(ctx->data_pix_fmt) ? 3 : IS_YUV422(ctx->data_pix_fmt) ? 2 : 1;
1386 
1387  h264->level = ctx->level;
1388 
1389 #ifdef NVENC_HAVE_NEW_BIT_DEPTH_API
1390  h264->inputBitDepth = IS_10BIT(ctx->data_pix_fmt) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1391  h264->outputBitDepth = (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1392 #endif
1393 
1394  if (ctx->coder >= 0)
1395  h264->entropyCodingMode = ctx->coder;
1396 
1397 #ifdef NVENC_HAVE_BFRAME_REF_MODE
1398  if (ctx->b_ref_mode >= 0)
1399  h264->useBFramesAsRef = ctx->b_ref_mode;
1400 #endif
1401 
1402 #ifdef NVENC_HAVE_MULTIPLE_REF_FRAMES
1403  h264->numRefL0 = avctx->refs;
1404  h264->numRefL1 = avctx->refs;
1405 #endif
1406 
1407 #ifdef NVENC_HAVE_H264_AND_AV1_TEMPORAL_FILTER
1408  if (ctx->tf_level >= 0) {
1409  h264->tfLevel = ctx->tf_level;
1410 
1411  switch (ctx->tf_level)
1412  {
1413  case NV_ENC_TEMPORAL_FILTER_LEVEL_0:
1414  case NV_ENC_TEMPORAL_FILTER_LEVEL_4:
1415  break;
1416  default:
1417  av_log(avctx, AV_LOG_ERROR, "Invalid temporal filtering level.\n");
1418  return AVERROR(EINVAL);
1419  }
1420 
1421  if (ctx->encode_config.frameIntervalP < 5)
1422  av_log(avctx, AV_LOG_WARNING, "Temporal filtering needs at least 4 B-Frames (-bf 4).\n");
1423  }
1424 #endif
1425 
1426 #ifdef NVENC_HAVE_TIME_CODE
1427  if (ctx->s12m_tc)
1428  h264->enableTimeCode = 1;
1429 #endif
1430 
1431  return 0;
1432 }
1433 
1435 {
1436  NvencContext *ctx = avctx->priv_data;
1437  NV_ENC_CONFIG *cc = &ctx->encode_config;
1438  NV_ENC_CONFIG_HEVC *hevc = &cc->encodeCodecConfig.hevcConfig;
1439  NV_ENC_CONFIG_HEVC_VUI_PARAMETERS *vui = &hevc->hevcVUIParameters;
1440 
1441  const AVPixFmtDescriptor *pixdesc = av_pix_fmt_desc_get(ctx->data_pix_fmt);
1442 
1443  if ((pixdesc->flags & AV_PIX_FMT_FLAG_RGB) && !IS_GBRP(ctx->data_pix_fmt)) {
1444  vui->colourMatrix = AVCOL_SPC_BT470BG;
1445  vui->colourPrimaries = avctx->color_primaries;
1446  vui->transferCharacteristics = avctx->color_trc;
1447  vui->videoFullRangeFlag = 0;
1448  } else {
1449  vui->colourMatrix = IS_GBRP(ctx->data_pix_fmt) ? AVCOL_SPC_RGB : avctx->colorspace;
1450  vui->colourPrimaries = avctx->color_primaries;
1451  vui->transferCharacteristics = avctx->color_trc;
1452  vui->videoFullRangeFlag = (avctx->color_range == AVCOL_RANGE_JPEG
1453  || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
1454  }
1455 
1456  vui->colourDescriptionPresentFlag =
1457  (vui->colourMatrix != 2 || vui->colourPrimaries != 2 || vui->transferCharacteristics != 2);
1458 
1459  vui->videoSignalTypePresentFlag =
1460  (vui->colourDescriptionPresentFlag
1461  || vui->videoFormat != 5
1462  || vui->videoFullRangeFlag != 0);
1463 
1464  if (ctx->max_slice_size > 0) {
1465  hevc->sliceMode = 1;
1466  hevc->sliceModeData = ctx->max_slice_size;
1467  } else {
1468  hevc->sliceMode = 3;
1469  hevc->sliceModeData = avctx->slices > 0 ? avctx->slices : 1;
1470  }
1471 
1472  if (ctx->intra_refresh) {
1473  hevc->enableIntraRefresh = 1;
1474  hevc->intraRefreshPeriod = cc->gopLength;
1475  hevc->intraRefreshCnt = cc->gopLength - 1;
1476  cc->gopLength = NVENC_INFINITE_GOPLENGTH;
1477 #ifdef NVENC_HAVE_HEVC_OUTPUT_RECOVERY_POINT_SEI
1478  hevc->outputRecoveryPointSEI = 1;
1479 #endif
1480 #ifdef NVENC_HAVE_SINGLE_SLICE_INTRA_REFRESH
1481  hevc->singleSliceIntraRefresh = ctx->single_slice_intra_refresh;
1482 #endif
1483  }
1484 
1485 #ifdef NVENC_HAVE_HEVC_AND_AV1_MASTERING_METADATA
1486  ctx->mdm = hevc->outputMasteringDisplay = !!av_frame_side_data_get(avctx->decoded_side_data,
1487  avctx->nb_decoded_side_data,
1489  ctx->cll = hevc->outputMaxCll = !!av_frame_side_data_get(avctx->decoded_side_data,
1490  avctx->nb_decoded_side_data,
1492 #endif
1493 
1494 #ifdef NVENC_HAVE_HEVC_CONSTRAINED_ENCODING
1495  if (ctx->constrained_encoding)
1496  hevc->enableConstrainedEncoding = 1;
1497 #endif
1498 
1499  hevc->disableSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 1 : 0;
1500  hevc->repeatSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 0 : 1;
1501  hevc->outputAUD = ctx->aud;
1502 
1503  if (ctx->dpb_size >= 0) {
1504  /* 0 means "let the hardware decide" */
1505  hevc->maxNumRefFramesInDPB = ctx->dpb_size;
1506  }
1507 
1508  hevc->idrPeriod = cc->gopLength;
1509 
1510  if (IS_CBR(cc->rcParams.rateControlMode)) {
1511  /* Older SDKs use outputBufferingPeriodSEI to control filler data */
1512  hevc->outputBufferingPeriodSEI = ctx->cbr_padding;
1513 
1514 #ifdef NVENC_HAVE_FILLER_DATA
1515  hevc->enableFillerDataInsertion = ctx->cbr_padding;
1516 #endif
1517  }
1518 
1519  hevc->outputPictureTimingSEI = 1;
1520 
1521  switch (ctx->profile) {
1523  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN_GUID;
1524  avctx->profile = AV_PROFILE_HEVC_MAIN;
1525  break;
1527  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN10_GUID;
1529  break;
1531  cc->profileGUID = NV_ENC_HEVC_PROFILE_FREXT_GUID;
1532  avctx->profile = AV_PROFILE_HEVC_REXT;
1533  break;
1534  }
1535 
1536  // force setting profile as main10 if input is 10 bit or if it should be encoded as 10 bit
1537  if (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) {
1538  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN10_GUID;
1540  }
1541 
1542  // force setting profile as rext if input is yuv444 or yuv422
1543  if (IS_YUV444(ctx->data_pix_fmt) || IS_YUV422(ctx->data_pix_fmt)) {
1544  cc->profileGUID = NV_ENC_HEVC_PROFILE_FREXT_GUID;
1545  avctx->profile = AV_PROFILE_HEVC_REXT;
1546  }
1547 
1548  hevc->chromaFormatIDC = IS_YUV444(ctx->data_pix_fmt) ? 3 : IS_YUV422(ctx->data_pix_fmt) ? 2 : 1;
1549 
1550 #ifdef NVENC_HAVE_NEW_BIT_DEPTH_API
1551  hevc->inputBitDepth = IS_10BIT(ctx->data_pix_fmt) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1552  hevc->outputBitDepth = (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1553 #else
1554  hevc->pixelBitDepthMinus8 = IS_10BIT(ctx->data_pix_fmt) ? 2 : 0;
1555 #endif
1556 
1557  hevc->level = ctx->level;
1558 
1559  hevc->tier = ctx->tier;
1560 
1561 #ifdef NVENC_HAVE_HEVC_BFRAME_REF_MODE
1562  if (ctx->b_ref_mode >= 0)
1563  hevc->useBFramesAsRef = ctx->b_ref_mode;
1564 #endif
1565 
1566 #ifdef NVENC_HAVE_MULTIPLE_REF_FRAMES
1567  hevc->numRefL0 = avctx->refs;
1568  hevc->numRefL1 = avctx->refs;
1569 #endif
1570 
1571 #ifdef NVENC_HAVE_TEMPORAL_FILTER
1572  if (ctx->tf_level >= 0) {
1573  hevc->tfLevel = ctx->tf_level;
1574 
1575  switch (ctx->tf_level)
1576  {
1577  case NV_ENC_TEMPORAL_FILTER_LEVEL_0:
1578  case NV_ENC_TEMPORAL_FILTER_LEVEL_4:
1579  break;
1580  default:
1581  av_log(avctx, AV_LOG_ERROR, "Invalid temporal filtering level.\n");
1582  return AVERROR(EINVAL);
1583  }
1584 
1585  if (ctx->encode_config.frameIntervalP < 5)
1586  av_log(avctx, AV_LOG_WARNING, "Temporal filtering needs at least 4 B-Frames (-bf 4).\n");
1587  }
1588 #endif
1589 
1590  return 0;
1591 }
1592 
1593 #if CONFIG_AV1_NVENC_ENCODER
1594 static av_cold int nvenc_setup_av1_config(AVCodecContext *avctx)
1595 {
1596  NvencContext *ctx = avctx->priv_data;
1597  NV_ENC_CONFIG *cc = &ctx->encode_config;
1598  NV_ENC_CONFIG_AV1 *av1 = &cc->encodeCodecConfig.av1Config;
1599 
1600  const AVPixFmtDescriptor *pixdesc = av_pix_fmt_desc_get(ctx->data_pix_fmt);
1601 
1602  if ((pixdesc->flags & AV_PIX_FMT_FLAG_RGB) && !IS_GBRP(ctx->data_pix_fmt)) {
1603  av1->matrixCoefficients = AVCOL_SPC_BT470BG;
1604  av1->colorPrimaries = avctx->color_primaries;
1605  av1->transferCharacteristics = avctx->color_trc;
1606  av1->colorRange = 0;
1607  } else {
1608  av1->matrixCoefficients = IS_GBRP(ctx->data_pix_fmt) ? AVCOL_SPC_RGB : avctx->colorspace;
1609  av1->colorPrimaries = avctx->color_primaries;
1610  av1->transferCharacteristics = avctx->color_trc;
1611  av1->colorRange = (avctx->color_range == AVCOL_RANGE_JPEG
1612  || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
1613  }
1614 
1615  if (IS_YUV444(ctx->data_pix_fmt)) {
1616  av_log(avctx, AV_LOG_ERROR, "AV1 High Profile not supported, required for 4:4:4 encoding\n");
1617  return AVERROR(ENOTSUP);
1618  } else {
1619  cc->profileGUID = NV_ENC_AV1_PROFILE_MAIN_GUID;
1620  avctx->profile = AV_PROFILE_AV1_MAIN;
1621  }
1622 
1623  if (ctx->dpb_size >= 0) {
1624  /* 0 means "let the hardware decide" */
1625  av1->maxNumRefFramesInDPB = ctx->dpb_size;
1626  }
1627 
1628  if (ctx->intra_refresh) {
1629  av1->enableIntraRefresh = 1;
1630  av1->intraRefreshPeriod = cc->gopLength;
1631  av1->intraRefreshCnt = cc->gopLength - 1;
1632  cc->gopLength = NVENC_INFINITE_GOPLENGTH;
1633  }
1634 
1635  av1->idrPeriod = cc->gopLength;
1636 
1637  if (IS_CBR(cc->rcParams.rateControlMode)) {
1638  av1->enableBitstreamPadding = ctx->cbr_padding;
1639  }
1640 
1641  if (ctx->tile_cols >= 0)
1642  av1->numTileColumns = ctx->tile_cols;
1643  if (ctx->tile_rows >= 0)
1644  av1->numTileRows = ctx->tile_rows;
1645 
1646  av1->outputAnnexBFormat = 0;
1647 
1648  av1->level = ctx->level;
1649  av1->tier = ctx->tier;
1650 
1651  av1->enableTimingInfo = ctx->timing_info;
1652 
1653  /* mp4 encapsulation requires sequence headers to be present on all keyframes for AV1 */
1654  av1->disableSeqHdr = 0;
1655  av1->repeatSeqHdr = 1;
1656 
1657  av1->chromaFormatIDC = IS_YUV444(ctx->data_pix_fmt) ? 3 : 1;
1658 
1659 #ifdef NVENC_HAVE_NEW_BIT_DEPTH_API
1660  av1->inputBitDepth = IS_10BIT(ctx->data_pix_fmt) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1661  av1->outputBitDepth = (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1662 #else
1663  av1->inputPixelBitDepthMinus8 = IS_10BIT(ctx->data_pix_fmt) ? 2 : 0;
1664  av1->pixelBitDepthMinus8 = (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) ? 2 : 0;
1665 #endif
1666 
1667 #ifdef NVENC_HAVE_HEVC_AND_AV1_MASTERING_METADATA
1668  ctx->mdm = av1->outputMasteringDisplay = !!av_frame_side_data_get(avctx->decoded_side_data,
1669  avctx->nb_decoded_side_data,
1671  ctx->cll = av1->outputMaxCll = !!av_frame_side_data_get(avctx->decoded_side_data,
1672  avctx->nb_decoded_side_data,
1674 #endif
1675 
1676  if (ctx->b_ref_mode >= 0)
1677  av1->useBFramesAsRef = ctx->b_ref_mode;
1678 
1679  av1->numFwdRefs = avctx->refs;
1680  av1->numBwdRefs = avctx->refs;
1681 
1682 #ifdef NVENC_HAVE_H264_AND_AV1_TEMPORAL_FILTER
1683  if (ctx->tf_level >= 0) {
1684  av1->tfLevel = ctx->tf_level;
1685 
1686  switch (ctx->tf_level)
1687  {
1688  case NV_ENC_TEMPORAL_FILTER_LEVEL_0:
1689  case NV_ENC_TEMPORAL_FILTER_LEVEL_4:
1690  break;
1691  default:
1692  av_log(avctx, AV_LOG_ERROR, "Invalid temporal filtering level.\n");
1693  return AVERROR(EINVAL);
1694  }
1695 
1696  if (ctx->encode_config.frameIntervalP < 5)
1697  av_log(avctx, AV_LOG_WARNING, "Temporal filtering needs at least 4 B-Frames (-bf 4).\n");
1698  }
1699 #endif
1700 
1701  return 0;
1702 }
1703 #endif
1704 
1706 {
1707  switch (avctx->codec->id) {
1708  case AV_CODEC_ID_H264:
1709  return nvenc_setup_h264_config(avctx);
1710  case AV_CODEC_ID_HEVC:
1711  return nvenc_setup_hevc_config(avctx);
1712 #if CONFIG_AV1_NVENC_ENCODER
1713  case AV_CODEC_ID_AV1:
1714  return nvenc_setup_av1_config(avctx);
1715 #endif
1716  /* Earlier switch/case will return if unknown codec is passed. */
1717  }
1718 
1719  return 0;
1720 }
1721 
1722 static void compute_dar(AVCodecContext *avctx, int *dw, int *dh) {
1723  int sw, sh;
1724 
1725  sw = avctx->width;
1726  sh = avctx->height;
1727 
1728 #if CONFIG_AV1_NVENC_ENCODER
1729  if (avctx->codec->id == AV_CODEC_ID_AV1) {
1730  /* For AV1 we actually need to calculate the render width/height, not the dar */
1731  if (avctx->sample_aspect_ratio.num > 0 && avctx->sample_aspect_ratio.den > 0
1732  && avctx->sample_aspect_ratio.num != avctx->sample_aspect_ratio.den)
1733  {
1734  if (avctx->sample_aspect_ratio.num > avctx->sample_aspect_ratio.den) {
1735  sw = av_rescale(sw, avctx->sample_aspect_ratio.num, avctx->sample_aspect_ratio.den);
1736  } else {
1737  sh = av_rescale(sh, avctx->sample_aspect_ratio.den, avctx->sample_aspect_ratio.num);
1738  }
1739  }
1740 
1741  *dw = sw;
1742  *dh = sh;
1743  return;
1744  }
1745 #endif
1746 
1747  if (avctx->sample_aspect_ratio.num > 0 && avctx->sample_aspect_ratio.den > 0) {
1748  sw *= avctx->sample_aspect_ratio.num;
1749  sh *= avctx->sample_aspect_ratio.den;
1750  }
1751 
1752  av_reduce(dw, dh, sw, sh, 1024 * 1024);
1753 }
1754 
1756 {
1757  NvencContext *ctx = avctx->priv_data;
1758  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1759  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1760 
1761  NV_ENC_PRESET_CONFIG preset_config = { 0 };
1762  NVENCSTATUS nv_status = NV_ENC_SUCCESS;
1763  AVCPBProperties *cpb_props;
1764  int res = 0;
1765  int dw, dh;
1766 
1767  ctx->encode_config.version = NV_ENC_CONFIG_VER;
1768  ctx->init_encode_params.version = NV_ENC_INITIALIZE_PARAMS_VER;
1769 
1770  ctx->init_encode_params.encodeHeight = avctx->height;
1771  ctx->init_encode_params.encodeWidth = avctx->width;
1772 
1773  ctx->init_encode_params.encodeConfig = &ctx->encode_config;
1774 
1775  preset_config.version = NV_ENC_PRESET_CONFIG_VER;
1776  preset_config.presetCfg.version = NV_ENC_CONFIG_VER;
1777 
1778 #ifdef NVENC_HAVE_NEW_PRESETS
1779  ctx->init_encode_params.tuningInfo = ctx->tuning_info;
1780 
1781  if (ctx->flags & NVENC_LOSSLESS)
1782  ctx->init_encode_params.tuningInfo = NV_ENC_TUNING_INFO_LOSSLESS;
1783  else if (ctx->flags & NVENC_LOWLATENCY)
1784  ctx->init_encode_params.tuningInfo = NV_ENC_TUNING_INFO_LOW_LATENCY;
1785 
1786  nv_status = p_nvenc->nvEncGetEncodePresetConfigEx(ctx->nvencoder,
1787  ctx->init_encode_params.encodeGUID,
1788  ctx->init_encode_params.presetGUID,
1789  ctx->init_encode_params.tuningInfo,
1790  &preset_config);
1791 #else
1792  nv_status = p_nvenc->nvEncGetEncodePresetConfig(ctx->nvencoder,
1793  ctx->init_encode_params.encodeGUID,
1794  ctx->init_encode_params.presetGUID,
1795  &preset_config);
1796 #endif
1797  if (nv_status != NV_ENC_SUCCESS)
1798  return nvenc_print_error(avctx, nv_status, "Cannot get the preset configuration");
1799 
1800  memcpy(&ctx->encode_config, &preset_config.presetCfg, sizeof(ctx->encode_config));
1801 
1802  ctx->encode_config.version = NV_ENC_CONFIG_VER;
1803 
1804  compute_dar(avctx, &dw, &dh);
1805  ctx->init_encode_params.darHeight = dh;
1806  ctx->init_encode_params.darWidth = dw;
1807 
1808  if (avctx->framerate.num > 0 && avctx->framerate.den > 0) {
1809  ctx->init_encode_params.frameRateNum = avctx->framerate.num;
1810  ctx->init_encode_params.frameRateDen = avctx->framerate.den;
1811  } else {
1812  ctx->init_encode_params.frameRateNum = avctx->time_base.den;
1813  ctx->init_encode_params.frameRateDen = avctx->time_base.num;
1814  }
1815 
1816 #ifdef NVENC_HAVE_UNIDIR_B
1817  ctx->init_encode_params.enableUniDirectionalB = ctx->unidir_b;
1818 #endif
1819 
1820  ctx->init_encode_params.enableEncodeAsync = 0;
1821  ctx->init_encode_params.enablePTD = 1;
1822 
1823 #ifdef NVENC_HAVE_NEW_PRESETS
1824  /* If lookahead isn't set from CLI, use value from preset.
1825  * P6 & P7 presets may enable lookahead for better quality.
1826  * */
1827  if (ctx->rc_lookahead == 0 && ctx->encode_config.rcParams.enableLookahead)
1828  ctx->rc_lookahead = ctx->encode_config.rcParams.lookaheadDepth;
1829 #endif
1830 
1831  if (ctx->weighted_pred == 1)
1832  ctx->init_encode_params.enableWeightedPrediction = 1;
1833 
1834 #ifdef NVENC_HAVE_SPLIT_FRAME_ENCODING
1835  ctx->init_encode_params.splitEncodeMode = ctx->split_encode_mode;
1836 
1837  if (ctx->split_encode_mode != NV_ENC_SPLIT_DISABLE_MODE) {
1838  if (avctx->codec->id == AV_CODEC_ID_HEVC && ctx->weighted_pred == 1)
1839  av_log(avctx, AV_LOG_WARNING, "Split encoding not supported with weighted prediction enabled.\n");
1840  }
1841 #endif
1842 
1843  if (ctx->bluray_compat) {
1844  ctx->aud = 1;
1845  ctx->dpb_size = FFMIN(FFMAX(avctx->refs, 0), 6);
1846  avctx->max_b_frames = FFMIN(avctx->max_b_frames, 3);
1847  switch (avctx->codec->id) {
1848  case AV_CODEC_ID_H264:
1849  /* maximum level depends on used resolution */
1850  break;
1851  case AV_CODEC_ID_HEVC:
1852  ctx->level = NV_ENC_LEVEL_HEVC_51;
1853  ctx->tier = NV_ENC_TIER_HEVC_HIGH;
1854  break;
1855  }
1856  }
1857 
1858  if (avctx->gop_size > 0) {
1859  // only overwrite preset if a GOP size was selected as input
1860  ctx->encode_config.gopLength = avctx->gop_size;
1861  } else if (avctx->gop_size == 0) {
1862  ctx->encode_config.frameIntervalP = 0;
1863  ctx->encode_config.gopLength = 1;
1864  }
1865 
1866  if (avctx->max_b_frames >= 0 && ctx->encode_config.gopLength > 1) {
1867  /* 0 is intra-only, 1 is I/P only, 2 is one B-Frame, 3 two B-frames, and so on. */
1868  ctx->encode_config.frameIntervalP = avctx->max_b_frames + 1;
1869  }
1870 
1871  /* force to enable intra refresh */
1872  if(ctx->single_slice_intra_refresh)
1873  ctx->intra_refresh = 1;
1874 
1875  nvenc_recalc_surfaces(avctx);
1876 
1877  res = nvenc_setup_rate_control(avctx);
1878  if (res < 0)
1879  return res;
1880 
1881  if (avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
1882  ctx->encode_config.frameFieldMode = NV_ENC_PARAMS_FRAME_FIELD_MODE_FIELD;
1883  } else {
1884  ctx->encode_config.frameFieldMode = NV_ENC_PARAMS_FRAME_FIELD_MODE_FRAME;
1885  }
1886 
1887  res = nvenc_setup_codec_config(avctx);
1888  if (res)
1889  return res;
1890 
1891  res = nvenc_push_context(avctx);
1892  if (res < 0)
1893  return res;
1894 
1895  nv_status = p_nvenc->nvEncInitializeEncoder(ctx->nvencoder, &ctx->init_encode_params);
1896  if (nv_status != NV_ENC_SUCCESS) {
1897  nvenc_pop_context(avctx);
1898  return nvenc_print_error(avctx, nv_status, "InitializeEncoder failed");
1899  }
1900 
1901 #ifdef NVENC_HAVE_CUSTREAM_PTR
1902  if (ctx->cu_context) {
1903  nv_status = p_nvenc->nvEncSetIOCudaStreams(ctx->nvencoder, &ctx->cu_stream, &ctx->cu_stream);
1904  if (nv_status != NV_ENC_SUCCESS) {
1905  nvenc_pop_context(avctx);
1906  return nvenc_print_error(avctx, nv_status, "SetIOCudaStreams failed");
1907  }
1908  }
1909 #endif
1910 
1911  res = nvenc_pop_context(avctx);
1912  if (res < 0)
1913  return res;
1914 
1915  if (ctx->encode_config.frameIntervalP > 1)
1916  avctx->has_b_frames = 2;
1917 
1918  if (ctx->encode_config.rcParams.averageBitRate > 0)
1919  avctx->bit_rate = ctx->encode_config.rcParams.averageBitRate;
1920 
1921  cpb_props = ff_encode_add_cpb_side_data(avctx);
1922  if (!cpb_props)
1923  return AVERROR(ENOMEM);
1924  cpb_props->max_bitrate = ctx->encode_config.rcParams.maxBitRate;
1925  cpb_props->avg_bitrate = avctx->bit_rate;
1926  cpb_props->buffer_size = ctx->encode_config.rcParams.vbvBufferSize;
1927 
1928  return 0;
1929 }
1930 
1931 static NV_ENC_BUFFER_FORMAT nvenc_map_buffer_format(enum AVPixelFormat pix_fmt)
1932 {
1933  switch (pix_fmt) {
1934  case AV_PIX_FMT_YUV420P:
1935  return NV_ENC_BUFFER_FORMAT_YV12;
1936  case AV_PIX_FMT_NV12:
1937  return NV_ENC_BUFFER_FORMAT_NV12;
1938  case AV_PIX_FMT_P010:
1939  case AV_PIX_FMT_P016:
1940  return NV_ENC_BUFFER_FORMAT_YUV420_10BIT;
1941  case AV_PIX_FMT_GBRP:
1942  case AV_PIX_FMT_YUV444P:
1943  return NV_ENC_BUFFER_FORMAT_YUV444;
1944  case AV_PIX_FMT_GBRP16:
1945  case AV_PIX_FMT_YUV444P16:
1946  return NV_ENC_BUFFER_FORMAT_YUV444_10BIT;
1947  case AV_PIX_FMT_0RGB32:
1948  case AV_PIX_FMT_RGB32:
1949  return NV_ENC_BUFFER_FORMAT_ARGB;
1950  case AV_PIX_FMT_0BGR32:
1951  case AV_PIX_FMT_BGR32:
1952  return NV_ENC_BUFFER_FORMAT_ABGR;
1953  case AV_PIX_FMT_X2RGB10:
1954  return NV_ENC_BUFFER_FORMAT_ARGB10;
1955  case AV_PIX_FMT_X2BGR10:
1956  return NV_ENC_BUFFER_FORMAT_ABGR10;
1957 #ifdef NVENC_HAVE_422_SUPPORT
1958  case AV_PIX_FMT_NV16:
1959  return NV_ENC_BUFFER_FORMAT_NV16;
1960  case AV_PIX_FMT_P210:
1961  case AV_PIX_FMT_P216:
1962  return NV_ENC_BUFFER_FORMAT_P210;
1963 #endif
1964  default:
1965  return NV_ENC_BUFFER_FORMAT_UNDEFINED;
1966  }
1967 }
1968 
1969 static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
1970 {
1971  NvencContext *ctx = avctx->priv_data;
1972  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1973  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1974  NvencSurface* tmp_surface = &ctx->surfaces[idx];
1975 
1976  NVENCSTATUS nv_status;
1977  NV_ENC_CREATE_BITSTREAM_BUFFER allocOut = { 0 };
1978  allocOut.version = NV_ENC_CREATE_BITSTREAM_BUFFER_VER;
1979 
1980  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
1981  ctx->surfaces[idx].in_ref = av_frame_alloc();
1982  if (!ctx->surfaces[idx].in_ref)
1983  return AVERROR(ENOMEM);
1984  } else {
1985  NV_ENC_CREATE_INPUT_BUFFER allocSurf = { 0 };
1986 
1987  ctx->surfaces[idx].format = nvenc_map_buffer_format(ctx->data_pix_fmt);
1988  if (ctx->surfaces[idx].format == NV_ENC_BUFFER_FORMAT_UNDEFINED) {
1989  av_log(avctx, AV_LOG_FATAL, "Invalid input pixel format: %s\n",
1990  av_get_pix_fmt_name(ctx->data_pix_fmt));
1991  return AVERROR(EINVAL);
1992  }
1993 
1994  allocSurf.version = NV_ENC_CREATE_INPUT_BUFFER_VER;
1995  allocSurf.width = avctx->width;
1996  allocSurf.height = avctx->height;
1997  allocSurf.bufferFmt = ctx->surfaces[idx].format;
1998 
1999  nv_status = p_nvenc->nvEncCreateInputBuffer(ctx->nvencoder, &allocSurf);
2000  if (nv_status != NV_ENC_SUCCESS) {
2001  return nvenc_print_error(avctx, nv_status, "CreateInputBuffer failed");
2002  }
2003 
2004  ctx->surfaces[idx].input_surface = allocSurf.inputBuffer;
2005  ctx->surfaces[idx].width = allocSurf.width;
2006  ctx->surfaces[idx].height = allocSurf.height;
2007  }
2008 
2009  nv_status = p_nvenc->nvEncCreateBitstreamBuffer(ctx->nvencoder, &allocOut);
2010  if (nv_status != NV_ENC_SUCCESS) {
2011  int err = nvenc_print_error(avctx, nv_status, "CreateBitstreamBuffer failed");
2012  if (avctx->pix_fmt != AV_PIX_FMT_CUDA && avctx->pix_fmt != AV_PIX_FMT_D3D11)
2013  p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[idx].input_surface);
2014  av_frame_free(&ctx->surfaces[idx].in_ref);
2015  return err;
2016  }
2017 
2018  ctx->surfaces[idx].output_surface = allocOut.bitstreamBuffer;
2019 
2020  av_fifo_write(ctx->unused_surface_queue, &tmp_surface, 1);
2021 
2022  return 0;
2023 }
2024 
2026 {
2027  NvencContext *ctx = avctx->priv_data;
2028  int i, res = 0, res2;
2029 
2030  ctx->surfaces = av_calloc(ctx->nb_surfaces, sizeof(*ctx->surfaces));
2031  if (!ctx->surfaces)
2032  return AVERROR(ENOMEM);
2033 
2034  ctx->frame_data_array = av_calloc(ctx->frame_data_array_nb, sizeof(*ctx->frame_data_array));
2035  if (!ctx->frame_data_array)
2036  return AVERROR(ENOMEM);
2037 
2038  ctx->timestamp_list = av_fifo_alloc2(ctx->nb_surfaces + ctx->encode_config.frameIntervalP,
2039  sizeof(int64_t), 0);
2040  if (!ctx->timestamp_list)
2041  return AVERROR(ENOMEM);
2042 
2043  ctx->unused_surface_queue = av_fifo_alloc2(ctx->nb_surfaces, sizeof(NvencSurface*), 0);
2044  if (!ctx->unused_surface_queue)
2045  return AVERROR(ENOMEM);
2046 
2047  ctx->output_surface_queue = av_fifo_alloc2(ctx->nb_surfaces, sizeof(NvencSurface*), 0);
2048  if (!ctx->output_surface_queue)
2049  return AVERROR(ENOMEM);
2050  ctx->output_surface_ready_queue = av_fifo_alloc2(ctx->nb_surfaces, sizeof(NvencSurface*), 0);
2051  if (!ctx->output_surface_ready_queue)
2052  return AVERROR(ENOMEM);
2053 
2054  res = nvenc_push_context(avctx);
2055  if (res < 0)
2056  return res;
2057 
2058  for (i = 0; i < ctx->nb_surfaces; i++) {
2059  if ((res = nvenc_alloc_surface(avctx, i)) < 0)
2060  goto fail;
2061  }
2062 
2063 fail:
2064  res2 = nvenc_pop_context(avctx);
2065  if (res2 < 0)
2066  return res2;
2067 
2068  return res;
2069 }
2070 
2072 {
2073  NvencContext *ctx = avctx->priv_data;
2074  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2075  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2076 
2077  NVENCSTATUS nv_status;
2078  uint32_t outSize = 0;
2079  char tmpHeader[NV_MAX_SEQ_HDR_LEN];
2080 
2081  NV_ENC_SEQUENCE_PARAM_PAYLOAD payload = { 0 };
2082  payload.version = NV_ENC_SEQUENCE_PARAM_PAYLOAD_VER;
2083 
2084  payload.spsppsBuffer = tmpHeader;
2085  payload.inBufferSize = sizeof(tmpHeader);
2086  payload.outSPSPPSPayloadSize = &outSize;
2087 
2088  nv_status = p_nvenc->nvEncGetSequenceParams(ctx->nvencoder, &payload);
2089  if (nv_status != NV_ENC_SUCCESS) {
2090  return nvenc_print_error(avctx, nv_status, "GetSequenceParams failed");
2091  }
2092 
2093  avctx->extradata_size = outSize;
2095 
2096  if (!avctx->extradata) {
2097  return AVERROR(ENOMEM);
2098  }
2099 
2100  memcpy(avctx->extradata, tmpHeader, outSize);
2101 
2102  return 0;
2103 }
2104 
2106 {
2107  NvencContext *ctx = avctx->priv_data;
2108  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2109  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2110  int i, res;
2111 
2112  /* the encoder has to be flushed before it can be closed */
2113  if (ctx->nvencoder) {
2114  NV_ENC_PIC_PARAMS params = { .version = NV_ENC_PIC_PARAMS_VER,
2115  .encodePicFlags = NV_ENC_PIC_FLAG_EOS };
2116 
2117  res = nvenc_push_context(avctx);
2118  if (res < 0)
2119  return res;
2120 
2121  p_nvenc->nvEncEncodePicture(ctx->nvencoder, &params);
2122  }
2123 
2124  av_fifo_freep2(&ctx->timestamp_list);
2125  av_fifo_freep2(&ctx->output_surface_ready_queue);
2126  av_fifo_freep2(&ctx->output_surface_queue);
2127  av_fifo_freep2(&ctx->unused_surface_queue);
2128 
2129  if (ctx->frame_data_array) {
2130  for (i = 0; i < ctx->frame_data_array_nb; i++)
2131  av_buffer_unref(&ctx->frame_data_array[i].frame_opaque_ref);
2132  av_freep(&ctx->frame_data_array);
2133  }
2134 
2135  if (ctx->surfaces && (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11)) {
2136  for (i = 0; i < ctx->nb_registered_frames; i++) {
2137  if (ctx->registered_frames[i].mapped)
2138  p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, ctx->registered_frames[i].in_map.mappedResource);
2139  if (ctx->registered_frames[i].regptr)
2140  p_nvenc->nvEncUnregisterResource(ctx->nvencoder, ctx->registered_frames[i].regptr);
2141  }
2142  ctx->nb_registered_frames = 0;
2143  }
2144 
2145  if (ctx->surfaces) {
2146  for (i = 0; i < ctx->nb_surfaces; ++i) {
2147  if (avctx->pix_fmt != AV_PIX_FMT_CUDA && avctx->pix_fmt != AV_PIX_FMT_D3D11)
2148  p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[i].input_surface);
2149  av_frame_free(&ctx->surfaces[i].in_ref);
2150  p_nvenc->nvEncDestroyBitstreamBuffer(ctx->nvencoder, ctx->surfaces[i].output_surface);
2151  }
2152  }
2153  av_freep(&ctx->surfaces);
2154  ctx->nb_surfaces = 0;
2155 
2156  av_frame_free(&ctx->frame);
2157 
2158  av_freep(&ctx->sei_data);
2159 
2160  if (ctx->nvencoder) {
2161  p_nvenc->nvEncDestroyEncoder(ctx->nvencoder);
2162 
2163  res = nvenc_pop_context(avctx);
2164  if (res < 0)
2165  return res;
2166  }
2167  ctx->nvencoder = NULL;
2168 
2169  if (ctx->cu_context_internal)
2170  CHECK_CU(dl_fn->cuda_dl->cuCtxDestroy(ctx->cu_context_internal));
2171  ctx->cu_context = ctx->cu_context_internal = NULL;
2172 
2173 #if CONFIG_D3D11VA
2174  if (ctx->d3d11_device) {
2175  ID3D11Device_Release(ctx->d3d11_device);
2176  ctx->d3d11_device = NULL;
2177  }
2178 #endif
2179 
2180  nvenc_free_functions(&dl_fn->nvenc_dl);
2181  cuda_free_functions(&dl_fn->cuda_dl);
2182 
2183  dl_fn->nvenc_device_count = 0;
2184 
2185  av_log(avctx, AV_LOG_VERBOSE, "Nvenc unloaded\n");
2186 
2187  return 0;
2188 }
2189 
2191 {
2192  NvencContext *ctx = avctx->priv_data;
2193  int ret;
2194 
2195  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2196  AVHWFramesContext *frames_ctx;
2197  if (!avctx->hw_frames_ctx) {
2198  av_log(avctx, AV_LOG_ERROR,
2199  "hw_frames_ctx must be set when using GPU frames as input\n");
2200  return AVERROR(EINVAL);
2201  }
2202  frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
2203  if (frames_ctx->format != avctx->pix_fmt) {
2204  av_log(avctx, AV_LOG_ERROR,
2205  "hw_frames_ctx must match the GPU frame type\n");
2206  return AVERROR(EINVAL);
2207  }
2208  ctx->data_pix_fmt = frames_ctx->sw_format;
2209  } else {
2210  ctx->data_pix_fmt = avctx->pix_fmt;
2211  }
2212 
2213  if (ctx->rgb_mode == NVENC_RGB_MODE_DISABLED && IS_RGB(ctx->data_pix_fmt)) {
2214  av_log(avctx, AV_LOG_ERROR, "Packed RGB input, but RGB support is disabled.\n");
2215  return AVERROR(EINVAL);
2216  }
2217 
2218  ctx->frame = av_frame_alloc();
2219  if (!ctx->frame)
2220  return AVERROR(ENOMEM);
2221 
2222  if ((ret = nvenc_load_libraries(avctx)) < 0)
2223  return ret;
2224 
2225  if ((ret = nvenc_setup_device(avctx)) < 0)
2226  return ret;
2227 
2228  if ((ret = nvenc_setup_encoder(avctx)) < 0)
2229  return ret;
2230 
2231  if ((ret = nvenc_setup_surfaces(avctx)) < 0)
2232  return ret;
2233 
2234  if (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) {
2235  if ((ret = nvenc_setup_extradata(avctx)) < 0)
2236  return ret;
2237  }
2238 
2239  return 0;
2240 }
2241 
2243 {
2244  NvencSurface *tmp_surf;
2245 
2246  if (av_fifo_read(ctx->unused_surface_queue, &tmp_surf, 1) < 0)
2247  // queue empty
2248  return NULL;
2249 
2250  return tmp_surf;
2251 }
2252 
2253 static int nvenc_copy_frame(AVCodecContext *avctx, NvencSurface *nv_surface,
2254  NV_ENC_LOCK_INPUT_BUFFER *lock_buffer_params, const AVFrame *frame)
2255 {
2256  int dst_linesize[4] = {
2257  lock_buffer_params->pitch,
2258  lock_buffer_params->pitch,
2259  lock_buffer_params->pitch,
2260  lock_buffer_params->pitch
2261  };
2262  uint8_t *dst_data[4];
2263  int ret;
2264 
2265  if (frame->format == AV_PIX_FMT_YUV420P)
2266  dst_linesize[1] = dst_linesize[2] >>= 1;
2267 
2268  ret = av_image_fill_pointers(dst_data, frame->format, nv_surface->height,
2269  lock_buffer_params->bufferDataPtr, dst_linesize);
2270  if (ret < 0)
2271  return ret;
2272 
2273  if (frame->format == AV_PIX_FMT_YUV420P)
2274  FFSWAP(uint8_t*, dst_data[1], dst_data[2]);
2275 
2276  av_image_copy2(dst_data, dst_linesize,
2277  frame->data, frame->linesize, frame->format,
2278  avctx->width, avctx->height);
2279 
2280  return 0;
2281 }
2282 
2284 {
2285  NvencContext *ctx = avctx->priv_data;
2286  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2287  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2288  NVENCSTATUS nv_status;
2289 
2290  int i, first_round;
2291 
2292  if (ctx->nb_registered_frames == FF_ARRAY_ELEMS(ctx->registered_frames)) {
2293  for (first_round = 1; first_round >= 0; first_round--) {
2294  for (i = 0; i < ctx->nb_registered_frames; i++) {
2295  if (!ctx->registered_frames[i].mapped) {
2296  if (ctx->registered_frames[i].regptr) {
2297  if (first_round)
2298  continue;
2299  nv_status = p_nvenc->nvEncUnregisterResource(ctx->nvencoder, ctx->registered_frames[i].regptr);
2300  if (nv_status != NV_ENC_SUCCESS)
2301  return nvenc_print_error(avctx, nv_status, "Failed unregistering unused input resource");
2302  ctx->registered_frames[i].ptr = NULL;
2303  ctx->registered_frames[i].regptr = NULL;
2304  }
2305  return i;
2306  }
2307  }
2308  }
2309  } else {
2310  return ctx->nb_registered_frames++;
2311  }
2312 
2313  av_log(avctx, AV_LOG_ERROR, "Too many registered CUDA frames\n");
2314  return AVERROR(ENOMEM);
2315 }
2316 
2318 {
2319  NvencContext *ctx = avctx->priv_data;
2320  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2321  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2322 
2323  AVHWFramesContext *frames_ctx = (AVHWFramesContext*)frame->hw_frames_ctx->data;
2324  NV_ENC_REGISTER_RESOURCE reg = { 0 };
2325  int i, idx, ret;
2326 
2327  for (i = 0; i < ctx->nb_registered_frames; i++) {
2328  if (avctx->pix_fmt == AV_PIX_FMT_CUDA && ctx->registered_frames[i].ptr == frame->data[0])
2329  return i;
2330  else if (avctx->pix_fmt == AV_PIX_FMT_D3D11 && ctx->registered_frames[i].ptr == frame->data[0] && ctx->registered_frames[i].ptr_index == (intptr_t)frame->data[1])
2331  return i;
2332  }
2333 
2334  idx = nvenc_find_free_reg_resource(avctx);
2335  if (idx < 0)
2336  return idx;
2337 
2338  reg.version = NV_ENC_REGISTER_RESOURCE_VER;
2339  reg.width = frames_ctx->width;
2340  reg.height = frames_ctx->height;
2341  reg.pitch = frame->linesize[0];
2342  reg.resourceToRegister = frame->data[0];
2343 
2344  if (avctx->pix_fmt == AV_PIX_FMT_CUDA) {
2345  reg.resourceType = NV_ENC_INPUT_RESOURCE_TYPE_CUDADEVICEPTR;
2346  }
2347  else if (avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2348  reg.resourceType = NV_ENC_INPUT_RESOURCE_TYPE_DIRECTX;
2349  reg.subResourceIndex = (intptr_t)frame->data[1];
2350  }
2351 
2352  reg.bufferFormat = nvenc_map_buffer_format(frames_ctx->sw_format);
2353  if (reg.bufferFormat == NV_ENC_BUFFER_FORMAT_UNDEFINED) {
2354  av_log(avctx, AV_LOG_FATAL, "Invalid input pixel format: %s\n",
2355  av_get_pix_fmt_name(frames_ctx->sw_format));
2356  return AVERROR(EINVAL);
2357  }
2358 
2359  ret = p_nvenc->nvEncRegisterResource(ctx->nvencoder, &reg);
2360  if (ret != NV_ENC_SUCCESS) {
2361  nvenc_print_error(avctx, ret, "Error registering an input resource");
2362  return AVERROR_UNKNOWN;
2363  }
2364 
2365  ctx->registered_frames[idx].ptr = frame->data[0];
2366  ctx->registered_frames[idx].ptr_index = reg.subResourceIndex;
2367  ctx->registered_frames[idx].regptr = reg.registeredResource;
2368  return idx;
2369 }
2370 
2372  NvencSurface *nvenc_frame)
2373 {
2374  NvencContext *ctx = avctx->priv_data;
2375  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2376  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2377 
2378  int res;
2379  NVENCSTATUS nv_status;
2380 
2381  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2382  int reg_idx = nvenc_register_frame(avctx, frame);
2383  if (reg_idx < 0) {
2384  av_log(avctx, AV_LOG_ERROR, "Could not register an input HW frame\n");
2385  return reg_idx;
2386  }
2387 
2388  res = av_frame_ref(nvenc_frame->in_ref, frame);
2389  if (res < 0)
2390  return res;
2391 
2392  if (!ctx->registered_frames[reg_idx].mapped) {
2393  ctx->registered_frames[reg_idx].in_map.version = NV_ENC_MAP_INPUT_RESOURCE_VER;
2394  ctx->registered_frames[reg_idx].in_map.registeredResource = ctx->registered_frames[reg_idx].regptr;
2395  nv_status = p_nvenc->nvEncMapInputResource(ctx->nvencoder, &ctx->registered_frames[reg_idx].in_map);
2396  if (nv_status != NV_ENC_SUCCESS) {
2397  av_frame_unref(nvenc_frame->in_ref);
2398  return nvenc_print_error(avctx, nv_status, "Error mapping an input resource");
2399  }
2400  }
2401 
2402  ctx->registered_frames[reg_idx].mapped += 1;
2403 
2404  nvenc_frame->reg_idx = reg_idx;
2405  nvenc_frame->input_surface = ctx->registered_frames[reg_idx].in_map.mappedResource;
2406  nvenc_frame->format = ctx->registered_frames[reg_idx].in_map.mappedBufferFmt;
2407  nvenc_frame->pitch = frame->linesize[0];
2408 
2409  return 0;
2410  } else {
2411  NV_ENC_LOCK_INPUT_BUFFER lockBufferParams = { 0 };
2412 
2413  lockBufferParams.version = NV_ENC_LOCK_INPUT_BUFFER_VER;
2414  lockBufferParams.inputBuffer = nvenc_frame->input_surface;
2415 
2416  nv_status = p_nvenc->nvEncLockInputBuffer(ctx->nvencoder, &lockBufferParams);
2417  if (nv_status != NV_ENC_SUCCESS) {
2418  return nvenc_print_error(avctx, nv_status, "Failed locking nvenc input buffer");
2419  }
2420 
2421  nvenc_frame->pitch = lockBufferParams.pitch;
2422  res = nvenc_copy_frame(avctx, nvenc_frame, &lockBufferParams, frame);
2423 
2424  nv_status = p_nvenc->nvEncUnlockInputBuffer(ctx->nvencoder, nvenc_frame->input_surface);
2425  if (nv_status != NV_ENC_SUCCESS) {
2426  return nvenc_print_error(avctx, nv_status, "Failed unlocking input buffer!");
2427  }
2428 
2429  return res;
2430  }
2431 }
2432 
2433 #ifdef NVENC_HAVE_TIME_CODE
2434 static void nvenc_fill_time_code(AVCodecContext *avctx, const AVFrame *frame, NV_ENC_TIME_CODE *time_code)
2435 {
2437 
2438  if (sd) {
2439  uint32_t *tc = (uint32_t*)sd->data;
2440  int cnt = FFMIN(tc[0], FF_ARRAY_ELEMS(time_code->clockTimestamp));
2441 
2442  switch (cnt) {
2443  case 0:
2444  time_code->displayPicStruct = NV_ENC_PIC_STRUCT_DISPLAY_FRAME;
2445  time_code->skipClockTimestampInsertion = 1;
2446  break;
2447  case 2:
2448  time_code->displayPicStruct = NV_ENC_PIC_STRUCT_DISPLAY_FRAME_DOUBLING;
2449  break;
2450  case 3:
2451  time_code->displayPicStruct = NV_ENC_PIC_STRUCT_DISPLAY_FRAME_TRIPLING;
2452  break;
2453  default:
2454  time_code->displayPicStruct = NV_ENC_PIC_STRUCT_DISPLAY_FRAME;
2455  break;
2456  }
2457 
2458  for (int i = 0; i < cnt; i++) {
2459  unsigned hh, mm, ss, ff, drop;
2460  ff_timecode_set_smpte(&drop, &hh, &mm, &ss, &ff, avctx->framerate, tc[i + 1], 0, 0);
2461 
2462  time_code->clockTimestamp[i].countingType = 0;
2463  time_code->clockTimestamp[i].discontinuityFlag = 0;
2464  time_code->clockTimestamp[i].cntDroppedFrames = drop;
2465  time_code->clockTimestamp[i].nFrames = ff;
2466  time_code->clockTimestamp[i].secondsValue = ss;
2467  time_code->clockTimestamp[i].minutesValue = mm;
2468  time_code->clockTimestamp[i].hoursValue = hh;
2469  time_code->clockTimestamp[i].timeOffset = 0;
2470  }
2471  } else {
2472  time_code->displayPicStruct = NV_ENC_PIC_STRUCT_DISPLAY_FRAME;
2473  time_code->skipClockTimestampInsertion = 1;
2474  }
2475 }
2476 #endif
2477 
2479  NV_ENC_PIC_PARAMS *params,
2480  NV_ENC_SEI_PAYLOAD *sei_data,
2481  int sei_count)
2482 {
2483  NvencContext *ctx = avctx->priv_data;
2484 
2485  switch (avctx->codec->id) {
2486  case AV_CODEC_ID_H264:
2487  params->codecPicParams.h264PicParams.sliceMode =
2488  ctx->encode_config.encodeCodecConfig.h264Config.sliceMode;
2489  params->codecPicParams.h264PicParams.sliceModeData =
2490  ctx->encode_config.encodeCodecConfig.h264Config.sliceModeData;
2491  if (sei_count > 0) {
2492  params->codecPicParams.h264PicParams.seiPayloadArray = sei_data;
2493  params->codecPicParams.h264PicParams.seiPayloadArrayCnt = sei_count;
2494  }
2495 
2496 #ifdef NVENC_HAVE_TIME_CODE
2497  if (ctx->s12m_tc)
2498  nvenc_fill_time_code(avctx, frame, &params->codecPicParams.h264PicParams.timeCode);
2499 #endif
2500 
2501  break;
2502  case AV_CODEC_ID_HEVC:
2503  params->codecPicParams.hevcPicParams.sliceMode =
2504  ctx->encode_config.encodeCodecConfig.hevcConfig.sliceMode;
2505  params->codecPicParams.hevcPicParams.sliceModeData =
2506  ctx->encode_config.encodeCodecConfig.hevcConfig.sliceModeData;
2507  if (sei_count > 0) {
2508  params->codecPicParams.hevcPicParams.seiPayloadArray = sei_data;
2509  params->codecPicParams.hevcPicParams.seiPayloadArrayCnt = sei_count;
2510  }
2511 
2512  break;
2513 #if CONFIG_AV1_NVENC_ENCODER
2514  case AV_CODEC_ID_AV1:
2515  params->codecPicParams.av1PicParams.numTileColumns =
2516  ctx->encode_config.encodeCodecConfig.av1Config.numTileColumns;
2517  params->codecPicParams.av1PicParams.numTileRows =
2518  ctx->encode_config.encodeCodecConfig.av1Config.numTileRows;
2519  if (sei_count > 0) {
2520  params->codecPicParams.av1PicParams.obuPayloadArray = sei_data;
2521  params->codecPicParams.av1PicParams.obuPayloadArrayCnt = sei_count;
2522  }
2523 
2524  break;
2525 #endif
2526  }
2527 }
2528 
2529 static inline void timestamp_queue_enqueue(AVFifo *queue, int64_t timestamp)
2530 {
2531  av_fifo_write(queue, &timestamp, 1);
2532 }
2533 
2535 {
2536  int64_t timestamp = AV_NOPTS_VALUE;
2537  // The following call might fail if the queue is empty.
2538  av_fifo_read(queue, &timestamp, 1);
2539 
2540  return timestamp;
2541 }
2542 
2543 static inline int64_t timestamp_queue_peek(AVFifo *queue, size_t index)
2544 {
2545  int64_t timestamp = AV_NOPTS_VALUE;
2546  av_fifo_peek(queue, &timestamp, 1, index);
2547 
2548  return timestamp;
2549 }
2550 
2552  NV_ENC_LOCK_BITSTREAM *params,
2553  AVPacket *pkt)
2554 {
2555  NvencContext *ctx = avctx->priv_data;
2556  unsigned int delay;
2557  int64_t delay_time;
2558 
2559  pkt->pts = params->outputTimeStamp;
2560 
2561  if (!(avctx->codec_descriptor->props & AV_CODEC_PROP_REORDER)) {
2562  pkt->dts = pkt->pts;
2563  return 0;
2564  }
2565 
2566  // This can be more than necessary, but we don't know the real reorder delay.
2567  delay = FFMAX(ctx->encode_config.frameIntervalP - 1, 0);
2568  if (ctx->output_frame_num >= delay) {
2569  pkt->dts = timestamp_queue_dequeue(ctx->timestamp_list);
2570  ctx->output_frame_num++;
2571  return 0;
2572  }
2573 
2574  delay_time = ctx->initial_delay_time;
2575  if (!delay_time) {
2576  int64_t t1, t2, t3;
2577  t1 = timestamp_queue_peek(ctx->timestamp_list, delay);
2578  t2 = timestamp_queue_peek(ctx->timestamp_list, 0);
2579  t3 = (delay > 1) ? timestamp_queue_peek(ctx->timestamp_list, 1) : t1;
2580 
2581  if (t1 != AV_NOPTS_VALUE) {
2582  delay_time = t1 - t2;
2583  } else if (avctx->framerate.num > 0 && avctx->framerate.den > 0) {
2584  delay_time = av_rescale_q(delay, (AVRational) {avctx->framerate.den, avctx->framerate.num},
2585  avctx->time_base);
2586  } else if (t3 != AV_NOPTS_VALUE) {
2587  delay_time = delay * (t3 - t2);
2588  } else {
2589  delay_time = delay;
2590  }
2591  ctx->initial_delay_time = delay_time;
2592  }
2593 
2594  /* The following method is simple, but doesn't guarantee monotonic with VFR
2595  * when delay_time isn't accurate (that is, t1 == AV_NOPTS_VALUE)
2596  *
2597  * dts = timestamp_queue_peek(ctx->timestamp_list, ctx->output_frame_num) - delay_time
2598  */
2599  pkt->dts = timestamp_queue_peek(ctx->timestamp_list, 0) - delay_time * (delay - ctx->output_frame_num) / delay;
2600  ctx->output_frame_num++;
2601 
2602  return 0;
2603 }
2604 
2605 static int nvenc_store_frame_data(AVCodecContext *avctx, NV_ENC_PIC_PARAMS *pic_params, const AVFrame *frame)
2606 {
2607  NvencContext *ctx = avctx->priv_data;
2608  int res = 0;
2609 
2610  int idx = ctx->frame_data_array_pos;
2611  NvencFrameData *frame_data = &ctx->frame_data_array[idx];
2612 
2613  // in case the encoder got reconfigured, there might be leftovers
2615 
2616  if (frame->opaque_ref && avctx->flags & AV_CODEC_FLAG_COPY_OPAQUE) {
2619  return AVERROR(ENOMEM);
2620  }
2621 
2622  frame_data->duration = frame->duration;
2623  frame_data->frame_opaque = frame->opaque;
2624 
2625  ctx->frame_data_array_pos = (ctx->frame_data_array_pos + 1) % ctx->frame_data_array_nb;
2626  pic_params->inputDuration = idx;
2627 
2628  return res;
2629 }
2630 
2631 static int nvenc_retrieve_frame_data(AVCodecContext *avctx, NV_ENC_LOCK_BITSTREAM *lock_params, AVPacket *pkt)
2632 {
2633  NvencContext *ctx = avctx->priv_data;
2634  int res = 0;
2635 
2636  int idx = lock_params->outputDuration;
2637  NvencFrameData *frame_data = &ctx->frame_data_array[idx];
2638 
2640 
2641  if (avctx->flags & AV_CODEC_FLAG_COPY_OPAQUE) {
2645  }
2646 
2648 
2649  return res;
2650 }
2651 
2653 {
2654  NvencContext *ctx = avctx->priv_data;
2655  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2656  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2657 
2658  NV_ENC_LOCK_BITSTREAM lock_params = { 0 };
2659  NVENCSTATUS nv_status;
2660  int res = 0;
2661 
2662  enum AVPictureType pict_type;
2663 
2664  lock_params.version = NV_ENC_LOCK_BITSTREAM_VER;
2665 
2666  lock_params.doNotWait = 0;
2667  lock_params.outputBitstream = tmpoutsurf->output_surface;
2668 
2669  nv_status = p_nvenc->nvEncLockBitstream(ctx->nvencoder, &lock_params);
2670  if (nv_status != NV_ENC_SUCCESS) {
2671  res = nvenc_print_error(avctx, nv_status, "Failed locking bitstream buffer");
2672  goto error;
2673  }
2674 
2675  res = ff_get_encode_buffer(avctx, pkt, lock_params.bitstreamSizeInBytes, 0);
2676 
2677  if (res < 0) {
2678  p_nvenc->nvEncUnlockBitstream(ctx->nvencoder, tmpoutsurf->output_surface);
2679  goto error;
2680  }
2681 
2682  memcpy(pkt->data, lock_params.bitstreamBufferPtr, lock_params.bitstreamSizeInBytes);
2683 
2684  nv_status = p_nvenc->nvEncUnlockBitstream(ctx->nvencoder, tmpoutsurf->output_surface);
2685  if (nv_status != NV_ENC_SUCCESS) {
2686  res = nvenc_print_error(avctx, nv_status, "Failed unlocking bitstream buffer, expect the gates of mordor to open");
2687  goto error;
2688  }
2689 
2690 
2691  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2692  ctx->registered_frames[tmpoutsurf->reg_idx].mapped -= 1;
2693  if (ctx->registered_frames[tmpoutsurf->reg_idx].mapped == 0) {
2694  nv_status = p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, ctx->registered_frames[tmpoutsurf->reg_idx].in_map.mappedResource);
2695  if (nv_status != NV_ENC_SUCCESS) {
2696  res = nvenc_print_error(avctx, nv_status, "Failed unmapping input resource");
2697  goto error;
2698  }
2699  } else if (ctx->registered_frames[tmpoutsurf->reg_idx].mapped < 0) {
2700  res = AVERROR_BUG;
2701  goto error;
2702  }
2703 
2704  av_frame_unref(tmpoutsurf->in_ref);
2705 
2706  tmpoutsurf->input_surface = NULL;
2707  }
2708 
2709  switch (lock_params.pictureType) {
2710  case NV_ENC_PIC_TYPE_IDR:
2712  case NV_ENC_PIC_TYPE_I:
2713  pict_type = AV_PICTURE_TYPE_I;
2714  break;
2715  case NV_ENC_PIC_TYPE_P:
2716  pict_type = AV_PICTURE_TYPE_P;
2717  break;
2718  case NV_ENC_PIC_TYPE_B:
2719  pict_type = AV_PICTURE_TYPE_B;
2720  break;
2721  case NV_ENC_PIC_TYPE_BI:
2722  pict_type = AV_PICTURE_TYPE_BI;
2723  break;
2724  default:
2725  av_log(avctx, AV_LOG_ERROR, "Unknown picture type encountered, expect the output to be broken.\n");
2726  av_log(avctx, AV_LOG_ERROR, "Please report this error and include as much information on how to reproduce it as possible.\n");
2727  res = AVERROR_EXTERNAL;
2728  goto error;
2729  }
2730 
2732  (lock_params.frameAvgQP - 1) * FF_QP2LAMBDA, NULL, 0, pict_type);
2733 
2734  res = nvenc_set_timestamp(avctx, &lock_params, pkt);
2735  if (res < 0)
2736  goto error2;
2737 
2738  res = nvenc_retrieve_frame_data(avctx, &lock_params, pkt);
2739  if (res < 0)
2740  goto error2;
2741 
2742  return 0;
2743 
2744 error:
2745  timestamp_queue_dequeue(ctx->timestamp_list);
2746 
2747 error2:
2748  return res;
2749 }
2750 
2751 static int output_ready(AVCodecContext *avctx, int flush)
2752 {
2753  NvencContext *ctx = avctx->priv_data;
2754  int nb_ready, nb_pending;
2755 
2756  nb_ready = av_fifo_can_read(ctx->output_surface_ready_queue);
2757  nb_pending = av_fifo_can_read(ctx->output_surface_queue);
2758  if (flush)
2759  return nb_ready > 0;
2760  return (nb_ready > 0) && (nb_ready + nb_pending >= ctx->async_depth);
2761 }
2762 
2764 {
2765  NvencContext *ctx = avctx->priv_data;
2766  int sei_count = 0;
2767  int i, res;
2768 
2770  void *a53_data = NULL;
2771  size_t a53_size = 0;
2772 
2773  if (ff_alloc_a53_sei(frame, 0, &a53_data, &a53_size) < 0) {
2774  av_log(ctx, AV_LOG_ERROR, "Not enough memory for closed captions, skipping\n");
2775  }
2776 
2777  if (a53_data) {
2778  void *tmp = av_fast_realloc(ctx->sei_data,
2779  &ctx->sei_data_size,
2780  (sei_count + 1) * sizeof(*ctx->sei_data));
2781  if (!tmp) {
2782  av_free(a53_data);
2783  res = AVERROR(ENOMEM);
2784  goto error;
2785  } else {
2786  ctx->sei_data = tmp;
2787  ctx->sei_data[sei_count].payloadSize = (uint32_t)a53_size;
2788  ctx->sei_data[sei_count].payload = (uint8_t*)a53_data;
2789 
2790 #if CONFIG_AV1_NVENC_ENCODER
2791  if (avctx->codec->id == AV_CODEC_ID_AV1)
2792  ctx->sei_data[sei_count].payloadType = AV1_METADATA_TYPE_ITUT_T35;
2793  else
2794 #endif
2795  ctx->sei_data[sei_count].payloadType = SEI_TYPE_USER_DATA_REGISTERED_ITU_T_T35;
2796 
2797  sei_count++;
2798  }
2799  }
2800  }
2801 
2803  void *tc_data = NULL;
2804  size_t tc_size = 0;
2805 
2806  if (ff_alloc_timecode_sei(frame, avctx->framerate, 0, &tc_data, &tc_size) < 0) {
2807  av_log(ctx, AV_LOG_ERROR, "Not enough memory for timecode sei, skipping\n");
2808  }
2809 
2810  if (tc_data) {
2811  void *tmp = av_fast_realloc(ctx->sei_data,
2812  &ctx->sei_data_size,
2813  (sei_count + 1) * sizeof(*ctx->sei_data));
2814  if (!tmp) {
2815  av_free(tc_data);
2816  res = AVERROR(ENOMEM);
2817  goto error;
2818  } else {
2819  ctx->sei_data = tmp;
2820  ctx->sei_data[sei_count].payloadSize = (uint32_t)tc_size;
2821  ctx->sei_data[sei_count].payload = (uint8_t*)tc_data;
2822 
2823 #if CONFIG_AV1_NVENC_ENCODER
2824  if (avctx->codec->id == AV_CODEC_ID_AV1)
2825  ctx->sei_data[sei_count].payloadType = AV1_METADATA_TYPE_TIMECODE;
2826  else
2827 #endif
2828  ctx->sei_data[sei_count].payloadType = SEI_TYPE_TIME_CODE;
2829 
2830  sei_count++;
2831  }
2832  }
2833  }
2834 
2835  if (!ctx->udu_sei)
2836  return sei_count;
2837 
2838  for (i = 0; i < frame->nb_side_data; i++) {
2839  AVFrameSideData *side_data = frame->side_data[i];
2840  void *tmp;
2841 
2842  if (side_data->type != AV_FRAME_DATA_SEI_UNREGISTERED)
2843  continue;
2844 
2845  tmp = av_fast_realloc(ctx->sei_data,
2846  &ctx->sei_data_size,
2847  (sei_count + 1) * sizeof(*ctx->sei_data));
2848  if (!tmp) {
2849  res = AVERROR(ENOMEM);
2850  goto error;
2851  } else {
2852  ctx->sei_data = tmp;
2853  ctx->sei_data[sei_count].payloadSize = side_data->size;
2854  ctx->sei_data[sei_count].payloadType = SEI_TYPE_USER_DATA_UNREGISTERED;
2855  ctx->sei_data[sei_count].payload = av_memdup(side_data->data, side_data->size);
2856 
2857  if (!ctx->sei_data[sei_count].payload) {
2858  res = AVERROR(ENOMEM);
2859  goto error;
2860  }
2861 
2862  sei_count++;
2863  }
2864  }
2865 
2866  return sei_count;
2867 
2868 error:
2869  for (i = 0; i < sei_count; i++)
2870  av_freep(&(ctx->sei_data[i].payload));
2871 
2872  return res;
2873 }
2874 
2875 static void reconfig_encoder(AVCodecContext *avctx, const AVFrame *frame)
2876 {
2877  NvencContext *ctx = avctx->priv_data;
2878  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
2879  NVENCSTATUS ret;
2880 
2881  NV_ENC_RECONFIGURE_PARAMS params = { 0 };
2882  int needs_reconfig = 0;
2883  int needs_encode_config = 0;
2884  int reconfig_bitrate = 0, reconfig_dar = 0;
2885  int dw, dh;
2886 
2887  params.version = NV_ENC_RECONFIGURE_PARAMS_VER;
2888  params.reInitEncodeParams = ctx->init_encode_params;
2889 
2890  compute_dar(avctx, &dw, &dh);
2891  if (dw != ctx->init_encode_params.darWidth || dh != ctx->init_encode_params.darHeight) {
2892  av_log(avctx, AV_LOG_VERBOSE,
2893  "aspect ratio change (DAR): %d:%d -> %d:%d\n",
2894  ctx->init_encode_params.darWidth,
2895  ctx->init_encode_params.darHeight, dw, dh);
2896 
2897  params.reInitEncodeParams.darHeight = dh;
2898  params.reInitEncodeParams.darWidth = dw;
2899 
2900  needs_reconfig = 1;
2901  reconfig_dar = 1;
2902  }
2903 
2904  if (ctx->rc != NV_ENC_PARAMS_RC_CONSTQP && ctx->support_dyn_bitrate) {
2905  if (avctx->bit_rate > 0 && params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate != avctx->bit_rate) {
2906  av_log(avctx, AV_LOG_VERBOSE,
2907  "avg bitrate change: %d -> %d\n",
2908  params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate,
2909  (uint32_t)avctx->bit_rate);
2910 
2911  params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate = avctx->bit_rate;
2912  reconfig_bitrate = 1;
2913  }
2914 
2915  if (avctx->rc_max_rate > 0 && ctx->encode_config.rcParams.maxBitRate != avctx->rc_max_rate) {
2916  av_log(avctx, AV_LOG_VERBOSE,
2917  "max bitrate change: %d -> %d\n",
2918  params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate,
2919  (uint32_t)avctx->rc_max_rate);
2920 
2921  params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate = avctx->rc_max_rate;
2922  reconfig_bitrate = 1;
2923  }
2924 
2925  if (avctx->rc_buffer_size > 0 && ctx->encode_config.rcParams.vbvBufferSize != avctx->rc_buffer_size) {
2926  av_log(avctx, AV_LOG_VERBOSE,
2927  "vbv buffer size change: %d -> %d\n",
2928  params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize,
2929  avctx->rc_buffer_size);
2930 
2931  params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize = avctx->rc_buffer_size;
2932  reconfig_bitrate = 1;
2933  }
2934 
2935  if (reconfig_bitrate) {
2936  params.resetEncoder = 1;
2937  params.forceIDR = 1;
2938 
2939  needs_encode_config = 1;
2940  needs_reconfig = 1;
2941  }
2942  }
2943 
2944  if (!needs_encode_config)
2945  params.reInitEncodeParams.encodeConfig = NULL;
2946 
2947  if (needs_reconfig) {
2948  ret = p_nvenc->nvEncReconfigureEncoder(ctx->nvencoder, &params);
2949  if (ret != NV_ENC_SUCCESS) {
2950  nvenc_print_error(avctx, ret, "failed to reconfigure nvenc");
2951  } else {
2952  if (reconfig_dar) {
2953  ctx->init_encode_params.darHeight = dh;
2954  ctx->init_encode_params.darWidth = dw;
2955  }
2956 
2957  if (reconfig_bitrate) {
2958  ctx->encode_config.rcParams.averageBitRate = params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate;
2959  ctx->encode_config.rcParams.maxBitRate = params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate;
2960  ctx->encode_config.rcParams.vbvBufferSize = params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize;
2961  }
2962 
2963  }
2964  }
2965 }
2966 
2967 #ifdef NVENC_HAVE_HEVC_AND_AV1_MASTERING_METADATA
2968 static int nvenc_set_mastering_display_data(AVCodecContext *avctx, const AVFrame *frame, NV_ENC_PIC_PARAMS *pic_params,
2969  MASTERING_DISPLAY_INFO *mastering_disp_info, CONTENT_LIGHT_LEVEL *content_light_level)
2970 {
2971  NvencContext *ctx = avctx->priv_data;
2972 
2973  if (ctx->mdm || ctx->cll) {
2976  const int chroma_den = (avctx->codec->id == AV_CODEC_ID_AV1) ? 1 << 16 : 50000;
2977  const int max_luma_den = (avctx->codec->id == AV_CODEC_ID_AV1) ? 1 << 8 : 10000;
2978  const int min_luma_den = (avctx->codec->id == AV_CODEC_ID_AV1) ? 1 << 14 : 10000;
2979 
2980  if (!sd_mdm)
2981  sd_mdm = av_frame_side_data_get(avctx->decoded_side_data,
2982  avctx->nb_decoded_side_data,
2984  if (!sd_cll)
2985  sd_cll = av_frame_side_data_get(avctx->decoded_side_data,
2986  avctx->nb_decoded_side_data,
2988 
2989  if (sd_mdm) {
2991 
2992  mastering_disp_info->r.x = av_rescale(mdm->display_primaries[0][0].num, chroma_den,
2993  mdm->display_primaries[0][0].den);
2994  mastering_disp_info->r.y = av_rescale(mdm->display_primaries[0][1].num, chroma_den,
2995  mdm->display_primaries[0][1].den);
2996  mastering_disp_info->g.x = av_rescale(mdm->display_primaries[1][0].num, chroma_den,
2997  mdm->display_primaries[1][0].den);
2998  mastering_disp_info->g.y = av_rescale(mdm->display_primaries[1][1].num, chroma_den,
2999  mdm->display_primaries[1][1].den);
3000  mastering_disp_info->b.x = av_rescale(mdm->display_primaries[2][0].num, chroma_den,
3001  mdm->display_primaries[2][0].den);
3002  mastering_disp_info->b.y = av_rescale(mdm->display_primaries[2][1].num, chroma_den,
3003  mdm->display_primaries[2][1].den);
3004  mastering_disp_info->whitePoint.x = av_rescale(mdm->white_point[0].num, chroma_den,
3005  mdm->white_point[0].den);
3006  mastering_disp_info->whitePoint.y = av_rescale(mdm->white_point[1].num, chroma_den,
3007  mdm->white_point[1].den);
3008  mastering_disp_info->maxLuma = av_rescale(mdm->max_luminance.num, max_luma_den,
3009  mdm->max_luminance.den);
3010  mastering_disp_info->minLuma = av_rescale(mdm->min_luminance.num, min_luma_den,
3011  mdm->min_luminance.den);
3012 
3013  if (avctx->codec->id == AV_CODEC_ID_HEVC)
3014  pic_params->codecPicParams.hevcPicParams.pMasteringDisplay = mastering_disp_info;
3015  else if (avctx->codec->id == AV_CODEC_ID_AV1)
3016  pic_params->codecPicParams.av1PicParams.pMasteringDisplay = mastering_disp_info;
3017  else
3018  return AVERROR_BUG;
3019  }
3020  if (sd_cll) {
3021  const AVContentLightMetadata *cll = (AVContentLightMetadata *)sd_cll->data;
3022 
3023  content_light_level->maxContentLightLevel = cll->MaxCLL;
3024  content_light_level->maxPicAverageLightLevel = cll->MaxFALL;
3025 
3026  if (avctx->codec->id == AV_CODEC_ID_HEVC)
3027  pic_params->codecPicParams.hevcPicParams.pMaxCll = content_light_level;
3028  else if (avctx->codec->id == AV_CODEC_ID_AV1)
3029  pic_params->codecPicParams.av1PicParams.pMaxCll = content_light_level;
3030  else
3031  return AVERROR_BUG;
3032  }
3033  }
3034 
3035  return 0;
3036 }
3037 #endif
3038 
3039 static int nvenc_send_frame(AVCodecContext *avctx, const AVFrame *frame)
3040 {
3041  NVENCSTATUS nv_status;
3042  NvencSurface *tmp_out_surf, *in_surf;
3043  int res, res2;
3044  int sei_count = 0;
3045  int i;
3046 #ifdef NVENC_HAVE_HEVC_AND_AV1_MASTERING_METADATA
3047  MASTERING_DISPLAY_INFO mastering_disp_info = { 0 };
3048  CONTENT_LIGHT_LEVEL content_light_level = { 0 };
3049 #endif
3050 
3051  NvencContext *ctx = avctx->priv_data;
3052  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
3053  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
3054 
3055  NV_ENC_PIC_PARAMS pic_params = { 0 };
3056  pic_params.version = NV_ENC_PIC_PARAMS_VER;
3057 
3058  if ((!ctx->cu_context && !ctx->d3d11_device) || !ctx->nvencoder)
3059  return AVERROR(EINVAL);
3060 
3061  if (frame && frame->buf[0]) {
3062  in_surf = get_free_frame(ctx);
3063  if (!in_surf)
3064  return AVERROR(EAGAIN);
3065 
3066  res = nvenc_push_context(avctx);
3067  if (res < 0)
3068  return res;
3069 
3070  reconfig_encoder(avctx, frame);
3071 
3072  res = nvenc_upload_frame(avctx, frame, in_surf);
3073 
3074  res2 = nvenc_pop_context(avctx);
3075  if (res2 < 0)
3076  return res2;
3077 
3078  if (res)
3079  return res;
3080 
3081  pic_params.inputBuffer = in_surf->input_surface;
3082  pic_params.bufferFmt = in_surf->format;
3083  pic_params.inputWidth = in_surf->width;
3084  pic_params.inputHeight = in_surf->height;
3085  pic_params.inputPitch = in_surf->pitch;
3086  pic_params.outputBitstream = in_surf->output_surface;
3087 
3088  if (avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
3089  if (frame->flags & AV_FRAME_FLAG_TOP_FIELD_FIRST)
3090  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FIELD_TOP_BOTTOM;
3091  else
3092  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FIELD_BOTTOM_TOP;
3093  } else {
3094  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FRAME;
3095  }
3096 
3097  if (ctx->forced_idr >= 0 && frame->pict_type == AV_PICTURE_TYPE_I) {
3098  pic_params.encodePicFlags =
3099  ctx->forced_idr ? NV_ENC_PIC_FLAG_FORCEIDR : NV_ENC_PIC_FLAG_FORCEINTRA;
3100  } else {
3101  pic_params.encodePicFlags = 0;
3102  }
3103 
3104  pic_params.frameIdx = ctx->frame_idx_counter++;
3105  pic_params.inputTimeStamp = frame->pts;
3106 
3107  if (ctx->extra_sei) {
3108  res = prepare_sei_data_array(avctx, frame);
3109  if (res < 0)
3110  return res;
3111  sei_count = res;
3112  }
3113 
3114 #ifdef NVENC_HAVE_HEVC_AND_AV1_MASTERING_METADATA
3115  res = nvenc_set_mastering_display_data(avctx, frame, &pic_params, &mastering_disp_info, &content_light_level);
3116  if (res < 0)
3117  return res;
3118 #endif
3119 
3120  res = nvenc_store_frame_data(avctx, &pic_params, frame);
3121  if (res < 0)
3122  return res;
3123 
3124  nvenc_codec_specific_pic_params(avctx, frame, &pic_params, ctx->sei_data, sei_count);
3125  } else {
3126  pic_params.encodePicFlags = NV_ENC_PIC_FLAG_EOS;
3127  }
3128 
3129  res = nvenc_push_context(avctx);
3130  if (res < 0)
3131  return res;
3132 
3133  nv_status = p_nvenc->nvEncEncodePicture(ctx->nvencoder, &pic_params);
3134 
3135  for (i = 0; i < sei_count; i++)
3136  av_freep(&(ctx->sei_data[i].payload));
3137 
3138  res = nvenc_pop_context(avctx);
3139  if (res < 0)
3140  return res;
3141 
3142  if (nv_status != NV_ENC_SUCCESS &&
3143  nv_status != NV_ENC_ERR_NEED_MORE_INPUT)
3144  return nvenc_print_error(avctx, nv_status, "EncodePicture failed!");
3145 
3146  if (frame && frame->buf[0]) {
3147  av_fifo_write(ctx->output_surface_queue, &in_surf, 1);
3148 
3150  timestamp_queue_enqueue(ctx->timestamp_list, frame->pts);
3151  }
3152 
3153  /* all the pending buffers are now ready for output */
3154  if (nv_status == NV_ENC_SUCCESS) {
3155  while (av_fifo_read(ctx->output_surface_queue, &tmp_out_surf, 1) >= 0)
3156  av_fifo_write(ctx->output_surface_ready_queue, &tmp_out_surf, 1);
3157  }
3158 
3159  return 0;
3160 }
3161 
3163 {
3164  NvencSurface *tmp_out_surf;
3165  int res, res2;
3166 
3167  NvencContext *ctx = avctx->priv_data;
3168 
3169  AVFrame *frame = ctx->frame;
3170 
3171  if ((!ctx->cu_context && !ctx->d3d11_device) || !ctx->nvencoder)
3172  return AVERROR(EINVAL);
3173 
3174  if (!frame->buf[0]) {
3175  res = ff_encode_get_frame(avctx, frame);
3176  if (res < 0 && res != AVERROR_EOF)
3177  return res;
3178  }
3179 
3180  res = nvenc_send_frame(avctx, frame);
3181  if (res < 0) {
3182  if (res != AVERROR(EAGAIN))
3183  return res;
3184  } else
3186 
3187  if (output_ready(avctx, avctx->internal->draining)) {
3188  av_fifo_read(ctx->output_surface_ready_queue, &tmp_out_surf, 1);
3189 
3190  res = nvenc_push_context(avctx);
3191  if (res < 0)
3192  return res;
3193 
3194  res = process_output_surface(avctx, pkt, tmp_out_surf);
3195 
3196  res2 = nvenc_pop_context(avctx);
3197  if (res2 < 0)
3198  return res2;
3199 
3200  if (res)
3201  return res;
3202 
3203  av_fifo_write(ctx->unused_surface_queue, &tmp_out_surf, 1);
3204  } else if (avctx->internal->draining) {
3205  return AVERROR_EOF;
3206  } else {
3207  return AVERROR(EAGAIN);
3208  }
3209 
3210  return 0;
3211 }
3212 
3214 {
3215  NvencContext *ctx = avctx->priv_data;
3216 
3217  nvenc_send_frame(avctx, NULL);
3218  av_fifo_reset2(ctx->timestamp_list);
3219  ctx->output_frame_num = 0;
3220  ctx->initial_delay_time = 0;
3221 }
error
static void error(const char *err)
Definition: target_bsf_fuzzer.c:32
NVENC_LOWLATENCY
@ NVENC_LOWLATENCY
Definition: nvenc.h:186
flags
const SwsFlags flags[]
Definition: swscale.c:61
AVHWDeviceContext::hwctx
void * hwctx
The format-specific data, allocated and freed by libavutil along with this context.
Definition: hwcontext.h:86
ff_alloc_a53_sei
int ff_alloc_a53_sei(const AVFrame *frame, size_t prefix_len, void **data, size_t *sei_size)
Check AVFrame for A53 side data and allocate and fill SEI message with A53 info.
Definition: atsc_a53.c:26
AV_LOG_WARNING
#define AV_LOG_WARNING
Something somehow does not look correct.
Definition: log.h:215
PRESET_ALIAS
#define PRESET_ALIAS(alias, name,...)
Definition: nvenc.c:197
AV_PIX_FMT_CUDA
@ AV_PIX_FMT_CUDA
HW acceleration through CUDA.
Definition: pixfmt.h:260
AVMasteringDisplayMetadata::max_luminance
AVRational max_luminance
Max luminance of mastering display (cd/m^2).
Definition: mastering_display_metadata.h:57
AVPixelFormat
AVPixelFormat
Pixel format.
Definition: pixfmt.h:71
name
it s the only field you need to keep assuming you have a context There is some magic you don t need to care about around this just let it vf default minimum maximum flags name is the option name
Definition: writing_filters.txt:88
GUIDTuple::guid
const GUID guid
Definition: nvenc.c:193
level
uint8_t level
Definition: svq3.c:205
av_clip
#define av_clip
Definition: common.h:100
AVERROR
Filter the word “frame” indicates either a video frame or a group of audio as stored in an AVFrame structure Format for each input and each output the list of supported formats For video that means pixel format For audio that means channel sample they are references to shared objects When the negotiation mechanism computes the intersection of the formats supported at each end of a all references to both lists are replaced with a reference to the intersection And when a single format is eventually chosen for a link amongst the remaining all references to the list are updated That means that if a filter requires that its input and output have the same format amongst a supported all it has to do is use a reference to the same list of formats query_formats can leave some formats unset and return AVERROR(EAGAIN) to cause the negotiation mechanism toagain later. That can be used by filters with complex requirements to use the format negotiated on one link to set the formats supported on another. Frame references ownership and permissions
AVCodecContext::colorspace
enum AVColorSpace colorspace
YUV colorspace type.
Definition: avcodec.h:659
AVCodecContext::decoded_side_data
AVFrameSideData ** decoded_side_data
Array containing static side data, such as HDR10 CLL / MDCV structures.
Definition: avcodec.h:1924
av_frame_get_side_data
AVFrameSideData * av_frame_get_side_data(const AVFrame *frame, enum AVFrameSideDataType type)
Definition: frame.c:661
AV_PIX_FMT_BGR32
#define AV_PIX_FMT_BGR32
Definition: pixfmt.h:502
GUIDTuple
Definition: nvenc.c:192
NVENC_TWO_PASSES
@ NVENC_TWO_PASSES
Definition: nvenc.h:189
NONE
@ NONE
Definition: af_afade.c:60
GUIDTuple::flags
int flags
Definition: nvenc.c:194
av_pix_fmt_desc_get
const AVPixFmtDescriptor * av_pix_fmt_desc_get(enum AVPixelFormat pix_fmt)
Definition: pixdesc.c:3341
AVERROR_EOF
#define AVERROR_EOF
End of file.
Definition: error.h:57
AVBufferRef::data
uint8_t * data
The data buffer.
Definition: buffer.h:90
timecode_internal.h
AV_FRAME_DATA_A53_CC
@ AV_FRAME_DATA_A53_CC
ATSC A53 Part 4 Closed Captions.
Definition: frame.h:59
AV_PROFILE_H264_MAIN
#define AV_PROFILE_H264_MAIN
Definition: defs.h:112
nvenc_push_context
static int nvenc_push_context(AVCodecContext *avctx)
Definition: nvenc.c:376
NV_ENC_HEVC_PROFILE_MAIN_10
@ NV_ENC_HEVC_PROFILE_MAIN_10
Definition: nvenc.h:181
AVMasteringDisplayMetadata::display_primaries
AVRational display_primaries[3][2]
CIE 1931 xy chromaticity coords of color primaries (r, g, b order).
Definition: mastering_display_metadata.h:42
AVHWFramesContext::format
enum AVPixelFormat format
The pixel format identifying the underlying HW surface type.
Definition: hwcontext.h:198
AVPictureType
AVPictureType
Definition: avutil.h:277
output_ready
static int output_ready(AVCodecContext *avctx, int flush)
Definition: nvenc.c:2751
NvencContext
Definition: nvenc.h:205
AVCodecContext::codec_descriptor
const struct AVCodecDescriptor * codec_descriptor
AVCodecDescriptor.
Definition: avcodec.h:1704
int64_t
long long int64_t
Definition: coverity.c:34
NV_ENC_H264_PROFILE_MAIN
@ NV_ENC_H264_PROFILE_MAIN
Definition: nvenc.h:168
AV_FRAME_DATA_S12M_TIMECODE
@ AV_FRAME_DATA_S12M_TIMECODE
Timecode which conforms to SMPTE ST 12-1.
Definition: frame.h:152
AV_PROFILE_HEVC_MAIN
#define AV_PROFILE_HEVC_MAIN
Definition: defs.h:159
NvencSurface::in_ref
AVFrame * in_ref
Definition: nvenc.h:115
av_frame_free
void av_frame_free(AVFrame **frame)
Free the frame and any dynamically allocated objects in it, e.g.
Definition: frame.c:63
AVContentLightMetadata::MaxCLL
unsigned MaxCLL
Max content light level (cd/m^2).
Definition: mastering_display_metadata.h:111
nvenc_store_frame_data
static int nvenc_store_frame_data(AVCodecContext *avctx, NV_ENC_PIC_PARAMS *pic_params, const AVFrame *frame)
Definition: nvenc.c:2605
av_fifo_peek
int av_fifo_peek(const AVFifo *f, void *buf, size_t nb_elems, size_t offset)
Read data from a FIFO without modifying FIFO state.
Definition: fifo.c:255
AVFrame
This structure describes decoded (raw) audio or video data.
Definition: frame.h:410
pixdesc.h
AVCodecContext::color_trc
enum AVColorTransferCharacteristic color_trc
Color Transfer Characteristic.
Definition: avcodec.h:652
nvenc_set_timestamp
static int nvenc_set_timestamp(AVCodecContext *avctx, NV_ENC_LOCK_BITSTREAM *params, AVPacket *pkt)
Definition: nvenc.c:2551
AVCOL_RANGE_JPEG
@ AVCOL_RANGE_JPEG
Full range content.
Definition: pixfmt.h:750
P1
#define P1
Definition: cavsdsp.c:37
internal.h
AVPacket::data
uint8_t * data
Definition: packet.h:535
encode.h
AVCodecContext::b_quant_offset
float b_quant_offset
qscale offset between IP and B-frames
Definition: avcodec.h:785
NvencFrameData
Definition: nvenc.h:125
reconfig_encoder
static void reconfig_encoder(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2875
AV_LOG_VERBOSE
#define AV_LOG_VERBOSE
Detailed information.
Definition: log.h:225
AVCOL_SPC_RGB
@ AVCOL_SPC_RGB
order of coefficients is actually GBR, also IEC 61966-2-1 (sRGB), YZX and ST 428-1
Definition: pixfmt.h:674
timestamp_queue_peek
static int64_t timestamp_queue_peek(AVFifo *queue, size_t index)
Definition: nvenc.c:2543
ff_nvenc_pix_fmts
enum AVPixelFormat ff_nvenc_pix_fmts[]
Definition: nvenc.c:58
set_constqp
static av_cold void set_constqp(AVCodecContext *avctx)
Definition: nvenc.c:857
NvencSurface
Definition: nvenc.h:112
AVPacket::duration
int64_t duration
Duration of this packet in AVStream->time_base units, 0 if unknown.
Definition: packet.h:553
mathematics.h
FFMAX
#define FFMAX(a, b)
Definition: macros.h:47
av_buffer_ref
AVBufferRef * av_buffer_ref(const AVBufferRef *buf)
Create a new reference to an AVBuffer.
Definition: buffer.c:103
nvenc_print_error
static int nvenc_print_error(AVCodecContext *avctx, NVENCSTATUS err, const char *error_string)
Definition: nvenc.c:172
BD
#define BD
AVERROR_UNKNOWN
#define AVERROR_UNKNOWN
Unknown error, typically from an external library.
Definition: error.h:73
AVCodecContext::qmax
int qmax
maximum quantizer
Definition: avcodec.h:1241
nverr
NVENCSTATUS nverr
Definition: nvenc.c:125
set_lossless
static av_cold void set_lossless(AVCodecContext *avctx)
Definition: nvenc.c:972
PRESET
#define PRESET(name,...)
Definition: nvenc.c:200
AV_PKT_FLAG_KEY
#define AV_PKT_FLAG_KEY
The packet contains a keyframe.
Definition: packet.h:590
ff_nvenc_encode_flush
av_cold void ff_nvenc_encode_flush(AVCodecContext *avctx)
Definition: nvenc.c:3213
av_malloc
#define av_malloc(s)
Definition: tableprint_vlc.h:31
AV_CODEC_FLAG_GLOBAL_HEADER
#define AV_CODEC_FLAG_GLOBAL_HEADER
Place global headers in extradata instead of every keyframe.
Definition: avcodec.h:318
ff_timecode_set_smpte
void ff_timecode_set_smpte(unsigned *drop, unsigned *hh, unsigned *mm, unsigned *ss, unsigned *ff, AVRational rate, uint32_t tcsmpte, int prevent_df, int skip_field)
Convert SMPTE 12M binary representation to sei info.
Definition: timecode_internal.c:33
nvenc.h
AV_FRAME_FLAG_TOP_FIELD_FIRST
#define AV_FRAME_FLAG_TOP_FIELD_FIRST
A flag to mark frames where the top field is displayed first if the content is interlaced.
Definition: frame.h:638
av_memdup
void * av_memdup(const void *p, size_t size)
Duplicate a buffer with av_malloc().
Definition: mem.c:304
AV_HWDEVICE_TYPE_CUDA
@ AV_HWDEVICE_TYPE_CUDA
Definition: hwcontext.h:30
AVContentLightMetadata
Content light level needed by to transmit HDR over HDMI (CTA-861.3).
Definition: mastering_display_metadata.h:107
compute_dar
static void compute_dar(AVCodecContext *avctx, int *dw, int *dh)
Definition: nvenc.c:1722
AVCodecContext::framerate
AVRational framerate
Definition: avcodec.h:551
AVCOL_SPC_BT470BG
@ AVCOL_SPC_BT470BG
also ITU-R BT601-6 625 / ITU-R BT1358 625 / ITU-R BT1700 625 PAL & SECAM / IEC 61966-2-4 xvYCC601
Definition: pixfmt.h:679
nvenc_upload_frame
static int nvenc_upload_frame(AVCodecContext *avctx, const AVFrame *frame, NvencSurface *nvenc_frame)
Definition: nvenc.c:2371
NvencDynLoadFunctions::nvenc_device_count
int nvenc_device_count
Definition: nvenc.h:139
AV_CODEC_FLAG_COPY_OPAQUE
#define AV_CODEC_FLAG_COPY_OPAQUE
Definition: avcodec.h:279
AVCodecContext::i_quant_factor
float i_quant_factor
qscale factor between P- and I-frames If > 0 then the last P-frame quantizer will be used (q = lastp_...
Definition: avcodec.h:794
set_vbr
static av_cold void set_vbr(AVCodecContext *avctx)
Definition: nvenc.c:895
nvenc_map_error
static int nvenc_map_error(NVENCSTATUS err, const char **desc)
Definition: nvenc.c:157
AVCodecContext::codec
const struct AVCodec * codec
Definition: avcodec.h:440
AVPacket::opaque_ref
AVBufferRef * opaque_ref
AVBufferRef for free use by the API user.
Definition: packet.h:571
nvenc_check_cap
static int nvenc_check_cap(AVCodecContext *avctx, NV_ENC_CAPS cap)
Definition: nvenc.c:461
presets
static const Preset presets[]
Definition: vf_pseudocolor.c:286
fail
#define fail()
Definition: checkasm.h:194
av_fifo_write
int av_fifo_write(AVFifo *f, const void *buf, size_t nb_elems)
Write data into a FIFO.
Definition: fifo.c:188
ANY_DEVICE
@ ANY_DEVICE
Definition: nvenc.h:196
LIST_DEVICES
@ LIST_DEVICES
Definition: nvenc.h:195
dummy
int dummy
Definition: motion.c:66
NvencSurface::format
NV_ENC_BUFFER_FORMAT format
Definition: nvenc.h:122
nvenc_setup_rate_control
static av_cold int nvenc_setup_rate_control(AVCodecContext *avctx)
Definition: nvenc.c:1064
sei.h
AVCodecContext::refs
int refs
number of reference frames
Definition: avcodec.h:689
AV_HWDEVICE_TYPE_D3D11VA
@ AV_HWDEVICE_TYPE_D3D11VA
Definition: hwcontext.h:35
nvenc_map_preset
static void nvenc_map_preset(NvencContext *ctx)
Definition: nvenc.c:202
AVCodecContext::flags
int flags
AV_CODEC_FLAG_*.
Definition: avcodec.h:488
val
static double val(void *priv, double ch)
Definition: aeval.c:77
AV1_METADATA_TYPE_TIMECODE
@ AV1_METADATA_TYPE_TIMECODE
Definition: av1.h:48
nvenc_copy_frame
static int nvenc_copy_frame(AVCodecContext *avctx, NvencSurface *nv_surface, NV_ENC_LOCK_INPUT_BUFFER *lock_buffer_params, const AVFrame *frame)
Definition: nvenc.c:2253
AVERROR_BUFFER_TOO_SMALL
#define AVERROR_BUFFER_TOO_SMALL
Buffer too small.
Definition: error.h:53
hwcontext_cuda.h
av_image_fill_pointers
int av_image_fill_pointers(uint8_t *data[4], enum AVPixelFormat pix_fmt, int height, uint8_t *ptr, const int linesizes[4])
Fill plane data pointers for an image with pixel format pix_fmt and height height.
Definition: imgutils.c:145
ss
#define ss(width, name, subs,...)
Definition: cbs_vp9.c:202
IS_GBRP
#define IS_GBRP(pix_fmt)
Definition: nvenc.c:121
AVCUDADeviceContext::cuda_ctx
CUcontext cuda_ctx
Definition: hwcontext_cuda.h:43
av_reduce
int av_reduce(int *dst_num, int *dst_den, int64_t num, int64_t den, int64_t max)
Reduce a fraction.
Definition: rational.c:35
nvenc_print_driver_requirement
static void nvenc_print_driver_requirement(AVCodecContext *avctx, int level)
Definition: nvenc.c:256
AVRational::num
int num
Numerator.
Definition: rational.h:59
AV_CODEC_FLAG_INTERLACED_DCT
#define AV_CODEC_FLAG_INTERLACED_DCT
Use interlaced DCT.
Definition: avcodec.h:310
nvenc_check_capabilities
static int nvenc_check_capabilities(AVCodecContext *avctx)
Definition: nvenc.c:478
AVHWDeviceContext
This struct aggregates all the (hardware/vendor-specific) "high-level" state, i.e.
Definition: hwcontext.h:61
av_frame_alloc
AVFrame * av_frame_alloc(void)
Allocate an AVFrame and set its fields to default values.
Definition: frame.c:51
AVCodecContext::color_primaries
enum AVColorPrimaries color_primaries
Chromaticity coordinates of the source primaries.
Definition: avcodec.h:645
pkt
AVPacket * pkt
Definition: movenc.c:60
AV_LOG_ERROR
#define AV_LOG_ERROR
Something went wrong and cannot losslessly be recovered.
Definition: log.h:209
AVFrameSideData::size
size_t size
Definition: frame.h:268
FF_ARRAY_ELEMS
#define FF_ARRAY_ELEMS(a)
Definition: sinewin_tablegen.c:29
av_cold
#define av_cold
Definition: attributes.h:90
av_fifo_read
int av_fifo_read(AVFifo *f, void *buf, size_t nb_elems)
Read data from a FIFO.
Definition: fifo.c:240
AV_PIX_FMT_YUVJ422P
@ AV_PIX_FMT_YUVJ422P
planar YUV 4:2:2, 16bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV422P and setting col...
Definition: pixfmt.h:86
AVCodecContext::extradata_size
int extradata_size
Definition: avcodec.h:515
AVCodecContext::has_b_frames
int has_b_frames
Size of the frame reordering buffer in the decoder.
Definition: avcodec.h:697
ff_nvenc_encode_init
av_cold int ff_nvenc_encode_init(AVCodecContext *avctx)
Definition: nvenc.c:2190
av_fast_realloc
void * av_fast_realloc(void *ptr, unsigned int *size, size_t min_size)
Reallocate the given buffer if it is not large enough, otherwise do nothing.
Definition: mem.c:497
AVMasteringDisplayMetadata::white_point
AVRational white_point[2]
CIE 1931 xy chromaticity coords of white point.
Definition: mastering_display_metadata.h:47
AVCodecContext::global_quality
int global_quality
Global quality for codecs which cannot change it per frame.
Definition: avcodec.h:1217
AVD3D11VADeviceContext::device
ID3D11Device * device
Device used for texture creation and access.
Definition: hwcontext_d3d11va.h:56
AV_PIX_FMT_YUV444P16
#define AV_PIX_FMT_YUV444P16
Definition: pixfmt.h:541
AVFormatContext::flags
int flags
Flags modifying the (de)muxer behaviour.
Definition: avformat.h:1416
AVCodecContext::nb_decoded_side_data
int nb_decoded_side_data
Definition: avcodec.h:1925
AV_PIX_FMT_0BGR32
#define AV_PIX_FMT_0BGR32
Definition: pixfmt.h:505
pix_fmt
static enum AVPixelFormat pix_fmt
Definition: demux_decode.c:41
NvencDynLoadFunctions
Definition: nvenc.h:133
AV_PROFILE_H264_HIGH_10
#define AV_PROFILE_H264_HIGH_10
Definition: defs.h:115
NVENC_DEPRECATED_PRESET
@ NVENC_DEPRECATED_PRESET
Definition: nvenc.h:191
ctx
AVFormatContext * ctx
Definition: movenc.c:49
SEI_TYPE_USER_DATA_REGISTERED_ITU_T_T35
@ SEI_TYPE_USER_DATA_REGISTERED_ITU_T_T35
Definition: sei.h:34
av_rescale_q
int64_t av_rescale_q(int64_t a, AVRational bq, AVRational cq)
Rescale a 64-bit integer by 2 rational numbers.
Definition: mathematics.c:142
nvenc_setup_extradata
static av_cold int nvenc_setup_extradata(AVCodecContext *avctx)
Definition: nvenc.c:2071
timestamp_queue_enqueue
static void timestamp_queue_enqueue(AVFifo *queue, int64_t timestamp)
Definition: nvenc.c:2529
AV_PIX_FMT_YUV420P
@ AV_PIX_FMT_YUV420P
planar YUV 4:2:0, 12bpp, (1 Cr & Cb sample per 2x2 Y samples)
Definition: pixfmt.h:73
AVCodecContext::rc_max_rate
int64_t rc_max_rate
maximum bitrate
Definition: avcodec.h:1270
timestamp_queue_dequeue
static int64_t timestamp_queue_dequeue(AVFifo *queue)
Definition: nvenc.c:2534
AVPacket::opaque
void * opaque
for some private data of the user
Definition: packet.h:560
NvencDynLoadFunctions::nvenc_dl
NvencFunctions * nvenc_dl
Definition: nvenc.h:136
AVCPBProperties
This structure describes the bitrate properties of an encoded bitstream.
Definition: defs.h:271
AV_CODEC_ID_H264
@ AV_CODEC_ID_H264
Definition: codec_id.h:79
NvencSurface::pitch
int pitch
Definition: nvenc.h:119
AV_PIX_FMT_YUVJ444P
@ AV_PIX_FMT_YUVJ444P
planar YUV 4:4:4, 24bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV444P and setting col...
Definition: pixfmt.h:87
AV_PROFILE_H264_HIGH_422
#define AV_PROFILE_H264_HIGH_422
Definition: defs.h:118
NvencSurface::input_surface
NV_ENC_INPUT_PTR input_surface
Definition: nvenc.h:114
AVCodecDescriptor::props
int props
Codec properties, a combination of AV_CODEC_PROP_* flags.
Definition: codec_desc.h:54
if
if(ret)
Definition: filter_design.txt:179
AVCodecContext::rc_buffer_size
int rc_buffer_size
decoder bitstream buffer size
Definition: avcodec.h:1255
NVENC_CAP
#define NVENC_CAP
Definition: nvenc.c:48
AV_PIX_FMT_GBRP16
#define AV_PIX_FMT_GBRP16
Definition: pixfmt.h:547
IS_10BIT
#define IS_10BIT(pix_fmt)
Definition: nvenc.c:95
fabs
static __device__ float fabs(float a)
Definition: cuda_runtime.h:182
NULL
#define NULL
Definition: coverity.c:32
AVHWFramesContext::sw_format
enum AVPixelFormat sw_format
The pixel format identifying the actual data layout of the hardware frames.
Definition: hwcontext.h:211
IS_YUV422
#define IS_YUV422(pix_fmt)
Definition: nvenc.c:117
NvencSurface::reg_idx
int reg_idx
Definition: nvenc.h:116
AVCodecContext::color_range
enum AVColorRange color_range
MPEG vs JPEG YUV range.
Definition: avcodec.h:669
av_buffer_unref
void av_buffer_unref(AVBufferRef **buf)
Free a given reference and automatically free the buffer if there are no more references to it.
Definition: buffer.c:139
SEI_TYPE_TIME_CODE
@ SEI_TYPE_TIME_CODE
Definition: sei.h:95
AV_CODEC_ID_AV1
@ AV_CODEC_ID_AV1
Definition: codec_id.h:284
tmp
static uint8_t tmp[20]
Definition: aes_ctr.c:47
AVRational
Rational number (pair of numerator and denominator).
Definition: rational.h:58
AVCodecContext::internal
struct AVCodecInternal * internal
Private context used for internal data.
Definition: avcodec.h:466
AV_PIX_FMT_YUVJ420P
@ AV_PIX_FMT_YUVJ420P
planar YUV 4:2:0, 12bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV420P and setting col...
Definition: pixfmt.h:85
AVCodecContext::bit_rate
int64_t bit_rate
the average bitrate
Definition: avcodec.h:481
ff_nvenc_encode_close
av_cold int ff_nvenc_encode_close(AVCodecContext *avctx)
Definition: nvenc.c:2105
FrameData::duration
int64_t duration
Definition: librav1e.c:60
AV_PICTURE_TYPE_I
@ AV_PICTURE_TYPE_I
Intra.
Definition: avutil.h:279
P3
#define P3
Definition: dsp_template.c:801
av_fifo_can_read
size_t av_fifo_can_read(const AVFifo *f)
Definition: fifo.c:87
flush
void(* flush)(AVBSFContext *ctx)
Definition: dts2pts.c:370
FrameData::frame_opaque
void * frame_opaque
Definition: librav1e.c:62
NvencDynLoadFunctions::cuda_dl
CudaFunctions * cuda_dl
Definition: nvenc.h:135
AV_FRAME_DATA_MASTERING_DISPLAY_METADATA
@ AV_FRAME_DATA_MASTERING_DISPLAY_METADATA
Mastering display metadata associated with a video frame.
Definition: frame.h:120
nvenc_setup_h264_config
static av_cold int nvenc_setup_h264_config(AVCodecContext *avctx)
Definition: nvenc.c:1243
AVPixFmtDescriptor::flags
uint64_t flags
Combination of AV_PIX_FMT_FLAG_...
Definition: pixdesc.h:94
AV_PROFILE_HEVC_MAIN_10
#define AV_PROFILE_HEVC_MAIN_10
Definition: defs.h:160
AV_PROFILE_HEVC_REXT
#define AV_PROFILE_HEVC_REXT
Definition: defs.h:162
index
int index
Definition: gxfenc.c:90
AV_FRAME_DATA_SEI_UNREGISTERED
@ AV_FRAME_DATA_SEI_UNREGISTERED
User data unregistered metadata associated with a video frame.
Definition: frame.h:178
AVCodecContext::time_base
AVRational time_base
This is the fundamental unit of time (in seconds) in terms of which frame timestamps are represented.
Definition: avcodec.h:535
av_fifo_reset2
void av_fifo_reset2(AVFifo *f)
Definition: fifo.c:280
AV_PIX_FMT_X2BGR10
#define AV_PIX_FMT_X2BGR10
Definition: pixfmt.h:597
AVCUDADeviceContext::stream
CUstream stream
Definition: hwcontext_cuda.h:44
desc
const char * desc
Definition: nvenc.c:127
nvenc_pop_context
static int nvenc_pop_context(AVCodecContext *avctx)
Definition: nvenc.c:387
HW_CONFIG_ENCODER_DEVICE
#define HW_CONFIG_ENCODER_DEVICE(format, device_type_)
Definition: hwconfig.h:95
AVFifo
Definition: fifo.c:35
AVCodecContext::gop_size
int gop_size
the number of pictures in a group of pictures, or 0 for intra_only
Definition: avcodec.h:1005
height
#define height
Definition: dsp.h:85
av_frame_ref
int av_frame_ref(AVFrame *dst, const AVFrame *src)
Set up a new reference to the data described by the source frame.
Definition: frame.c:276
nvenc_check_codec_support
static int nvenc_check_codec_support(AVCodecContext *avctx)
Definition: nvenc.c:425
AV_PIX_FMT_FLAG_RGB
#define AV_PIX_FMT_FLAG_RGB
The pixel format contains RGB-like data (as opposed to YUV/grayscale).
Definition: pixdesc.h:136
AV_CODEC_PROP_REORDER
#define AV_CODEC_PROP_REORDER
Codec supports frame reordering.
Definition: codec_desc.h:92
ff_nvenc_hw_configs
const AVCodecHWConfigInternal *const ff_nvenc_hw_configs[]
Definition: nvenc.c:85
MAX_REGISTERED_FRAMES
#define MAX_REGISTERED_FRAMES
Definition: nvenc.h:41
ff_alloc_timecode_sei
int ff_alloc_timecode_sei(const AVFrame *frame, AVRational rate, size_t prefix_len, void **data, size_t *sei_size)
Check AVFrame for S12M timecode side data and allocate and fill TC SEI message with timecode info.
Definition: utils.c:968
P6
#define P6
Definition: filter_template.c:407
nvenc_alloc_surface
static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
Definition: nvenc.c:1969
AV_NOPTS_VALUE
#define AV_NOPTS_VALUE
Undefined timestamp value.
Definition: avutil.h:248
AVFrameSideData::data
uint8_t * data
Definition: frame.h:267
nvenc_check_device
static av_cold int nvenc_check_device(AVCodecContext *avctx, int idx)
Definition: nvenc.c:666
nvenc_register_frame
static int nvenc_register_frame(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2317
AVCodecHWConfigInternal
Definition: hwconfig.h:25
frame_data
FrameData * frame_data(AVFrame *frame)
Get our axiliary frame data attached to the frame, allocating it if needed.
Definition: ffmpeg.c:453
AV_PIX_FMT_NV16
@ AV_PIX_FMT_NV16
interleaved chroma YUV 4:2:2, 16bpp, (1 Cr & Cb sample per 2x1 Y samples)
Definition: pixfmt.h:198
NVENC_RGB_MODE_DISABLED
@ NVENC_RGB_MODE_DISABLED
Definition: nvenc.h:200
NV_ENC_H264_PROFILE_HIGH_444P
@ NV_ENC_H264_PROFILE_HIGH_444P
Definition: nvenc.h:176
ff_nvenc_receive_packet
int ff_nvenc_receive_packet(AVCodecContext *avctx, AVPacket *pkt)
Definition: nvenc.c:3162
AVPacket::dts
int64_t dts
Decompression timestamp in AVStream->time_base units; the time at which the packet is decompressed.
Definition: packet.h:534
AV_PIX_FMT_RGB32
#define AV_PIX_FMT_RGB32
Definition: pixfmt.h:500
nvenc_override_rate_control
static void nvenc_override_rate_control(AVCodecContext *avctx)
Definition: nvenc.c:986
AVERROR_EXTERNAL
#define AVERROR_EXTERNAL
Generic error in an external library.
Definition: error.h:59
AVPacket::flags
int flags
A combination of AV_PKT_FLAG values.
Definition: packet.h:541
AV_PIX_FMT_D3D11
@ AV_PIX_FMT_D3D11
Hardware surfaces for Direct3D11.
Definition: pixfmt.h:336
AV_PIX_FMT_P216
#define AV_PIX_FMT_P216
Definition: pixfmt.h:603
FrameData::frame_opaque_ref
AVBufferRef * frame_opaque_ref
Definition: librav1e.c:63
xf
#define xf(width, name, var, range_min, range_max, subs,...)
Definition: cbs_av1.c:621
AVCPBProperties::avg_bitrate
int64_t avg_bitrate
Average bitrate of the stream, in bits per second.
Definition: defs.h:286
AV_PIX_FMT_P210
#define AV_PIX_FMT_P210
Definition: pixfmt.h:599
get_free_frame
static NvencSurface * get_free_frame(NvencContext *ctx)
Definition: nvenc.c:2242
AV_LOG_INFO
#define AV_LOG_INFO
Standard information.
Definition: log.h:220
AVCodecContext::b_quant_factor
float b_quant_factor
qscale factor between IP and B-frames If > 0 then the last P-frame quantizer will be used (q= lastp_q...
Definition: avcodec.h:778
AVCodec::id
enum AVCodecID id
Definition: codec.h:186
nvenc_open_session
static av_cold int nvenc_open_session(AVCodecContext *avctx)
Definition: nvenc.c:399
HW_CONFIG_ENCODER_FRAMES
#define HW_CONFIG_ENCODER_FRAMES(format, device_type_)
Definition: hwconfig.h:98
AV_FRAME_DATA_CONTENT_LIGHT_LEVEL
@ AV_FRAME_DATA_CONTENT_LIGHT_LEVEL
Content light level (based on CTA-861.3).
Definition: frame.h:137
i
#define i(width, name, range_min, range_max)
Definition: cbs_h2645.c:256
AVPacket::pts
int64_t pts
Presentation timestamp in AVStream->time_base units; the time at which the decompressed packet will b...
Definition: packet.h:528
FAST
@ FAST
Definition: vf_guided.c:32
AVCodecContext::extradata
uint8_t * extradata
Out-of-band global headers that may be used by some codecs.
Definition: avcodec.h:514
process_output_surface
static int process_output_surface(AVCodecContext *avctx, AVPacket *pkt, NvencSurface *tmpoutsurf)
Definition: nvenc.c:2652
NV_ENC_H264_PROFILE_HIGH
@ NV_ENC_H264_PROFILE_HIGH
Definition: nvenc.h:169
nvenc_load_libraries
static av_cold int nvenc_load_libraries(AVCodecContext *avctx)
Definition: nvenc.c:332
nvenc_recalc_surfaces
static av_cold int nvenc_recalc_surfaces(AVCodecContext *avctx)
Definition: nvenc.c:1021
AVD3D11VADeviceContext
This struct is allocated as AVHWDeviceContext.hwctx.
Definition: hwcontext_d3d11va.h:45
IS_RGB
#define IS_RGB(pix_fmt)
Definition: nvenc.c:104
AVCPBProperties::max_bitrate
int64_t max_bitrate
Maximum bitrate of the stream, in bits per second.
Definition: defs.h:276
AV1_METADATA_TYPE_ITUT_T35
@ AV1_METADATA_TYPE_ITUT_T35
Definition: av1.h:47
AV_CODEC_ID_HEVC
@ AV_CODEC_ID_HEVC
Definition: codec_id.h:228
prepare_sei_data_array
static int prepare_sei_data_array(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2763
FFMIN
#define FFMIN(a, b)
Definition: macros.h:49
av_frame_unref
void av_frame_unref(AVFrame *frame)
Unreference all the buffers referenced by frame and reset the frame fields.
Definition: frame.c:498
AV_PIX_FMT_X2RGB10
#define AV_PIX_FMT_X2RGB10
Definition: pixfmt.h:596
av_mallocz
void * av_mallocz(size_t size)
Allocate a memory block with alignment suitable for all memory accesses (including vectors if availab...
Definition: mem.c:256
AVCodecContext::hw_device_ctx
AVBufferRef * hw_device_ctx
A reference to the AVHWDeviceContext describing the device which will be used by a hardware encoder/d...
Definition: avcodec.h:1475
AVMasteringDisplayMetadata
Mastering display metadata capable of representing the color volume of the display used to master the...
Definition: mastering_display_metadata.h:38
IS_YUV444
#define IS_YUV444(pix_fmt)
Definition: nvenc.c:111
P2
#define P2
Definition: cavsdsp.c:36
IS_CBR
#define IS_CBR(rc)
Definition: nvenc.c:51
av_rescale
int64_t av_rescale(int64_t a, int64_t b, int64_t c)
Rescale a 64-bit integer with rounding to nearest.
Definition: mathematics.c:129
AVCodecContext::height
int height
Definition: avcodec.h:592
AVCodecContext::pix_fmt
enum AVPixelFormat pix_fmt
Pixel format, see AV_PIX_FMT_xxx.
Definition: avcodec.h:631
CHECK_CU
#define CHECK_CU(x)
Definition: nvenc.c:46
nvenc_map_buffer_format
static NV_ENC_BUFFER_FORMAT nvenc_map_buffer_format(enum AVPixelFormat pix_fmt)
Definition: nvenc.c:1931
av_calloc
void * av_calloc(size_t nmemb, size_t size)
Definition: mem.c:264
nvenc_errors
static const struct @197 nvenc_errors[]
AV_PIX_FMT_P016
#define AV_PIX_FMT_P016
Definition: pixfmt.h:587
AVCodecContext::hw_frames_ctx
AVBufferRef * hw_frames_ctx
A reference to the AVHWFramesContext describing the input (for encoding) or output (decoding) frames.
Definition: avcodec.h:1453
NvencSurface::width
int width
Definition: nvenc.h:117
AVHWFramesContext
This struct describes a set or pool of "hardware" frames (i.e.
Definition: hwcontext.h:116
AVCUDADeviceContext
This struct is allocated as AVHWDeviceContext.hwctx.
Definition: hwcontext_cuda.h:42
AV_PROFILE_H264_HIGH_444_PREDICTIVE
#define AV_PROFILE_H264_HIGH_444_PREDICTIVE
Definition: defs.h:122
ret
ret
Definition: filter_design.txt:187
AV_LOG_FATAL
#define AV_LOG_FATAL
Something went wrong and recovery is not possible.
Definition: log.h:203
AVHWDeviceContext::type
enum AVHWDeviceType type
This field identifies the underlying API used for hardware access.
Definition: hwcontext.h:73
nvenc_setup_encoder
static av_cold int nvenc_setup_encoder(AVCodecContext *avctx)
Definition: nvenc.c:1755
AV_PIX_FMT_NV12
@ AV_PIX_FMT_NV12
planar YUV 4:2:0, 12bpp, 1 plane for Y and 1 plane for the UV components, which are interleaved (firs...
Definition: pixfmt.h:96
FFSWAP
#define FFSWAP(type, a, b)
Definition: macros.h:52
frame
these buffered frames must be flushed immediately if a new input produces new the filter must not call request_frame to get more It must just process the frame or queue it The task of requesting more frames is left to the filter s request_frame method or the application If a filter has several the filter must be ready for frames arriving randomly on any input any filter with several inputs will most likely require some kind of queuing mechanism It is perfectly acceptable to have a limited queue and to drop frames when the inputs are too unbalanced request_frame For filters that do not use the this method is called when a frame is wanted on an output For a it should directly call filter_frame on the corresponding output For a if there are queued frames already one of these frames should be pushed If the filter should request a frame on one of its repeatedly until at least one frame has been pushed Return or at least make progress towards producing a frame
Definition: filter_design.txt:264
averr
int averr
Definition: nvenc.c:126
AV_PIX_FMT_0RGB32
#define AV_PIX_FMT_0RGB32
Definition: pixfmt.h:504
AVHWFramesContext::device_ctx
AVHWDeviceContext * device_ctx
The parent AVHWDeviceContext.
Definition: hwcontext.h:135
AVCPBProperties::buffer_size
int64_t buffer_size
The size of the buffer to which the ratecontrol is applied, in bits.
Definition: defs.h:292
cuda_check.h
atsc_a53.h
AV_PROFILE_H264_BASELINE
#define AV_PROFILE_H264_BASELINE
Definition: defs.h:110
NV_ENC_H264_PROFILE_BASELINE
@ NV_ENC_H264_PROFILE_BASELINE
Definition: nvenc.h:167
av_fifo_alloc2
AVFifo * av_fifo_alloc2(size_t nb_elems, size_t elem_size, unsigned int flags)
Allocate and initialize an AVFifo with a given element size.
Definition: fifo.c:47
AV_INPUT_BUFFER_PADDING_SIZE
#define AV_INPUT_BUFFER_PADDING_SIZE
Definition: defs.h:40
AVCodecContext
main external API structure.
Definition: avcodec.h:431
AV_PROFILE_H264_HIGH
#define AV_PROFILE_H264_HIGH
Definition: defs.h:114
AV_PICTURE_TYPE_B
@ AV_PICTURE_TYPE_B
Bi-dir predicted.
Definition: avutil.h:281
ff_get_encode_buffer
int ff_get_encode_buffer(AVCodecContext *avctx, AVPacket *avpkt, int64_t size, int flags)
Get a buffer for a packet.
Definition: encode.c:106
NvencSurface::height
int height
Definition: nvenc.h:118
SEI_TYPE_USER_DATA_UNREGISTERED
@ SEI_TYPE_USER_DATA_UNREGISTERED
Definition: sei.h:35
av_image_copy2
static void av_image_copy2(uint8_t *const dst_data[4], const int dst_linesizes[4], uint8_t *const src_data[4], const int src_linesizes[4], enum AVPixelFormat pix_fmt, int width, int height)
Wrapper around av_image_copy() to workaround the limitation that the conversion from uint8_t * const ...
Definition: imgutils.h:184
AVCodecContext::qmin
int qmin
minimum quantizer
Definition: avcodec.h:1234
AVRational::den
int den
Denominator.
Definition: rational.h:60
AV_PIX_FMT_NONE
@ AV_PIX_FMT_NONE
Definition: pixfmt.h:72
AVCodecContext::profile
int profile
profile
Definition: avcodec.h:1618
nvenc_setup_surfaces
static av_cold int nvenc_setup_surfaces(AVCodecContext *avctx)
Definition: nvenc.c:2025
AVCodecContext::i_quant_offset
float i_quant_offset
qscale offset between P and I-frames
Definition: avcodec.h:801
AVFrameSideData::type
enum AVFrameSideDataType type
Definition: frame.h:266
NV_ENC_HEVC_PROFILE_REXT
@ NV_ENC_HEVC_PROFILE_REXT
Definition: nvenc.h:182
NvencSurface::output_surface
NV_ENC_OUTPUT_PTR output_surface
Definition: nvenc.h:121
nvenc_find_free_reg_resource
static int nvenc_find_free_reg_resource(AVCodecContext *avctx)
Definition: nvenc.c:2283
nvenc_codec_specific_pic_params
static void nvenc_codec_specific_pic_params(AVCodecContext *avctx, const AVFrame *frame, NV_ENC_PIC_PARAMS *params, NV_ENC_SEI_PAYLOAD *sei_data, int sei_count)
Definition: nvenc.c:2478
AVMasteringDisplayMetadata::min_luminance
AVRational min_luminance
Min luminance of mastering display (cd/m^2).
Definition: mastering_display_metadata.h:52
AV_PIX_FMT_YUV444P
@ AV_PIX_FMT_YUV444P
planar YUV 4:4:4, 24bpp, (1 Cr & Cb sample per 1x1 Y samples)
Definition: pixfmt.h:78
NV_ENC_HEVC_PROFILE_MAIN
@ NV_ENC_HEVC_PROFILE_MAIN
Definition: nvenc.h:180
P7
#define P7
Definition: filter_template.c:406
AV_PIX_FMT_P010
#define AV_PIX_FMT_P010
Definition: pixfmt.h:585
AVCodecInternal::draining
int draining
decoding: AVERROR_EOF has been returned from ff_decode_get_packet(); must not be used by decoders tha...
Definition: internal.h:139
AV_PIX_FMT_GBRP
@ AV_PIX_FMT_GBRP
planar GBR 4:4:4 24bpp
Definition: pixfmt.h:165
NvencDynLoadFunctions::nvenc_funcs
NV_ENCODE_API_FUNCTION_LIST nvenc_funcs
Definition: nvenc.h:138
AV_PICTURE_TYPE_P
@ AV_PICTURE_TYPE_P
Predicted.
Definition: avutil.h:280
NVENC_ONE_PASS
@ NVENC_ONE_PASS
Definition: nvenc.h:188
mem.h
AVCodecContext::max_b_frames
int max_b_frames
maximum number of B-frames between non-B-frames Note: The output will be delayed by max_b_frames+1 re...
Definition: avcodec.h:769
ff_encode_get_frame
int ff_encode_get_frame(AVCodecContext *avctx, AVFrame *frame)
Called by encoders to get the next frame for encoding.
Definition: encode.c:205
packet_internal.h
mastering_display_metadata.h
AVFrameSideData
Structure to hold side data for an AVFrame.
Definition: frame.h:265
AVPixFmtDescriptor
Descriptor that unambiguously describes how the bits of a pixel are stored in the up to 4 data planes...
Definition: pixdesc.h:69
P4
#define P4
Definition: filter_template.c:409
av_free
#define av_free(p)
Definition: tableprint_vlc.h:34
AVCodecContext::slices
int slices
Number of slices.
Definition: avcodec.h:1021
DEFAULT
#define DEFAULT
Definition: avdct.c:29
AVContentLightMetadata::MaxFALL
unsigned MaxFALL
Max average light level per frame (cd/m^2).
Definition: mastering_display_metadata.h:116
AVPacket
This structure stores compressed data.
Definition: packet.h:512
AVCodecContext::priv_data
void * priv_data
Definition: avcodec.h:458
av_freep
#define av_freep(p)
Definition: tableprint_vlc.h:35
AV_PICTURE_TYPE_BI
@ AV_PICTURE_TYPE_BI
BI type.
Definition: avutil.h:285
nvenc_setup_device
static av_cold int nvenc_setup_device(AVCodecContext *avctx)
Definition: nvenc.c:741
P5
#define P5
Definition: filter_template.c:408
av_frame_side_data_get
static const AVFrameSideData * av_frame_side_data_get(AVFrameSideData *const *sd, const int nb_sd, enum AVFrameSideDataType type)
Wrapper around av_frame_side_data_get_c() to workaround the limitation that for any type T the conver...
Definition: frame.h:1127
AVCodecContext::width
int width
picture width / height.
Definition: avcodec.h:592
imgutils.h
hwcontext.h
AVERROR_BUG
#define AVERROR_BUG
Internal bug, also see AVERROR_BUG2.
Definition: error.h:52
av_log
#define av_log(a,...)
Definition: tableprint_vlc.h:27
av_fifo_freep2
void av_fifo_freep2(AVFifo **f)
Free an AVFifo and reset pointer to NULL.
Definition: fifo.c:286
ff_side_data_set_encoder_stats
int ff_side_data_set_encoder_stats(AVPacket *pkt, int quality, int64_t *error, int error_count, int pict_type)
Definition: packet.c:610
AVERROR_EXIT
#define AVERROR_EXIT
Immediate exit was requested; the called function should not be restarted.
Definition: error.h:58
ff_encode_add_cpb_side_data
AVCPBProperties * ff_encode_add_cpb_side_data(AVCodecContext *avctx)
Add a CPB properties side data to an encoding context.
Definition: encode.c:880
nvenc_setup_codec_config
static av_cold int nvenc_setup_codec_config(AVCodecContext *avctx)
Definition: nvenc.c:1705
width
#define width
Definition: dsp.h:85
FF_QP2LAMBDA
#define FF_QP2LAMBDA
factor to convert from H.263 QP to lambda
Definition: avutil.h:227
AV_PROFILE_AV1_MAIN
#define AV_PROFILE_AV1_MAIN
Definition: defs.h:169
codec_desc.h
NVENC_LOSSLESS
@ NVENC_LOSSLESS
Definition: nvenc.h:187
AVCodecContext::sample_aspect_ratio
AVRational sample_aspect_ratio
sample aspect ratio (0 if unknown) That is the width of a pixel divided by the height of the pixel.
Definition: avcodec.h:616
nvenc_setup_hevc_config
static av_cold int nvenc_setup_hevc_config(AVCodecContext *avctx)
Definition: nvenc.c:1434
RC_MODE_DEPRECATED
#define RC_MODE_DEPRECATED
Definition: nvenc.h:42
nvenc_send_frame
static int nvenc_send_frame(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:3039
av_get_pix_fmt_name
const char * av_get_pix_fmt_name(enum AVPixelFormat pix_fmt)
Return the short name for a pixel format, NULL in case pix_fmt is unknown.
Definition: pixdesc.c:3261
nvenc_retrieve_frame_data
static int nvenc_retrieve_frame_data(AVCodecContext *avctx, NV_ENC_LOCK_BITSTREAM *lock_params, AVPacket *pkt)
Definition: nvenc.c:2631