FFmpeg
nvenc.c
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1 /*
2  * H.264/HEVC/AV1 hardware encoding using nvidia nvenc
3  * Copyright (c) 2016 Timo Rothenpieler <timo@rothenpieler.org>
4  *
5  * This file is part of FFmpeg.
6  *
7  * FFmpeg is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU Lesser General Public
9  * License as published by the Free Software Foundation; either
10  * version 2.1 of the License, or (at your option) any later version.
11  *
12  * FFmpeg is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15  * Lesser General Public License for more details.
16  *
17  * You should have received a copy of the GNU Lesser General Public
18  * License along with FFmpeg; if not, write to the Free Software
19  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
20  */
21 
22 #include "config.h"
23 #include "config_components.h"
24 
25 #include "nvenc.h"
26 #include "hevc/sei.h"
27 #if CONFIG_AV1_NVENC_ENCODER
28 #include "av1.h"
29 #endif
30 
32 #include "libavutil/hwcontext.h"
33 #include "libavutil/cuda_check.h"
34 #include "libavutil/imgutils.h"
35 #include "libavutil/mem.h"
36 #include "libavutil/pixdesc.h"
38 #include "libavutil/mathematics.h"
40 #include "libavutil/stereo3d.h"
41 #include "libavutil/tdrdi.h"
42 #include "atsc_a53.h"
43 #include "codec_desc.h"
44 #include "encode.h"
45 #include "internal.h"
46 #include "packet_internal.h"
47 
48 #define CHECK_CU(x) FF_CUDA_CHECK_DL(avctx, dl_fn->cuda_dl, x)
49 
50 #define NVENC_CAP 0x30
51 
52 #ifndef NVENC_NO_DEPRECATED_RC
53 #define IS_CBR(rc) (rc == NV_ENC_PARAMS_RC_CBR || \
54  rc == NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ || \
55  rc == NV_ENC_PARAMS_RC_CBR_HQ)
56 #else
57 #define IS_CBR(rc) (rc == NV_ENC_PARAMS_RC_CBR)
58 #endif
59 
65  AV_PIX_FMT_P016, // Truncated to 10bits
66 #ifdef NVENC_HAVE_422_SUPPORT
70 #endif
71  AV_PIX_FMT_YUV444P16, // Truncated to 10bits
79  AV_PIX_FMT_GBRP16, // Truncated to 10bits
81 #if CONFIG_D3D11VA
83 #endif
85 };
86 
88  HW_CONFIG_ENCODER_FRAMES(CUDA, CUDA),
90 #if CONFIG_D3D11VA
91  HW_CONFIG_ENCODER_FRAMES(D3D11, D3D11VA),
93 #endif
94  NULL,
95 };
96 
97 #define IS_10BIT(pix_fmt) (pix_fmt == AV_PIX_FMT_P010 || \
98  pix_fmt == AV_PIX_FMT_P016 || \
99  pix_fmt == AV_PIX_FMT_P210 || \
100  pix_fmt == AV_PIX_FMT_P216 || \
101  pix_fmt == AV_PIX_FMT_YUV444P16 || \
102  pix_fmt == AV_PIX_FMT_X2RGB10 || \
103  pix_fmt == AV_PIX_FMT_X2BGR10 || \
104  pix_fmt == AV_PIX_FMT_GBRP16)
105 
106 #define IS_RGB(pix_fmt) (pix_fmt == AV_PIX_FMT_0RGB32 || \
107  pix_fmt == AV_PIX_FMT_RGB32 || \
108  pix_fmt == AV_PIX_FMT_0BGR32 || \
109  pix_fmt == AV_PIX_FMT_BGR32 || \
110  pix_fmt == AV_PIX_FMT_X2RGB10 || \
111  pix_fmt == AV_PIX_FMT_X2BGR10)
112 
113 #define IS_YUV444(pix_fmt) (pix_fmt == AV_PIX_FMT_YUV444P || \
114  pix_fmt == AV_PIX_FMT_YUV444P16 || \
115  pix_fmt == AV_PIX_FMT_GBRP || \
116  pix_fmt == AV_PIX_FMT_GBRP16 || \
117  (ctx->rgb_mode == NVENC_RGB_MODE_444 && IS_RGB(pix_fmt)))
118 
119 #define IS_YUV422(pix_fmt) (pix_fmt == AV_PIX_FMT_NV16 || \
120  pix_fmt == AV_PIX_FMT_P210 || \
121  pix_fmt == AV_PIX_FMT_P216)
122 
123 #define IS_GBRP(pix_fmt) (pix_fmt == AV_PIX_FMT_GBRP || \
124  pix_fmt == AV_PIX_FMT_GBRP16)
125 
126 static const struct {
127  NVENCSTATUS nverr;
128  int averr;
129  const char *desc;
130 } nvenc_errors[] = {
131  { NV_ENC_SUCCESS, 0, "success" },
132  { NV_ENC_ERR_NO_ENCODE_DEVICE, AVERROR(ENOENT), "no encode device" },
133  { NV_ENC_ERR_UNSUPPORTED_DEVICE, AVERROR(ENOSYS), "unsupported device" },
134  { NV_ENC_ERR_INVALID_ENCODERDEVICE, AVERROR(EINVAL), "invalid encoder device" },
135  { NV_ENC_ERR_INVALID_DEVICE, AVERROR(EINVAL), "invalid device" },
136  { NV_ENC_ERR_DEVICE_NOT_EXIST, AVERROR(EIO), "device does not exist" },
137  { NV_ENC_ERR_INVALID_PTR, AVERROR(EFAULT), "invalid ptr" },
138  { NV_ENC_ERR_INVALID_EVENT, AVERROR(EINVAL), "invalid event" },
139  { NV_ENC_ERR_INVALID_PARAM, AVERROR(EINVAL), "invalid param" },
140  { NV_ENC_ERR_INVALID_CALL, AVERROR(EINVAL), "invalid call" },
141  { NV_ENC_ERR_OUT_OF_MEMORY, AVERROR(ENOMEM), "out of memory" },
142  { NV_ENC_ERR_ENCODER_NOT_INITIALIZED, AVERROR(EINVAL), "encoder not initialized" },
143  { NV_ENC_ERR_UNSUPPORTED_PARAM, AVERROR(ENOSYS), "unsupported param" },
144  { NV_ENC_ERR_LOCK_BUSY, AVERROR(EAGAIN), "lock busy" },
145  { NV_ENC_ERR_NOT_ENOUGH_BUFFER, AVERROR_BUFFER_TOO_SMALL, "not enough buffer"},
146  { NV_ENC_ERR_INVALID_VERSION, AVERROR(EINVAL), "invalid version" },
147  { NV_ENC_ERR_MAP_FAILED, AVERROR(EIO), "map failed" },
148  { NV_ENC_ERR_NEED_MORE_INPUT, AVERROR(EAGAIN), "need more input" },
149  { NV_ENC_ERR_ENCODER_BUSY, AVERROR(EAGAIN), "encoder busy" },
150  { NV_ENC_ERR_EVENT_NOT_REGISTERD, AVERROR(EBADF), "event not registered" },
151  { NV_ENC_ERR_GENERIC, AVERROR_UNKNOWN, "generic error" },
152  { NV_ENC_ERR_INCOMPATIBLE_CLIENT_KEY, AVERROR(EINVAL), "incompatible client key" },
153  { NV_ENC_ERR_UNIMPLEMENTED, AVERROR(ENOSYS), "unimplemented" },
154  { NV_ENC_ERR_RESOURCE_REGISTER_FAILED, AVERROR(EIO), "resource register failed" },
155  { NV_ENC_ERR_RESOURCE_NOT_REGISTERED, AVERROR(EBADF), "resource not registered" },
156  { NV_ENC_ERR_RESOURCE_NOT_MAPPED, AVERROR(EBADF), "resource not mapped" },
157 };
158 
159 static int nvenc_map_error(NVENCSTATUS err, const char **desc)
160 {
161  int i;
162  for (i = 0; i < FF_ARRAY_ELEMS(nvenc_errors); i++) {
163  if (nvenc_errors[i].nverr == err) {
164  if (desc)
165  *desc = nvenc_errors[i].desc;
166  return nvenc_errors[i].averr;
167  }
168  }
169  if (desc)
170  *desc = "unknown error";
171  return AVERROR_UNKNOWN;
172 }
173 
174 static int nvenc_print_error(AVCodecContext *avctx, NVENCSTATUS err,
175  const char *error_string)
176 {
177  const char *desc;
178  const char *details = "(no details)";
179  int ret = nvenc_map_error(err, &desc);
180 
181 #ifdef NVENC_HAVE_GETLASTERRORSTRING
182  NvencContext *ctx = avctx->priv_data;
183  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
184 
185  if (p_nvenc && ctx->nvencoder)
186  details = p_nvenc->nvEncGetLastErrorString(ctx->nvencoder);
187 #endif
188 
189  av_log(avctx, AV_LOG_ERROR, "%s: %s (%d): %s\n", error_string, desc, err, details);
190 
191  return ret;
192 }
193 
194 typedef struct GUIDTuple {
195  const GUID guid;
196  int flags;
197 } GUIDTuple;
198 
199 #define PRESET_ALIAS(alias, name, ...) \
200  [PRESET_ ## alias] = { NV_ENC_PRESET_ ## name ## _GUID, __VA_ARGS__ }
201 
202 #define PRESET(name, ...) PRESET_ALIAS(name, name, __VA_ARGS__)
203 
205 {
206  GUIDTuple presets[] = {
207 #ifdef NVENC_HAVE_NEW_PRESETS
208  PRESET(P1),
209  PRESET(P2),
210  PRESET(P3),
211  PRESET(P4),
212  PRESET(P5),
213  PRESET(P6),
214  PRESET(P7),
216  PRESET_ALIAS(MEDIUM, P4, NVENC_ONE_PASS),
218  // Compat aliases
223  PRESET_ALIAS(LOW_LATENCY_DEFAULT, P4, NVENC_DEPRECATED_PRESET | NVENC_LOWLATENCY),
228 #else
229  PRESET(DEFAULT),
230  PRESET(HP),
231  PRESET(HQ),
232  PRESET(BD),
233  PRESET_ALIAS(SLOW, HQ, NVENC_TWO_PASSES),
234  PRESET_ALIAS(MEDIUM, HQ, NVENC_ONE_PASS),
236  PRESET(LOW_LATENCY_DEFAULT, NVENC_LOWLATENCY),
237  PRESET(LOW_LATENCY_HP, NVENC_LOWLATENCY),
238  PRESET(LOW_LATENCY_HQ, NVENC_LOWLATENCY),
239  PRESET(LOSSLESS_DEFAULT, NVENC_LOSSLESS),
240  PRESET(LOSSLESS_HP, NVENC_LOSSLESS),
241 #endif
242  };
243 
244  GUIDTuple *t = &presets[ctx->preset];
245 
246  ctx->init_encode_params.presetGUID = t->guid;
247  ctx->flags = t->flags;
248 
249 #ifdef NVENC_HAVE_NEW_PRESETS
250  if (ctx->tuning_info == NV_ENC_TUNING_INFO_LOSSLESS)
252 #endif
253 }
254 
255 #undef PRESET
256 #undef PRESET_ALIAS
257 
259 {
260 #if NVENCAPI_CHECK_VERSION(13, 1)
261  const char *minver = "(unknown)";
262 #elif NVENCAPI_CHECK_VERSION(13, 0)
263  const char *minver = "570.0";
264 #elif NVENCAPI_CHECK_VERSION(12, 2)
265 # if defined(_WIN32) || defined(__CYGWIN__)
266  const char *minver = "551.76";
267 # else
268  const char *minver = "550.54.14";
269 # endif
270 #elif NVENCAPI_CHECK_VERSION(12, 1)
271 # if defined(_WIN32) || defined(__CYGWIN__)
272  const char *minver = "531.61";
273 # else
274  const char *minver = "530.41.03";
275 # endif
276 #elif NVENCAPI_CHECK_VERSION(12, 0)
277 # if defined(_WIN32) || defined(__CYGWIN__)
278  const char *minver = "522.25";
279 # else
280  const char *minver = "520.56.06";
281 # endif
282 #elif NVENCAPI_CHECK_VERSION(11, 1)
283 # if defined(_WIN32) || defined(__CYGWIN__)
284  const char *minver = "471.41";
285 # else
286  const char *minver = "470.57.02";
287 # endif
288 #elif NVENCAPI_CHECK_VERSION(11, 0)
289 # if defined(_WIN32) || defined(__CYGWIN__)
290  const char *minver = "456.71";
291 # else
292  const char *minver = "455.28";
293 # endif
294 #elif NVENCAPI_CHECK_VERSION(10, 0)
295 # if defined(_WIN32) || defined(__CYGWIN__)
296  const char *minver = "450.51";
297 # else
298  const char *minver = "445.87";
299 # endif
300 #elif NVENCAPI_CHECK_VERSION(9, 1)
301 # if defined(_WIN32) || defined(__CYGWIN__)
302  const char *minver = "436.15";
303 # else
304  const char *minver = "435.21";
305 # endif
306 #elif NVENCAPI_CHECK_VERSION(9, 0)
307 # if defined(_WIN32) || defined(__CYGWIN__)
308  const char *minver = "418.81";
309 # else
310  const char *minver = "418.30";
311 # endif
312 #elif NVENCAPI_CHECK_VERSION(8, 2)
313 # if defined(_WIN32) || defined(__CYGWIN__)
314  const char *minver = "397.93";
315 # else
316  const char *minver = "396.24";
317 #endif
318 #elif NVENCAPI_CHECK_VERSION(8, 1)
319 # if defined(_WIN32) || defined(__CYGWIN__)
320  const char *minver = "390.77";
321 # else
322  const char *minver = "390.25";
323 # endif
324 #else
325 # if defined(_WIN32) || defined(__CYGWIN__)
326  const char *minver = "378.66";
327 # else
328  const char *minver = "378.13";
329 # endif
330 #endif
331  av_log(avctx, level, "The minimum required Nvidia driver for nvenc is %s or newer\n", minver);
332 }
333 
335 {
336  NvencContext *ctx = avctx->priv_data;
337  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
338  NVENCSTATUS err;
339  uint32_t nvenc_max_ver;
340  int ret;
341 
342  ret = cuda_load_functions(&dl_fn->cuda_dl, avctx);
343  if (ret < 0)
344  return ret;
345 
346  ret = nvenc_load_functions(&dl_fn->nvenc_dl, avctx);
347  if (ret < 0) {
349  return ret;
350  }
351 
352  err = dl_fn->nvenc_dl->NvEncodeAPIGetMaxSupportedVersion(&nvenc_max_ver);
353  if (err != NV_ENC_SUCCESS)
354  return nvenc_print_error(avctx, err, "Failed to query nvenc max version");
355 
356  av_log(avctx, AV_LOG_VERBOSE, "Loaded Nvenc version %d.%d\n", nvenc_max_ver >> 4, nvenc_max_ver & 0xf);
357 
358  if ((NVENCAPI_MAJOR_VERSION << 4 | NVENCAPI_MINOR_VERSION) > nvenc_max_ver) {
359  av_log(avctx, AV_LOG_ERROR, "Driver does not support the required nvenc API version. "
360  "Required: %d.%d Found: %d.%d\n",
361  NVENCAPI_MAJOR_VERSION, NVENCAPI_MINOR_VERSION,
362  nvenc_max_ver >> 4, nvenc_max_ver & 0xf);
364  return AVERROR(ENOSYS);
365  }
366 
367  dl_fn->nvenc_funcs.version = NV_ENCODE_API_FUNCTION_LIST_VER;
368 
369  err = dl_fn->nvenc_dl->NvEncodeAPICreateInstance(&dl_fn->nvenc_funcs);
370  if (err != NV_ENC_SUCCESS)
371  return nvenc_print_error(avctx, err, "Failed to create nvenc instance");
372 
373  av_log(avctx, AV_LOG_VERBOSE, "Nvenc initialized successfully\n");
374 
375  return 0;
376 }
377 
379 {
380  NvencContext *ctx = avctx->priv_data;
381  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
382 
383  if (ctx->d3d11_device)
384  return 0;
385 
386  return CHECK_CU(dl_fn->cuda_dl->cuCtxPushCurrent(ctx->cu_context));
387 }
388 
390 {
391  NvencContext *ctx = avctx->priv_data;
392  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
393  CUcontext dummy;
394 
395  if (ctx->d3d11_device)
396  return 0;
397 
398  return CHECK_CU(dl_fn->cuda_dl->cuCtxPopCurrent(&dummy));
399 }
400 
402 {
403  NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS params = { 0 };
404  NvencContext *ctx = avctx->priv_data;
405  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
406  NVENCSTATUS ret;
407 
408  params.version = NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS_VER;
409  params.apiVersion = NVENCAPI_VERSION;
410  if (ctx->d3d11_device) {
411  params.device = ctx->d3d11_device;
412  params.deviceType = NV_ENC_DEVICE_TYPE_DIRECTX;
413  } else {
414  params.device = ctx->cu_context;
415  params.deviceType = NV_ENC_DEVICE_TYPE_CUDA;
416  }
417 
418  ret = p_nvenc->nvEncOpenEncodeSessionEx(&params, &ctx->nvencoder);
419  if (ret != NV_ENC_SUCCESS) {
420  ctx->nvencoder = NULL;
421  return nvenc_print_error(avctx, ret, "OpenEncodeSessionEx failed");
422  }
423 
424  return 0;
425 }
426 
428 {
429  NvencContext *ctx = avctx->priv_data;
430  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
431  int i, ret, count = 0;
432  GUID *guids = NULL;
433 
434  ret = p_nvenc->nvEncGetEncodeGUIDCount(ctx->nvencoder, &count);
435 
436  if (ret != NV_ENC_SUCCESS || !count)
437  return AVERROR(ENOSYS);
438 
439  guids = av_malloc(count * sizeof(GUID));
440  if (!guids)
441  return AVERROR(ENOMEM);
442 
443  ret = p_nvenc->nvEncGetEncodeGUIDs(ctx->nvencoder, guids, count, &count);
444  if (ret != NV_ENC_SUCCESS) {
445  ret = AVERROR(ENOSYS);
446  goto fail;
447  }
448 
449  ret = AVERROR(ENOSYS);
450  for (i = 0; i < count; i++) {
451  if (!memcmp(&guids[i], &ctx->init_encode_params.encodeGUID, sizeof(*guids))) {
452  ret = 0;
453  break;
454  }
455  }
456 
457 fail:
458  av_free(guids);
459 
460  return ret;
461 }
462 
463 static int nvenc_check_cap(AVCodecContext *avctx, NV_ENC_CAPS cap)
464 {
465  NvencContext *ctx = avctx->priv_data;
466  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
467  NV_ENC_CAPS_PARAM params = { 0 };
468  int ret, val = 0;
469 
470  params.version = NV_ENC_CAPS_PARAM_VER;
471  params.capsToQuery = cap;
472 
473  ret = p_nvenc->nvEncGetEncodeCaps(ctx->nvencoder, ctx->init_encode_params.encodeGUID, &params, &val);
474 
475  if (ret == NV_ENC_SUCCESS)
476  return val;
477  return 0;
478 }
479 
481 {
482  NvencContext *ctx = avctx->priv_data;
483  int tmp, ret;
484 
486  if (ret < 0) {
487  av_log(avctx, AV_LOG_WARNING, "Codec not supported\n");
488  return ret;
489  }
490 
491  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_YUV444_ENCODE);
492  if (IS_YUV444(ctx->data_pix_fmt) && ret <= 0) {
493  av_log(avctx, AV_LOG_WARNING, "YUV444P not supported\n");
494  return AVERROR(ENOSYS);
495  }
496 
497 #ifdef NVENC_HAVE_422_SUPPORT
498  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_YUV422_ENCODE);
499 #else
500  ret = 0;
501 #endif
502  if (IS_YUV422(ctx->data_pix_fmt) && ret <= 0) {
503  av_log(avctx, AV_LOG_WARNING, "YUV422P not supported\n");
504  return AVERROR(ENOSYS);
505  }
506 
507  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOSSLESS_ENCODE);
508  if (ctx->flags & NVENC_LOSSLESS && ret <= 0) {
509  av_log(avctx, AV_LOG_WARNING, "Lossless encoding not supported\n");
510  return AVERROR(ENOSYS);
511  }
512 
513  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_WIDTH_MAX);
514  if (ret < avctx->width) {
515  av_log(avctx, AV_LOG_WARNING, "Width %d exceeds %d\n",
516  avctx->width, ret);
517  return AVERROR(ENOSYS);
518  }
519 
520  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_HEIGHT_MAX);
521  if (ret < avctx->height) {
522  av_log(avctx, AV_LOG_WARNING, "Height %d exceeds %d\n",
523  avctx->height, ret);
524  return AVERROR(ENOSYS);
525  }
526 
527  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_NUM_MAX_BFRAMES);
528  if (ret < avctx->max_b_frames) {
529  av_log(avctx, AV_LOG_WARNING, "Max B-frames %d exceed %d\n",
530  avctx->max_b_frames, ret);
531 
532  return AVERROR(ENOSYS);
533  }
534 
535  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_FIELD_ENCODING);
536  if (ret < 1 && avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
537  av_log(avctx, AV_LOG_WARNING,
538  "Interlaced encoding is not supported. Supported level: %d\n",
539  ret);
540  return AVERROR(ENOSYS);
541  }
542 
543  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_10BIT_ENCODE);
544  if ((IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) && ret <= 0) {
545  av_log(avctx, AV_LOG_WARNING, "10 bit encode not supported\n");
546  return AVERROR(ENOSYS);
547  }
548 
549  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOOKAHEAD);
550  if (ctx->rc_lookahead > 0 && ret <= 0) {
551  av_log(avctx, AV_LOG_WARNING, "RC lookahead not supported\n");
552  return AVERROR(ENOSYS);
553  }
554 
555  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_TEMPORAL_AQ);
556  if (ctx->temporal_aq > 0 && ret <= 0) {
557  av_log(avctx, AV_LOG_WARNING, "Temporal AQ not supported\n");
558  return AVERROR(ENOSYS);
559  }
560 
561  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_WEIGHTED_PREDICTION);
562  if (ctx->weighted_pred > 0 && ret <= 0) {
563  av_log (avctx, AV_LOG_WARNING, "Weighted Prediction not supported\n");
564  return AVERROR(ENOSYS);
565  }
566 
567  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_CABAC);
568  if (ctx->coder == NV_ENC_H264_ENTROPY_CODING_MODE_CABAC && ret <= 0) {
569  av_log(avctx, AV_LOG_WARNING, "CABAC entropy coding not supported\n");
570  return AVERROR(ENOSYS);
571  }
572 
573 #ifdef NVENC_HAVE_BFRAME_REF_MODE
574  tmp = (ctx->b_ref_mode >= 0) ? ctx->b_ref_mode : NV_ENC_BFRAME_REF_MODE_DISABLED;
575  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_BFRAME_REF_MODE);
576  if (tmp == NV_ENC_BFRAME_REF_MODE_EACH && ret != 1 && ret != 3) {
577  av_log(avctx, AV_LOG_WARNING, "Each B frame as reference is not supported\n");
578  return AVERROR(ENOSYS);
579  } else if (tmp != NV_ENC_BFRAME_REF_MODE_DISABLED && ret == 0) {
580  av_log(avctx, AV_LOG_WARNING, "B frames as references are not supported\n");
581  return AVERROR(ENOSYS);
582  }
583 #else
584  tmp = (ctx->b_ref_mode >= 0) ? ctx->b_ref_mode : 0;
585  if (tmp > 0) {
586  av_log(avctx, AV_LOG_WARNING, "B frames as references need SDK 8.1 at build time\n");
587  return AVERROR(ENOSYS);
588  }
589 #endif
590 
591 #ifdef NVENC_HAVE_MULTIPLE_REF_FRAMES
592  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_MULTIPLE_REF_FRAMES);
593  if(avctx->refs != NV_ENC_NUM_REF_FRAMES_AUTOSELECT && ret <= 0) {
594  av_log(avctx, AV_LOG_WARNING, "Multiple reference frames are not supported by the device\n");
595  return AVERROR(ENOSYS);
596  }
597 #else
598  if(avctx->refs != 0) {
599  av_log(avctx, AV_LOG_WARNING, "Multiple reference frames need SDK 9.1 at build time\n");
600  return AVERROR(ENOSYS);
601  }
602 #endif
603 
604 #ifdef NVENC_HAVE_SINGLE_SLICE_INTRA_REFRESH
605  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SINGLE_SLICE_INTRA_REFRESH);
606  if(ctx->single_slice_intra_refresh && ret <= 0) {
607  av_log(avctx, AV_LOG_WARNING, "Single slice intra refresh not supported by the device\n");
608  return AVERROR(ENOSYS);
609  }
610 #else
611  if(ctx->single_slice_intra_refresh) {
612  av_log(avctx, AV_LOG_WARNING, "Single slice intra refresh needs SDK 11.1 at build time\n");
613  return AVERROR(ENOSYS);
614  }
615 #endif
616 
617  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_INTRA_REFRESH);
618  if((ctx->intra_refresh || ctx->single_slice_intra_refresh) && ret <= 0) {
619  av_log(avctx, AV_LOG_WARNING, "Intra refresh not supported by the device\n");
620  return AVERROR(ENOSYS);
621  }
622 
623 #ifndef NVENC_HAVE_HEVC_CONSTRAINED_ENCODING
624  if (ctx->constrained_encoding && avctx->codec->id == AV_CODEC_ID_HEVC) {
625  av_log(avctx, AV_LOG_WARNING, "HEVC constrained encoding needs SDK 10.0 at build time\n");
626  return AVERROR(ENOSYS);
627  }
628 #endif
629 
630  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_CONSTRAINED_ENCODING);
631  if(ctx->constrained_encoding && ret <= 0) {
632  av_log(avctx, AV_LOG_WARNING, "Constrained encoding not supported by the device\n");
633  return AVERROR(ENOSYS);
634  }
635 
636 #if defined(NVENC_HAVE_TEMPORAL_FILTER) || defined(NVENC_HAVE_H264_AND_AV1_TEMPORAL_FILTER)
637  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_TEMPORAL_FILTER);
638  if(ctx->tf_level > 0 && ret <= 0) {
639  av_log(avctx, AV_LOG_WARNING, "Temporal filtering not supported by the device\n");
640  return AVERROR(ENOSYS);
641  }
642 #endif
643 
644 #ifdef NVENC_HAVE_LOOKAHEAD_LEVEL
645  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOOKAHEAD_LEVEL);
646  if(ctx->rc_lookahead > 0 && ctx->lookahead_level > 0 &&
647  ctx->lookahead_level != NV_ENC_LOOKAHEAD_LEVEL_AUTOSELECT &&
648  ctx->lookahead_level > ret)
649  {
650  av_log(avctx, AV_LOG_WARNING, "Lookahead level not supported. Maximum level: %d\n", ret);
651  return AVERROR(ENOSYS);
652  }
653 #endif
654 
655 #ifdef NVENC_HAVE_UNIDIR_B
656  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_UNIDIRECTIONAL_B);
657  if(ctx->unidir_b && ret <= 0) {
658  av_log(avctx, AV_LOG_WARNING, "Unidirectional B-Frames not supported by the device\n");
659  return AVERROR(ENOSYS);
660  }
661 #endif
662 
663  ctx->support_dyn_bitrate = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_DYN_BITRATE_CHANGE);
664 
665 #ifdef NVENC_HAVE_MVHEVC
666  ctx->multiview_supported = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_MVHEVC_ENCODE) > 0;
667  if(ctx->profile == NV_ENC_HEVC_PROFILE_MULTIVIEW_MAIN && !ctx->multiview_supported) {
668  av_log(avctx, AV_LOG_WARNING, "Multiview not supported by the device\n");
669  return AVERROR(ENOSYS);
670  }
671 #endif
672 
673  return 0;
674 }
675 
676 static av_cold int nvenc_check_device(AVCodecContext *avctx, int idx)
677 {
678  NvencContext *ctx = avctx->priv_data;
679  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
680  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
681  char name[128] = { 0};
682  int major, minor, ret;
683  CUdevice cu_device;
684  int loglevel = AV_LOG_VERBOSE;
685 
686  if (ctx->device == LIST_DEVICES)
687  loglevel = AV_LOG_INFO;
688 
689  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceGet(&cu_device, idx));
690  if (ret < 0)
691  return ret;
692 
693  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceGetName(name, sizeof(name), cu_device));
694  if (ret < 0)
695  return ret;
696 
697  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceComputeCapability(&major, &minor, cu_device));
698  if (ret < 0)
699  return ret;
700 
701  av_log(avctx, loglevel, "[ GPU #%d - < %s > has Compute SM %d.%d ]\n", idx, name, major, minor);
702  if (((major << 4) | minor) < NVENC_CAP) {
703  av_log(avctx, loglevel, "does not support NVENC\n");
704  goto fail;
705  }
706 
707  if (ctx->device != idx && ctx->device != ANY_DEVICE)
708  return -1;
709 
710  ret = CHECK_CU(dl_fn->cuda_dl->cuCtxCreate(&ctx->cu_context_internal, 0, cu_device));
711  if (ret < 0)
712  goto fail;
713 
714  ctx->cu_context = ctx->cu_context_internal;
715  ctx->cu_stream = NULL;
716 
717  if ((ret = nvenc_pop_context(avctx)) < 0)
718  goto fail2;
719 
720  if ((ret = nvenc_open_session(avctx)) < 0)
721  goto fail2;
722 
723  if ((ret = nvenc_check_capabilities(avctx)) < 0)
724  goto fail3;
725 
726  av_log(avctx, loglevel, "supports NVENC\n");
727 
728  dl_fn->nvenc_device_count++;
729 
730  if (ctx->device == idx || ctx->device == ANY_DEVICE)
731  return 0;
732 
733 fail3:
734  if ((ret = nvenc_push_context(avctx)) < 0)
735  return ret;
736 
737  p_nvenc->nvEncDestroyEncoder(ctx->nvencoder);
738  ctx->nvencoder = NULL;
739 
740  if ((ret = nvenc_pop_context(avctx)) < 0)
741  return ret;
742 
743 fail2:
744  CHECK_CU(dl_fn->cuda_dl->cuCtxDestroy(ctx->cu_context_internal));
745  ctx->cu_context_internal = NULL;
746 
747 fail:
748  return AVERROR(ENOSYS);
749 }
750 
752 {
753  NvencContext *ctx = avctx->priv_data;
754  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
755 
756  switch (avctx->codec->id) {
757  case AV_CODEC_ID_H264:
758  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_H264_GUID;
759  break;
760  case AV_CODEC_ID_HEVC:
761  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_HEVC_GUID;
762  break;
763 #if CONFIG_AV1_NVENC_ENCODER
764  case AV_CODEC_ID_AV1:
765  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_AV1_GUID;
766  break;
767 #endif
768  default:
769  return AVERROR_BUG;
770  }
771 
773 
775  av_log(avctx, AV_LOG_WARNING, "The selected preset is deprecated. Use p1 to p7 + -tune or fast/medium/slow.\n");
776 
777  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11 || avctx->hw_frames_ctx || avctx->hw_device_ctx) {
778  AVHWFramesContext *frames_ctx;
779  AVHWDeviceContext *hwdev_ctx;
780  AVCUDADeviceContext *cuda_device_hwctx = NULL;
781 #if CONFIG_D3D11VA
782  AVD3D11VADeviceContext *d3d11_device_hwctx = NULL;
783 #endif
784  int ret;
785 
786  if (avctx->hw_frames_ctx) {
787  frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
788  if (frames_ctx->format == AV_PIX_FMT_CUDA)
789  cuda_device_hwctx = frames_ctx->device_ctx->hwctx;
790 #if CONFIG_D3D11VA
791  else if (frames_ctx->format == AV_PIX_FMT_D3D11)
792  d3d11_device_hwctx = frames_ctx->device_ctx->hwctx;
793 #endif
794  else
795  return AVERROR(EINVAL);
796  } else if (avctx->hw_device_ctx) {
797  hwdev_ctx = (AVHWDeviceContext*)avctx->hw_device_ctx->data;
798  if (hwdev_ctx->type == AV_HWDEVICE_TYPE_CUDA)
799  cuda_device_hwctx = hwdev_ctx->hwctx;
800 #if CONFIG_D3D11VA
801  else if (hwdev_ctx->type == AV_HWDEVICE_TYPE_D3D11VA)
802  d3d11_device_hwctx = hwdev_ctx->hwctx;
803 #endif
804  else
805  return AVERROR(EINVAL);
806  } else {
807  return AVERROR(EINVAL);
808  }
809 
810  if (cuda_device_hwctx) {
811  ctx->cu_context = cuda_device_hwctx->cuda_ctx;
812  ctx->cu_stream = cuda_device_hwctx->stream;
813  }
814 #if CONFIG_D3D11VA
815  else if (d3d11_device_hwctx) {
816  ctx->d3d11_device = d3d11_device_hwctx->device;
817  ID3D11Device_AddRef(ctx->d3d11_device);
818  }
819 #endif
820 
821  ret = nvenc_open_session(avctx);
822  if (ret < 0)
823  return ret;
824 
825  ret = nvenc_check_capabilities(avctx);
826  if (ret < 0) {
827  av_log(avctx, AV_LOG_FATAL, "Provided device doesn't support required NVENC features\n");
828  return ret;
829  }
830  } else {
831  int i, nb_devices = 0;
832 
833  if (CHECK_CU(dl_fn->cuda_dl->cuInit(0)) < 0)
834  return AVERROR_UNKNOWN;
835 
836  if (CHECK_CU(dl_fn->cuda_dl->cuDeviceGetCount(&nb_devices)) < 0)
837  return AVERROR_UNKNOWN;
838 
839  if (!nb_devices) {
840  av_log(avctx, AV_LOG_FATAL, "No CUDA capable devices found\n");
841  return AVERROR_EXTERNAL;
842  }
843 
844  av_log(avctx, AV_LOG_VERBOSE, "%d CUDA capable devices found\n", nb_devices);
845 
846  dl_fn->nvenc_device_count = 0;
847  for (i = 0; i < nb_devices; ++i) {
848  if ((nvenc_check_device(avctx, i)) >= 0 && ctx->device != LIST_DEVICES)
849  return 0;
850  }
851 
852  if (ctx->device == LIST_DEVICES)
853  return AVERROR_EXIT;
854 
855  if (!dl_fn->nvenc_device_count) {
856  av_log(avctx, AV_LOG_FATAL, "No capable devices found\n");
857  return AVERROR_EXTERNAL;
858  }
859 
860  av_log(avctx, AV_LOG_FATAL, "Requested GPU %d, but only %d GPUs are available!\n", ctx->device, nb_devices);
861  return AVERROR(EINVAL);
862  }
863 
864  return 0;
865 }
866 
867 static av_cold void set_constqp(AVCodecContext *avctx)
868 {
869  NvencContext *ctx = avctx->priv_data;
870  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
871 #if CONFIG_AV1_NVENC_ENCODER
872  int qmax = avctx->codec->id == AV_CODEC_ID_AV1 ? 255 : 51;
873 #else
874  int qmax = 51;
875 #endif
876 
877  rc->rateControlMode = NV_ENC_PARAMS_RC_CONSTQP;
878 
879  if (ctx->init_qp_p >= 0) {
880  rc->constQP.qpInterP = ctx->init_qp_p;
881  if (ctx->init_qp_i >= 0 && ctx->init_qp_b >= 0) {
882  rc->constQP.qpIntra = ctx->init_qp_i;
883  rc->constQP.qpInterB = ctx->init_qp_b;
884  } else if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
885  rc->constQP.qpIntra = av_clip(
886  rc->constQP.qpInterP * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, qmax);
887  rc->constQP.qpInterB = av_clip(
888  rc->constQP.qpInterP * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, qmax);
889  } else {
890  rc->constQP.qpIntra = rc->constQP.qpInterP;
891  rc->constQP.qpInterB = rc->constQP.qpInterP;
892  }
893  } else if (ctx->cqp >= 0) {
894  rc->constQP.qpInterP = rc->constQP.qpInterB = rc->constQP.qpIntra = ctx->cqp;
895  if (avctx->b_quant_factor != 0.0)
896  rc->constQP.qpInterB = av_clip(ctx->cqp * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, qmax);
897  if (avctx->i_quant_factor != 0.0)
898  rc->constQP.qpIntra = av_clip(ctx->cqp * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, qmax);
899  }
900 
901  avctx->qmin = ctx->qmin = -1;
902  avctx->qmax = ctx->qmax = -1;
903 }
904 
905 static av_cold void set_vbr(AVCodecContext *avctx)
906 {
907  NvencContext *ctx = avctx->priv_data;
908  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
909  int qp_inter_p;
910 #if CONFIG_AV1_NVENC_ENCODER
911  int qmax = avctx->codec->id == AV_CODEC_ID_AV1 ? 255 : 51;
912 #else
913  int qmax = 51;
914 #endif
915 
916  if (avctx->qmin >= 0 || avctx->qmax >= 0)
917  av_log(avctx, AV_LOG_WARNING, "Passing qmin/qmax via global AVCodecContext options. Use encoder options instead.\n");
918 
919  if (avctx->qmin >= 0 && ctx->qmin < 0)
920  ctx->qmin = avctx->qmin;
921  if (avctx->qmax >= 0 && ctx->qmax < 0)
922  ctx->qmax = avctx->qmax;
923  avctx->qmin = ctx->qmin;
924  avctx->qmax = ctx->qmax;
925 
926  if (ctx->qmin >= 0 && ctx->qmax >= 0) {
927  rc->enableMinQP = 1;
928  rc->enableMaxQP = 1;
929 
930  rc->minQP.qpInterB = ctx->qmin;
931  rc->minQP.qpInterP = ctx->qmin;
932  rc->minQP.qpIntra = ctx->qmin;
933 
934  rc->maxQP.qpInterB = ctx->qmax;
935  rc->maxQP.qpInterP = ctx->qmax;
936  rc->maxQP.qpIntra = ctx->qmax;
937 
938  qp_inter_p = (ctx->qmax + 3 * ctx->qmin) / 4; // biased towards Qmin
939  } else if (ctx->qmin >= 0) {
940  rc->enableMinQP = 1;
941 
942  rc->minQP.qpInterB = ctx->qmin;
943  rc->minQP.qpInterP = ctx->qmin;
944  rc->minQP.qpIntra = ctx->qmin;
945 
946  qp_inter_p = ctx->qmin;
947  } else {
948  qp_inter_p = 26; // default to 26
949  }
950 
951  rc->enableInitialRCQP = 1;
952 
953  if (ctx->init_qp_p < 0) {
954  rc->initialRCQP.qpInterP = qp_inter_p;
955  } else {
956  rc->initialRCQP.qpInterP = ctx->init_qp_p;
957  }
958 
959  if (ctx->init_qp_i < 0) {
960  if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
961  rc->initialRCQP.qpIntra = av_clip(
962  rc->initialRCQP.qpInterP * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, qmax);
963  } else {
964  rc->initialRCQP.qpIntra = rc->initialRCQP.qpInterP;
965  }
966  } else {
967  rc->initialRCQP.qpIntra = ctx->init_qp_i;
968  }
969 
970  if (ctx->init_qp_b < 0) {
971  if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
972  rc->initialRCQP.qpInterB = av_clip(
973  rc->initialRCQP.qpInterP * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, qmax);
974  } else {
975  rc->initialRCQP.qpInterB = rc->initialRCQP.qpInterP;
976  }
977  } else {
978  rc->initialRCQP.qpInterB = ctx->init_qp_b;
979  }
980 }
981 
983 {
984  NvencContext *ctx = avctx->priv_data;
985  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
986 
987  rc->rateControlMode = NV_ENC_PARAMS_RC_CONSTQP;
988  rc->constQP.qpInterB = 0;
989  rc->constQP.qpInterP = 0;
990  rc->constQP.qpIntra = 0;
991 
992  avctx->qmin = ctx->qmin = -1;
993  avctx->qmax = ctx->qmax = -1;
994 }
995 
997 {
998  NvencContext *ctx = avctx->priv_data;
999  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
1000 
1001  switch (ctx->rc) {
1002  case NV_ENC_PARAMS_RC_CONSTQP:
1003  set_constqp(avctx);
1004  return;
1005 #ifndef NVENC_NO_DEPRECATED_RC
1006  case NV_ENC_PARAMS_RC_VBR_MINQP:
1007  if (avctx->qmin < 0 && ctx->qmin < 0) {
1008  av_log(avctx, AV_LOG_WARNING,
1009  "The variable bitrate rate-control requires "
1010  "the 'qmin' option set.\n");
1011  set_vbr(avctx);
1012  return;
1013  }
1014  /* fall through */
1015  case NV_ENC_PARAMS_RC_VBR_HQ:
1016 #endif
1017  case NV_ENC_PARAMS_RC_VBR:
1018  set_vbr(avctx);
1019  break;
1020  case NV_ENC_PARAMS_RC_CBR:
1021 #ifndef NVENC_NO_DEPRECATED_RC
1022  case NV_ENC_PARAMS_RC_CBR_HQ:
1023  case NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ:
1024 #endif
1025  break;
1026  }
1027 
1028  rc->rateControlMode = ctx->rc;
1029 }
1030 
1032 {
1033  NvencContext *ctx = avctx->priv_data;
1034  // default minimum of 4 surfaces
1035  // multiply by 2 for number of NVENCs on gpu (hardcode to 2)
1036  // another multiply by 2 to avoid blocking next PBB group
1037  int nb_surfaces = FFMAX(4, ctx->encode_config.frameIntervalP * 2 * 2);
1038 
1039  // lookahead enabled
1040  if (ctx->rc_lookahead > 0) {
1041  // +1 is to account for lkd_bound calculation later
1042  // +4 is to allow sufficient pipelining with lookahead
1043  nb_surfaces = FFMAX(1, FFMAX(nb_surfaces, ctx->rc_lookahead + ctx->encode_config.frameIntervalP + 1 + 4));
1044  if (nb_surfaces > ctx->nb_surfaces && ctx->nb_surfaces > 0)
1045  {
1046  av_log(avctx, AV_LOG_WARNING,
1047  "Defined rc_lookahead requires more surfaces, "
1048  "increasing used surfaces %d -> %d\n", ctx->nb_surfaces, nb_surfaces);
1049  }
1050  ctx->nb_surfaces = FFMAX(nb_surfaces, ctx->nb_surfaces);
1051  } else {
1052  if (ctx->encode_config.frameIntervalP > 1 && ctx->nb_surfaces < nb_surfaces && ctx->nb_surfaces > 0)
1053  {
1054  av_log(avctx, AV_LOG_WARNING,
1055  "Defined b-frame requires more surfaces, "
1056  "increasing used surfaces %d -> %d\n", ctx->nb_surfaces, nb_surfaces);
1057  ctx->nb_surfaces = FFMAX(ctx->nb_surfaces, nb_surfaces);
1058  }
1059  else if (ctx->nb_surfaces <= 0)
1060  ctx->nb_surfaces = nb_surfaces;
1061  // otherwise use user specified value
1062  }
1063 
1064  ctx->nb_surfaces = FFMAX(1, FFMIN(MAX_REGISTERED_FRAMES, ctx->nb_surfaces));
1065  ctx->async_depth = FFMIN(ctx->async_depth, ctx->nb_surfaces - 1);
1066 
1067  // Output in the worst case will only start when the surface buffer is completely full.
1068  // Hence we need to keep at least the max amount of surfaces plus the max reorder delay around.
1069  ctx->frame_data_array_nb = FFMAX(ctx->nb_surfaces, ctx->nb_surfaces + ctx->encode_config.frameIntervalP - 1);
1070 
1071  return 0;
1072 }
1073 
1075 {
1076  NvencContext *ctx = avctx->priv_data;
1077 
1078  if (avctx->global_quality > 0)
1079  av_log(avctx, AV_LOG_WARNING, "Using global_quality with nvenc is deprecated. Use qp instead.\n");
1080 
1081  if (ctx->cqp < 0 && avctx->global_quality > 0)
1082  ctx->cqp = avctx->global_quality;
1083 
1084  if (avctx->bit_rate > 0) {
1085  ctx->encode_config.rcParams.averageBitRate = avctx->bit_rate;
1086  } else if (ctx->encode_config.rcParams.averageBitRate > 0) {
1087  ctx->encode_config.rcParams.maxBitRate = ctx->encode_config.rcParams.averageBitRate;
1088  }
1089 
1090  if (avctx->rc_max_rate > 0)
1091  ctx->encode_config.rcParams.maxBitRate = avctx->rc_max_rate;
1092 
1093 #ifdef NVENC_HAVE_MULTIPASS
1094  ctx->encode_config.rcParams.multiPass = ctx->multipass;
1095 
1096  if (ctx->flags & NVENC_ONE_PASS)
1097  ctx->encode_config.rcParams.multiPass = NV_ENC_MULTI_PASS_DISABLED;
1098  if (ctx->flags & NVENC_TWO_PASSES || ctx->twopass > 0)
1099  ctx->encode_config.rcParams.multiPass = NV_ENC_TWO_PASS_FULL_RESOLUTION;
1100 
1101  if (ctx->rc < 0) {
1102  if (ctx->cbr) {
1103  ctx->rc = NV_ENC_PARAMS_RC_CBR;
1104  } else if (ctx->cqp >= 0) {
1105  ctx->rc = NV_ENC_PARAMS_RC_CONSTQP;
1106  } else if (ctx->quality >= 0.0f) {
1107  ctx->rc = NV_ENC_PARAMS_RC_VBR;
1108  }
1109  }
1110 #else
1111  if (ctx->rc < 0) {
1112  if (ctx->flags & NVENC_ONE_PASS)
1113  ctx->twopass = 0;
1114  if (ctx->flags & NVENC_TWO_PASSES)
1115  ctx->twopass = 1;
1116 
1117  if (ctx->twopass < 0)
1118  ctx->twopass = (ctx->flags & NVENC_LOWLATENCY) != 0;
1119 
1120  if (ctx->cbr) {
1121  if (ctx->twopass) {
1122  ctx->rc = NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ;
1123  } else {
1124  ctx->rc = NV_ENC_PARAMS_RC_CBR;
1125  }
1126  } else if (ctx->cqp >= 0) {
1127  ctx->rc = NV_ENC_PARAMS_RC_CONSTQP;
1128  } else if (ctx->twopass) {
1129  ctx->rc = NV_ENC_PARAMS_RC_VBR_HQ;
1130  } else if ((avctx->qmin >= 0 && avctx->qmax >= 0) ||
1131  (ctx->qmin >= 0 && ctx->qmax >= 0)) {
1132  ctx->rc = NV_ENC_PARAMS_RC_VBR_MINQP;
1133  }
1134  }
1135 #endif
1136 
1137  if (ctx->rc >= 0 && ctx->rc & RC_MODE_DEPRECATED) {
1138  av_log(avctx, AV_LOG_WARNING, "Specified rc mode is deprecated.\n");
1139  av_log(avctx, AV_LOG_WARNING, "Use -rc constqp/cbr/vbr, -tune and -multipass instead.\n");
1140 
1141  ctx->rc &= ~RC_MODE_DEPRECATED;
1142  }
1143 
1144 #ifdef NVENC_HAVE_QP_CHROMA_OFFSETS
1145  ctx->encode_config.rcParams.cbQPIndexOffset = ctx->qp_cb_offset;
1146  ctx->encode_config.rcParams.crQPIndexOffset = ctx->qp_cr_offset;
1147 #else
1148  if (ctx->qp_cb_offset || ctx->qp_cr_offset)
1149  av_log(avctx, AV_LOG_WARNING, "Failed setting QP CB/CR offsets, SDK 11.1 or greater required at compile time.\n");
1150 #endif
1151 
1152 #ifdef NVENC_HAVE_LDKFS
1153  if (ctx->ldkfs)
1154  ctx->encode_config.rcParams.lowDelayKeyFrameScale = ctx->ldkfs;
1155 #endif
1156 
1157  if (ctx->flags & NVENC_LOSSLESS) {
1158  set_lossless(avctx);
1159  } else if (ctx->rc >= 0) {
1161  } else {
1162  ctx->encode_config.rcParams.rateControlMode = NV_ENC_PARAMS_RC_VBR;
1163  set_vbr(avctx);
1164  }
1165 
1166  if (avctx->rc_buffer_size > 0) {
1167  ctx->encode_config.rcParams.vbvBufferSize = avctx->rc_buffer_size;
1168  } else if (ctx->encode_config.rcParams.averageBitRate > 0) {
1169  avctx->rc_buffer_size = ctx->encode_config.rcParams.vbvBufferSize = 2 * ctx->encode_config.rcParams.averageBitRate;
1170  }
1171 
1172  if (ctx->aq) {
1173  ctx->encode_config.rcParams.enableAQ = 1;
1174  ctx->encode_config.rcParams.aqStrength = ctx->aq_strength;
1175  av_log(avctx, AV_LOG_VERBOSE, "AQ enabled.\n");
1176  }
1177 
1178  if (ctx->temporal_aq) {
1179  ctx->encode_config.rcParams.enableTemporalAQ = 1;
1180  av_log(avctx, AV_LOG_VERBOSE, "Temporal AQ enabled.\n");
1181  }
1182 
1183  if (ctx->rc_lookahead > 0) {
1184  int lkd_bound = FFMIN(ctx->nb_surfaces, ctx->async_depth) -
1185  ctx->encode_config.frameIntervalP - 4;
1186 
1187  if (lkd_bound < 0) {
1188  ctx->encode_config.rcParams.enableLookahead = 0;
1189  av_log(avctx, AV_LOG_WARNING,
1190  "Lookahead not enabled. Increase buffer delay (-delay).\n");
1191  } else {
1192  ctx->encode_config.rcParams.enableLookahead = 1;
1193  ctx->encode_config.rcParams.lookaheadDepth = av_clip(ctx->rc_lookahead, 0, lkd_bound);
1194  ctx->encode_config.rcParams.disableIadapt = ctx->no_scenecut;
1195  ctx->encode_config.rcParams.disableBadapt = !ctx->b_adapt;
1196  av_log(avctx, AV_LOG_VERBOSE,
1197  "Lookahead enabled: depth %d, scenecut %s, B-adapt %s.\n",
1198  ctx->encode_config.rcParams.lookaheadDepth,
1199  ctx->encode_config.rcParams.disableIadapt ? "disabled" : "enabled",
1200  ctx->encode_config.rcParams.disableBadapt ? "disabled" : "enabled");
1201  if (ctx->encode_config.rcParams.lookaheadDepth < ctx->rc_lookahead)
1202  av_log(avctx, AV_LOG_WARNING, "Clipping lookahead depth to %d (from %d) due to lack of surfaces/delay",
1203  ctx->encode_config.rcParams.lookaheadDepth, ctx->rc_lookahead);
1204 
1205 #ifdef NVENC_HAVE_LOOKAHEAD_LEVEL
1206  if (ctx->lookahead_level >= 0) {
1207  switch (ctx->lookahead_level) {
1208  case NV_ENC_LOOKAHEAD_LEVEL_0:
1209  case NV_ENC_LOOKAHEAD_LEVEL_1:
1210  case NV_ENC_LOOKAHEAD_LEVEL_2:
1211  case NV_ENC_LOOKAHEAD_LEVEL_3:
1212  case NV_ENC_LOOKAHEAD_LEVEL_AUTOSELECT:
1213  break;
1214  default:
1215  av_log(avctx, AV_LOG_ERROR, "Invalid lookahead level.\n");
1216  return AVERROR(EINVAL);
1217  }
1218 
1219  ctx->encode_config.rcParams.lookaheadLevel = ctx->lookahead_level;
1220  }
1221 #endif
1222  }
1223  }
1224 
1225  if (ctx->strict_gop) {
1226  ctx->encode_config.rcParams.strictGOPTarget = 1;
1227  av_log(avctx, AV_LOG_VERBOSE, "Strict GOP target enabled.\n");
1228  }
1229 
1230  if (ctx->nonref_p)
1231  ctx->encode_config.rcParams.enableNonRefP = 1;
1232 
1233  if (ctx->zerolatency)
1234  ctx->encode_config.rcParams.zeroReorderDelay = 1;
1235 
1236  if (ctx->quality) {
1237  //convert from float to fixed point 8.8
1238  int tmp_quality = (int)(ctx->quality * 256.0f);
1239  ctx->encode_config.rcParams.targetQuality = (uint8_t)(tmp_quality >> 8);
1240  ctx->encode_config.rcParams.targetQualityLSB = (uint8_t)(tmp_quality & 0xff);
1241 
1242  av_log(avctx, AV_LOG_VERBOSE, "CQ(%d) mode enabled.\n", tmp_quality);
1243 
1244  // CQ mode shall discard avg bitrate/vbv buffer size and honor only max bitrate
1245  ctx->encode_config.rcParams.averageBitRate = avctx->bit_rate = 0;
1246  ctx->encode_config.rcParams.vbvBufferSize = avctx->rc_buffer_size = 0;
1247  ctx->encode_config.rcParams.maxBitRate = avctx->rc_max_rate;
1248  }
1249 
1250  return 0;
1251 }
1252 
1254 {
1255  NvencContext *ctx = avctx->priv_data;
1256  NV_ENC_CONFIG *cc = &ctx->encode_config;
1257  NV_ENC_CONFIG_H264 *h264 = &cc->encodeCodecConfig.h264Config;
1258  NV_ENC_CONFIG_H264_VUI_PARAMETERS *vui = &h264->h264VUIParameters;
1259 
1260  const AVPixFmtDescriptor *pixdesc = av_pix_fmt_desc_get(ctx->data_pix_fmt);
1261 
1262  if ((pixdesc->flags & AV_PIX_FMT_FLAG_RGB) && !IS_GBRP(ctx->data_pix_fmt)) {
1263  vui->colourMatrix = AVCOL_SPC_BT470BG;
1264  vui->colourPrimaries = avctx->color_primaries;
1265  vui->transferCharacteristics = avctx->color_trc;
1266  vui->videoFullRangeFlag = 0;
1267  } else {
1268  vui->colourMatrix = IS_GBRP(ctx->data_pix_fmt) ? AVCOL_SPC_RGB : avctx->colorspace;
1269  vui->colourPrimaries = avctx->color_primaries;
1270  vui->transferCharacteristics = avctx->color_trc;
1271  vui->videoFullRangeFlag = (avctx->color_range == AVCOL_RANGE_JPEG
1272  || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
1273  }
1274 
1275  vui->colourDescriptionPresentFlag =
1276  (vui->colourMatrix != 2 || vui->colourPrimaries != 2 || vui->transferCharacteristics != 2);
1277 
1278  vui->videoSignalTypePresentFlag =
1279  (vui->colourDescriptionPresentFlag
1280  || vui->videoFormat != 5
1281  || vui->videoFullRangeFlag != 0);
1282 
1283  if (ctx->max_slice_size > 0) {
1284  h264->sliceMode = 1;
1285  h264->sliceModeData = ctx->max_slice_size;
1286  } else {
1287  h264->sliceMode = 3;
1288  h264->sliceModeData = avctx->slices > 0 ? avctx->slices : 1;
1289  }
1290 
1291  if (ctx->intra_refresh) {
1292  h264->enableIntraRefresh = 1;
1293  h264->intraRefreshPeriod = cc->gopLength;
1294  h264->intraRefreshCnt = cc->gopLength - 1;
1295  cc->gopLength = NVENC_INFINITE_GOPLENGTH;
1296  h264->outputRecoveryPointSEI = 1;
1297 #ifdef NVENC_HAVE_SINGLE_SLICE_INTRA_REFRESH
1298  h264->singleSliceIntraRefresh = ctx->single_slice_intra_refresh;
1299 #endif
1300  }
1301 
1302  if (ctx->constrained_encoding)
1303  h264->enableConstrainedEncoding = 1;
1304 
1305  h264->disableSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 1 : 0;
1306  h264->repeatSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 0 : 1;
1307  h264->outputAUD = ctx->aud;
1308 
1309  if (ctx->dpb_size >= 0) {
1310  /* 0 means "let the hardware decide" */
1311  h264->maxNumRefFrames = ctx->dpb_size;
1312  }
1313 
1314  h264->idrPeriod = cc->gopLength;
1315 
1316  if (IS_CBR(cc->rcParams.rateControlMode)) {
1317  /* Older SDKs use outputBufferingPeriodSEI to control filler data */
1318  h264->outputBufferingPeriodSEI = ctx->cbr_padding;
1319 
1320 #ifdef NVENC_HAVE_FILLER_DATA
1321  h264->enableFillerDataInsertion = ctx->cbr_padding;
1322 #endif
1323  }
1324 
1325  h264->outputPictureTimingSEI = 1;
1326 
1327 #ifndef NVENC_NO_DEPRECATED_RC
1328  if (cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ ||
1329  cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_CBR_HQ ||
1330  cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_VBR_HQ) {
1331  h264->adaptiveTransformMode = NV_ENC_H264_ADAPTIVE_TRANSFORM_ENABLE;
1332  h264->fmoMode = NV_ENC_H264_FMO_DISABLE;
1333  }
1334 #endif
1335 
1336  if (ctx->flags & NVENC_LOSSLESS) {
1337  h264->qpPrimeYZeroTransformBypassFlag = 1;
1338  } else {
1339  switch(ctx->profile) {
1341  cc->profileGUID = NV_ENC_H264_PROFILE_BASELINE_GUID;
1343  break;
1345  cc->profileGUID = NV_ENC_H264_PROFILE_MAIN_GUID;
1346  avctx->profile = AV_PROFILE_H264_MAIN;
1347  break;
1349  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_GUID;
1350  avctx->profile = AV_PROFILE_H264_HIGH;
1351  break;
1352 #ifdef NVENC_HAVE_H264_10BIT_SUPPORT
1353  case NV_ENC_H264_PROFILE_HIGH_10:
1354  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_10_GUID;
1356  break;
1357 #endif
1358 #ifdef NVENC_HAVE_422_SUPPORT
1359  case NV_ENC_H264_PROFILE_HIGH_422:
1360  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_422_GUID;
1362  break;
1363 #endif
1365  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_444_GUID;
1367  break;
1368  }
1369  }
1370 
1371 #ifdef NVENC_HAVE_H264_10BIT_SUPPORT
1372  // force setting profile as high10 if input is 10 bit or if it should be encoded as 10 bit
1373  if (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) {
1374  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_10_GUID;
1376  }
1377 #endif
1378 
1379  // force setting profile as high444p if input is AV_PIX_FMT_YUV444P
1380  if (IS_YUV444(ctx->data_pix_fmt)) {
1381  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_444_GUID;
1383  }
1384 
1385 #ifdef NVENC_HAVE_422_SUPPORT
1386  // force setting profile as high422p if input is AV_PIX_FMT_YUV422P
1387  if (IS_YUV422(ctx->data_pix_fmt)) {
1388  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_422_GUID;
1390  }
1391 #endif
1392 
1393  vui->bitstreamRestrictionFlag = cc->gopLength != 1 || avctx->profile < AV_PROFILE_H264_HIGH;
1394 
1395  h264->chromaFormatIDC = IS_YUV444(ctx->data_pix_fmt) ? 3 : IS_YUV422(ctx->data_pix_fmt) ? 2 : 1;
1396 
1397  h264->level = ctx->level;
1398 
1399 #ifdef NVENC_HAVE_NEW_BIT_DEPTH_API
1400  h264->inputBitDepth = IS_10BIT(ctx->data_pix_fmt) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1401  h264->outputBitDepth = (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1402 #endif
1403 
1404  if (ctx->coder >= 0)
1405  h264->entropyCodingMode = ctx->coder;
1406 
1407 #ifdef NVENC_HAVE_BFRAME_REF_MODE
1408  if (ctx->b_ref_mode >= 0)
1409  h264->useBFramesAsRef = ctx->b_ref_mode;
1410 #endif
1411 
1412 #ifdef NVENC_HAVE_MULTIPLE_REF_FRAMES
1413  h264->numRefL0 = avctx->refs;
1414  h264->numRefL1 = avctx->refs;
1415 #endif
1416 
1417 #ifdef NVENC_HAVE_H264_AND_AV1_TEMPORAL_FILTER
1418  if (ctx->tf_level >= 0) {
1419  h264->tfLevel = ctx->tf_level;
1420 
1421  switch (ctx->tf_level)
1422  {
1423  case NV_ENC_TEMPORAL_FILTER_LEVEL_0:
1424  case NV_ENC_TEMPORAL_FILTER_LEVEL_4:
1425  break;
1426  default:
1427  av_log(avctx, AV_LOG_ERROR, "Invalid temporal filtering level.\n");
1428  return AVERROR(EINVAL);
1429  }
1430 
1431  if (ctx->encode_config.frameIntervalP < 5)
1432  av_log(avctx, AV_LOG_WARNING, "Temporal filtering needs at least 4 B-Frames (-bf 4).\n");
1433  }
1434 #endif
1435 
1436 #ifdef NVENC_HAVE_TIME_CODE
1437  if (ctx->s12m_tc)
1438  h264->enableTimeCode = 1;
1439 #endif
1440 
1441  return 0;
1442 }
1443 
1445 {
1446  NvencContext *ctx = avctx->priv_data;
1447  NV_ENC_CONFIG *cc = &ctx->encode_config;
1448  NV_ENC_CONFIG_HEVC *hevc = &cc->encodeCodecConfig.hevcConfig;
1449  NV_ENC_CONFIG_HEVC_VUI_PARAMETERS *vui = &hevc->hevcVUIParameters;
1450 
1451  const AVPixFmtDescriptor *pixdesc = av_pix_fmt_desc_get(ctx->data_pix_fmt);
1452 
1453  if ((pixdesc->flags & AV_PIX_FMT_FLAG_RGB) && !IS_GBRP(ctx->data_pix_fmt)) {
1454  vui->colourMatrix = AVCOL_SPC_BT470BG;
1455  vui->colourPrimaries = avctx->color_primaries;
1456  vui->transferCharacteristics = avctx->color_trc;
1457  vui->videoFullRangeFlag = 0;
1458  } else {
1459  vui->colourMatrix = IS_GBRP(ctx->data_pix_fmt) ? AVCOL_SPC_RGB : avctx->colorspace;
1460  vui->colourPrimaries = avctx->color_primaries;
1461  vui->transferCharacteristics = avctx->color_trc;
1462  vui->videoFullRangeFlag = (avctx->color_range == AVCOL_RANGE_JPEG
1463  || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
1464  }
1465 
1466  vui->colourDescriptionPresentFlag =
1467  (vui->colourMatrix != 2 || vui->colourPrimaries != 2 || vui->transferCharacteristics != 2);
1468 
1469  vui->videoSignalTypePresentFlag =
1470  (vui->colourDescriptionPresentFlag
1471  || vui->videoFormat != 5
1472  || vui->videoFullRangeFlag != 0);
1473 
1474  if (ctx->max_slice_size > 0) {
1475  hevc->sliceMode = 1;
1476  hevc->sliceModeData = ctx->max_slice_size;
1477  } else {
1478  hevc->sliceMode = 3;
1479  hevc->sliceModeData = avctx->slices > 0 ? avctx->slices : 1;
1480  }
1481 
1482  if (ctx->intra_refresh) {
1483  hevc->enableIntraRefresh = 1;
1484  hevc->intraRefreshPeriod = cc->gopLength;
1485  hevc->intraRefreshCnt = cc->gopLength - 1;
1486  cc->gopLength = NVENC_INFINITE_GOPLENGTH;
1487 #ifdef NVENC_HAVE_HEVC_OUTPUT_RECOVERY_POINT_SEI
1488  hevc->outputRecoveryPointSEI = 1;
1489 #endif
1490 #ifdef NVENC_HAVE_SINGLE_SLICE_INTRA_REFRESH
1491  hevc->singleSliceIntraRefresh = ctx->single_slice_intra_refresh;
1492 #endif
1493  }
1494 
1495 #ifdef NVENC_HAVE_HEVC_AND_AV1_MASTERING_METADATA
1496  ctx->mdm = hevc->outputMasteringDisplay = !!av_frame_side_data_get(avctx->decoded_side_data,
1497  avctx->nb_decoded_side_data,
1499  ctx->cll = hevc->outputMaxCll = !!av_frame_side_data_get(avctx->decoded_side_data,
1500  avctx->nb_decoded_side_data,
1502 #endif
1503 
1504 #ifdef NVENC_HAVE_HEVC_CONSTRAINED_ENCODING
1505  if (ctx->constrained_encoding)
1506  hevc->enableConstrainedEncoding = 1;
1507 #endif
1508 
1509  hevc->disableSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 1 : 0;
1510  hevc->repeatSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 0 : 1;
1511  hevc->outputAUD = ctx->aud;
1512 
1513  if (ctx->dpb_size >= 0) {
1514  /* 0 means "let the hardware decide" */
1515  hevc->maxNumRefFramesInDPB = ctx->dpb_size;
1516  }
1517 
1518  hevc->idrPeriod = cc->gopLength;
1519 
1520  if (IS_CBR(cc->rcParams.rateControlMode)) {
1521  /* Older SDKs use outputBufferingPeriodSEI to control filler data */
1522  hevc->outputBufferingPeriodSEI = ctx->cbr_padding;
1523 
1524 #ifdef NVENC_HAVE_FILLER_DATA
1525  hevc->enableFillerDataInsertion = ctx->cbr_padding;
1526 #endif
1527  }
1528 
1529  hevc->outputPictureTimingSEI = 1;
1530 
1531 #ifdef NVENC_HAVE_MVHEVC
1532  if (ctx->multiview_supported && (ctx->profile == NV_ENC_HEVC_PROFILE_MAIN || ctx->profile == NV_ENC_HEVC_PROFILE_MULTIVIEW_MAIN)) {
1535  const AVStereo3D *stereo3d = sd_stereo3d ? (const AVStereo3D*)sd_stereo3d->data : NULL;
1536 
1537  if (sd_tdrdi && stereo3d && stereo3d->type == AV_STEREO3D_FRAMESEQUENCE)
1538  ctx->profile = NV_ENC_HEVC_PROFILE_MULTIVIEW_MAIN;
1539 
1540  if (ctx->profile == NV_ENC_HEVC_PROFILE_MULTIVIEW_MAIN && stereo3d &&
1541  stereo3d->type != AV_STEREO3D_2D &&
1542  stereo3d->type != AV_STEREO3D_UNSPEC &&
1543  stereo3d->type != AV_STEREO3D_FRAMESEQUENCE)
1544  {
1545  av_log(avctx, AV_LOG_WARNING, "Unsupported multiview input, disabling multiview encoding.\n");
1546  ctx->profile = NV_ENC_HEVC_PROFILE_MAIN;
1547  }
1548  }
1549 #endif
1550 
1551  switch (ctx->profile) {
1553  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN_GUID;
1554  avctx->profile = AV_PROFILE_HEVC_MAIN;
1555  break;
1557  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN10_GUID;
1559  break;
1561  cc->profileGUID = NV_ENC_HEVC_PROFILE_FREXT_GUID;
1562  avctx->profile = AV_PROFILE_HEVC_REXT;
1563  break;
1564 #ifdef NVENC_HAVE_MVHEVC
1565  case NV_ENC_HEVC_PROFILE_MULTIVIEW_MAIN:
1566  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN_GUID;
1568  ctx->multiview = 1;
1569 
1570  hevc->enableMVHEVC = 1;
1571  hevc->outputHevc3DReferenceDisplayInfo = 1;
1572 
1573  av_log(avctx, AV_LOG_VERBOSE, "Enabling MV HEVC encoding.\n");
1574  break;
1575 #endif
1576  }
1577 
1578  // force setting profile as main10 if input is 10 bit or if it should be encoded as 10 bit
1579  if (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) {
1580  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN10_GUID;
1582  }
1583 
1584  // force setting profile as rext if input is yuv444 or yuv422
1585  if (IS_YUV444(ctx->data_pix_fmt) || IS_YUV422(ctx->data_pix_fmt)) {
1586  cc->profileGUID = NV_ENC_HEVC_PROFILE_FREXT_GUID;
1587  avctx->profile = AV_PROFILE_HEVC_REXT;
1588  }
1589 
1590 #ifdef NVENC_HAVE_MVHEVC
1591  if (ctx->multiview && avctx->profile != AV_PROFILE_HEVC_MULTIVIEW_MAIN) {
1592  av_log(avctx, AV_LOG_ERROR, "Multiview encoding only works for Main profile content.\n");
1593  return AVERROR(EINVAL);
1594  }
1595 #endif
1596 
1597  hevc->chromaFormatIDC = IS_YUV444(ctx->data_pix_fmt) ? 3 : IS_YUV422(ctx->data_pix_fmt) ? 2 : 1;
1598 
1599 #ifdef NVENC_HAVE_NEW_BIT_DEPTH_API
1600  hevc->inputBitDepth = IS_10BIT(ctx->data_pix_fmt) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1601  hevc->outputBitDepth = (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1602 #else
1603  hevc->pixelBitDepthMinus8 = IS_10BIT(ctx->data_pix_fmt) ? 2 : 0;
1604 #endif
1605 
1606  hevc->level = ctx->level;
1607 
1608  hevc->tier = ctx->tier;
1609 
1610 #ifdef NVENC_HAVE_HEVC_BFRAME_REF_MODE
1611  if (ctx->b_ref_mode >= 0)
1612  hevc->useBFramesAsRef = ctx->b_ref_mode;
1613 #endif
1614 
1615 #ifdef NVENC_HAVE_MULTIPLE_REF_FRAMES
1616  hevc->numRefL0 = avctx->refs;
1617  hevc->numRefL1 = avctx->refs;
1618 #endif
1619 
1620 #ifdef NVENC_HAVE_TEMPORAL_FILTER
1621  if (ctx->tf_level >= 0) {
1622  hevc->tfLevel = ctx->tf_level;
1623 
1624  switch (ctx->tf_level)
1625  {
1626  case NV_ENC_TEMPORAL_FILTER_LEVEL_0:
1627  case NV_ENC_TEMPORAL_FILTER_LEVEL_4:
1628  break;
1629  default:
1630  av_log(avctx, AV_LOG_ERROR, "Invalid temporal filtering level.\n");
1631  return AVERROR(EINVAL);
1632  }
1633 
1634  if (ctx->encode_config.frameIntervalP < 5)
1635  av_log(avctx, AV_LOG_WARNING, "Temporal filtering needs at least 4 B-Frames (-bf 4).\n");
1636  }
1637 #endif
1638 
1639  return 0;
1640 }
1641 
1642 #if CONFIG_AV1_NVENC_ENCODER
1643 static av_cold int nvenc_setup_av1_config(AVCodecContext *avctx)
1644 {
1645  NvencContext *ctx = avctx->priv_data;
1646  NV_ENC_CONFIG *cc = &ctx->encode_config;
1647  NV_ENC_CONFIG_AV1 *av1 = &cc->encodeCodecConfig.av1Config;
1648 
1649  const AVPixFmtDescriptor *pixdesc = av_pix_fmt_desc_get(ctx->data_pix_fmt);
1650 
1651  if ((pixdesc->flags & AV_PIX_FMT_FLAG_RGB) && !IS_GBRP(ctx->data_pix_fmt)) {
1652  av1->matrixCoefficients = AVCOL_SPC_BT470BG;
1653  av1->colorPrimaries = avctx->color_primaries;
1654  av1->transferCharacteristics = avctx->color_trc;
1655  av1->colorRange = 0;
1656  } else {
1657  av1->matrixCoefficients = IS_GBRP(ctx->data_pix_fmt) ? AVCOL_SPC_RGB : avctx->colorspace;
1658  av1->colorPrimaries = avctx->color_primaries;
1659  av1->transferCharacteristics = avctx->color_trc;
1660  av1->colorRange = (avctx->color_range == AVCOL_RANGE_JPEG
1661  || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
1662  }
1663 
1664  if (IS_YUV444(ctx->data_pix_fmt)) {
1665  av_log(avctx, AV_LOG_ERROR, "AV1 High Profile not supported, required for 4:4:4 encoding\n");
1666  return AVERROR(ENOTSUP);
1667  } else {
1668  cc->profileGUID = NV_ENC_AV1_PROFILE_MAIN_GUID;
1669  avctx->profile = AV_PROFILE_AV1_MAIN;
1670  }
1671 
1672  if (ctx->dpb_size >= 0) {
1673  /* 0 means "let the hardware decide" */
1674  av1->maxNumRefFramesInDPB = ctx->dpb_size;
1675  }
1676 
1677  if (ctx->intra_refresh) {
1678  av1->enableIntraRefresh = 1;
1679  av1->intraRefreshPeriod = cc->gopLength;
1680  av1->intraRefreshCnt = cc->gopLength - 1;
1681  cc->gopLength = NVENC_INFINITE_GOPLENGTH;
1682  }
1683 
1684  av1->idrPeriod = cc->gopLength;
1685 
1686  if (IS_CBR(cc->rcParams.rateControlMode)) {
1687  av1->enableBitstreamPadding = ctx->cbr_padding;
1688  }
1689 
1690  if (ctx->tile_cols >= 0)
1691  av1->numTileColumns = ctx->tile_cols;
1692  if (ctx->tile_rows >= 0)
1693  av1->numTileRows = ctx->tile_rows;
1694 
1695  av1->outputAnnexBFormat = 0;
1696 
1697  av1->level = ctx->level;
1698  av1->tier = ctx->tier;
1699 
1700  av1->enableTimingInfo = ctx->timing_info;
1701 
1702  /* mp4 encapsulation requires sequence headers to be present on all keyframes for AV1 */
1703  av1->disableSeqHdr = 0;
1704  av1->repeatSeqHdr = 1;
1705 
1706  av1->chromaFormatIDC = IS_YUV444(ctx->data_pix_fmt) ? 3 : 1;
1707 
1708 #ifdef NVENC_HAVE_NEW_BIT_DEPTH_API
1709  av1->inputBitDepth = IS_10BIT(ctx->data_pix_fmt) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1710  av1->outputBitDepth = (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1711 #else
1712  av1->inputPixelBitDepthMinus8 = IS_10BIT(ctx->data_pix_fmt) ? 2 : 0;
1713  av1->pixelBitDepthMinus8 = (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) ? 2 : 0;
1714 #endif
1715 
1716 #ifdef NVENC_HAVE_HEVC_AND_AV1_MASTERING_METADATA
1717  ctx->mdm = av1->outputMasteringDisplay = !!av_frame_side_data_get(avctx->decoded_side_data,
1718  avctx->nb_decoded_side_data,
1720  ctx->cll = av1->outputMaxCll = !!av_frame_side_data_get(avctx->decoded_side_data,
1721  avctx->nb_decoded_side_data,
1723 #endif
1724 
1725  if (ctx->b_ref_mode >= 0)
1726  av1->useBFramesAsRef = ctx->b_ref_mode;
1727 
1728  av1->numFwdRefs = avctx->refs;
1729  av1->numBwdRefs = avctx->refs;
1730 
1731 #ifdef NVENC_HAVE_H264_AND_AV1_TEMPORAL_FILTER
1732  if (ctx->tf_level >= 0) {
1733  av1->tfLevel = ctx->tf_level;
1734 
1735  switch (ctx->tf_level)
1736  {
1737  case NV_ENC_TEMPORAL_FILTER_LEVEL_0:
1738  case NV_ENC_TEMPORAL_FILTER_LEVEL_4:
1739  break;
1740  default:
1741  av_log(avctx, AV_LOG_ERROR, "Invalid temporal filtering level.\n");
1742  return AVERROR(EINVAL);
1743  }
1744 
1745  if (ctx->encode_config.frameIntervalP < 5)
1746  av_log(avctx, AV_LOG_WARNING, "Temporal filtering needs at least 4 B-Frames (-bf 4).\n");
1747  }
1748 #endif
1749 
1750  return 0;
1751 }
1752 #endif
1753 
1755 {
1756  switch (avctx->codec->id) {
1757  case AV_CODEC_ID_H264:
1758  return nvenc_setup_h264_config(avctx);
1759  case AV_CODEC_ID_HEVC:
1760  return nvenc_setup_hevc_config(avctx);
1761 #if CONFIG_AV1_NVENC_ENCODER
1762  case AV_CODEC_ID_AV1:
1763  return nvenc_setup_av1_config(avctx);
1764 #endif
1765  /* Earlier switch/case will return if unknown codec is passed. */
1766  }
1767 
1768  return 0;
1769 }
1770 
1771 static void compute_dar(AVCodecContext *avctx, int *dw, int *dh) {
1772  int sw, sh;
1773 
1774  sw = avctx->width;
1775  sh = avctx->height;
1776 
1777 #if CONFIG_AV1_NVENC_ENCODER
1778  if (avctx->codec->id == AV_CODEC_ID_AV1) {
1779  /* For AV1 we actually need to calculate the render width/height, not the dar */
1780  if (avctx->sample_aspect_ratio.num > 0 && avctx->sample_aspect_ratio.den > 0
1781  && avctx->sample_aspect_ratio.num != avctx->sample_aspect_ratio.den)
1782  {
1783  if (avctx->sample_aspect_ratio.num > avctx->sample_aspect_ratio.den) {
1784  sw = av_rescale(sw, avctx->sample_aspect_ratio.num, avctx->sample_aspect_ratio.den);
1785  } else {
1786  sh = av_rescale(sh, avctx->sample_aspect_ratio.den, avctx->sample_aspect_ratio.num);
1787  }
1788  }
1789 
1790  *dw = sw;
1791  *dh = sh;
1792  return;
1793  }
1794 #endif
1795 
1796  if (avctx->sample_aspect_ratio.num > 0 && avctx->sample_aspect_ratio.den > 0) {
1797  sw *= avctx->sample_aspect_ratio.num;
1798  sh *= avctx->sample_aspect_ratio.den;
1799  }
1800 
1801  av_reduce(dw, dh, sw, sh, 1024 * 1024);
1802 }
1803 
1805 {
1806  NvencContext *ctx = avctx->priv_data;
1807  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1808  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1809 
1810  NV_ENC_PRESET_CONFIG preset_config = { 0 };
1811  NVENCSTATUS nv_status = NV_ENC_SUCCESS;
1812  AVCPBProperties *cpb_props;
1813  int res = 0;
1814  int dw, dh;
1815 
1816  ctx->encode_config.version = NV_ENC_CONFIG_VER;
1817  ctx->init_encode_params.version = NV_ENC_INITIALIZE_PARAMS_VER;
1818 
1819  ctx->init_encode_params.encodeHeight = avctx->height;
1820  ctx->init_encode_params.encodeWidth = avctx->width;
1821 
1822  ctx->init_encode_params.encodeConfig = &ctx->encode_config;
1823 
1824  preset_config.version = NV_ENC_PRESET_CONFIG_VER;
1825  preset_config.presetCfg.version = NV_ENC_CONFIG_VER;
1826 
1827 #ifdef NVENC_HAVE_NEW_PRESETS
1828  ctx->init_encode_params.tuningInfo = ctx->tuning_info;
1829 
1830  if (ctx->flags & NVENC_LOSSLESS)
1831  ctx->init_encode_params.tuningInfo = NV_ENC_TUNING_INFO_LOSSLESS;
1832  else if (ctx->flags & NVENC_LOWLATENCY)
1833  ctx->init_encode_params.tuningInfo = NV_ENC_TUNING_INFO_LOW_LATENCY;
1834 
1835  nv_status = p_nvenc->nvEncGetEncodePresetConfigEx(ctx->nvencoder,
1836  ctx->init_encode_params.encodeGUID,
1837  ctx->init_encode_params.presetGUID,
1838  ctx->init_encode_params.tuningInfo,
1839  &preset_config);
1840 #else
1841  nv_status = p_nvenc->nvEncGetEncodePresetConfig(ctx->nvencoder,
1842  ctx->init_encode_params.encodeGUID,
1843  ctx->init_encode_params.presetGUID,
1844  &preset_config);
1845 #endif
1846  if (nv_status != NV_ENC_SUCCESS)
1847  return nvenc_print_error(avctx, nv_status, "Cannot get the preset configuration");
1848 
1849  memcpy(&ctx->encode_config, &preset_config.presetCfg, sizeof(ctx->encode_config));
1850 
1851  ctx->encode_config.version = NV_ENC_CONFIG_VER;
1852 
1853  compute_dar(avctx, &dw, &dh);
1854  ctx->init_encode_params.darHeight = dh;
1855  ctx->init_encode_params.darWidth = dw;
1856 
1857  if (avctx->framerate.num > 0 && avctx->framerate.den > 0) {
1858  ctx->init_encode_params.frameRateNum = avctx->framerate.num;
1859  ctx->init_encode_params.frameRateDen = avctx->framerate.den;
1860  } else {
1861  ctx->init_encode_params.frameRateNum = avctx->time_base.den;
1862  ctx->init_encode_params.frameRateDen = avctx->time_base.num;
1863  }
1864 
1865 #ifdef NVENC_HAVE_UNIDIR_B
1866  ctx->init_encode_params.enableUniDirectionalB = ctx->unidir_b;
1867 #endif
1868 
1869  ctx->init_encode_params.enableEncodeAsync = 0;
1870  ctx->init_encode_params.enablePTD = 1;
1871 
1872 #ifdef NVENC_HAVE_NEW_PRESETS
1873  /* If lookahead isn't set from CLI, use value from preset.
1874  * P6 & P7 presets may enable lookahead for better quality.
1875  * */
1876  if (ctx->rc_lookahead == 0 && ctx->encode_config.rcParams.enableLookahead)
1877  ctx->rc_lookahead = ctx->encode_config.rcParams.lookaheadDepth;
1878 #endif
1879 
1880  if (ctx->weighted_pred == 1)
1881  ctx->init_encode_params.enableWeightedPrediction = 1;
1882 
1883 #ifdef NVENC_HAVE_SPLIT_FRAME_ENCODING
1884  ctx->init_encode_params.splitEncodeMode = ctx->split_encode_mode;
1885 
1886  if (ctx->split_encode_mode != NV_ENC_SPLIT_DISABLE_MODE) {
1887  if (avctx->codec->id == AV_CODEC_ID_HEVC && ctx->weighted_pred == 1)
1888  av_log(avctx, AV_LOG_WARNING, "Split encoding not supported with weighted prediction enabled.\n");
1889  }
1890 #endif
1891 
1892  if (ctx->bluray_compat) {
1893  ctx->aud = 1;
1894  ctx->dpb_size = FFMIN(FFMAX(avctx->refs, 0), 6);
1895  avctx->max_b_frames = FFMIN(avctx->max_b_frames, 3);
1896  switch (avctx->codec->id) {
1897  case AV_CODEC_ID_H264:
1898  /* maximum level depends on used resolution */
1899  break;
1900  case AV_CODEC_ID_HEVC:
1901  ctx->level = NV_ENC_LEVEL_HEVC_51;
1902  ctx->tier = NV_ENC_TIER_HEVC_HIGH;
1903  break;
1904  }
1905  }
1906 
1907  if (avctx->gop_size > 0) {
1908  // only overwrite preset if a GOP size was selected as input
1909  ctx->encode_config.gopLength = avctx->gop_size;
1910  } else if (avctx->gop_size == 0) {
1911  ctx->encode_config.frameIntervalP = 0;
1912  ctx->encode_config.gopLength = 1;
1913  }
1914 
1915  if (avctx->max_b_frames >= 0 && ctx->encode_config.gopLength > 1) {
1916  /* 0 is intra-only, 1 is I/P only, 2 is one B-Frame, 3 two B-frames, and so on. */
1917  ctx->encode_config.frameIntervalP = avctx->max_b_frames + 1;
1918  }
1919 
1920  /* force to enable intra refresh */
1921  if(ctx->single_slice_intra_refresh)
1922  ctx->intra_refresh = 1;
1923 
1924  nvenc_recalc_surfaces(avctx);
1925 
1926  res = nvenc_setup_rate_control(avctx);
1927  if (res < 0)
1928  return res;
1929 
1930  if (avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
1931  ctx->encode_config.frameFieldMode = NV_ENC_PARAMS_FRAME_FIELD_MODE_FIELD;
1932  } else {
1933  ctx->encode_config.frameFieldMode = NV_ENC_PARAMS_FRAME_FIELD_MODE_FRAME;
1934  }
1935 
1936  res = nvenc_setup_codec_config(avctx);
1937  if (res)
1938  return res;
1939 
1940  res = nvenc_push_context(avctx);
1941  if (res < 0)
1942  return res;
1943 
1944  nv_status = p_nvenc->nvEncInitializeEncoder(ctx->nvencoder, &ctx->init_encode_params);
1945  if (nv_status != NV_ENC_SUCCESS) {
1946  nvenc_pop_context(avctx);
1947  return nvenc_print_error(avctx, nv_status, "InitializeEncoder failed");
1948  }
1949 
1950 #ifdef NVENC_HAVE_CUSTREAM_PTR
1951  if (ctx->cu_context) {
1952  nv_status = p_nvenc->nvEncSetIOCudaStreams(ctx->nvencoder, &ctx->cu_stream, &ctx->cu_stream);
1953  if (nv_status != NV_ENC_SUCCESS) {
1954  nvenc_pop_context(avctx);
1955  return nvenc_print_error(avctx, nv_status, "SetIOCudaStreams failed");
1956  }
1957  }
1958 #endif
1959 
1960  res = nvenc_pop_context(avctx);
1961  if (res < 0)
1962  return res;
1963 
1964  if (ctx->encode_config.frameIntervalP > 1)
1965  avctx->has_b_frames = 2;
1966 
1967  if (ctx->encode_config.rcParams.averageBitRate > 0)
1968  avctx->bit_rate = ctx->encode_config.rcParams.averageBitRate;
1969 
1970  cpb_props = ff_encode_add_cpb_side_data(avctx);
1971  if (!cpb_props)
1972  return AVERROR(ENOMEM);
1973  cpb_props->max_bitrate = ctx->encode_config.rcParams.maxBitRate;
1974  cpb_props->avg_bitrate = avctx->bit_rate;
1975  cpb_props->buffer_size = ctx->encode_config.rcParams.vbvBufferSize;
1976 
1977  return 0;
1978 }
1979 
1980 static NV_ENC_BUFFER_FORMAT nvenc_map_buffer_format(enum AVPixelFormat pix_fmt)
1981 {
1982  switch (pix_fmt) {
1983  case AV_PIX_FMT_YUV420P:
1984  return NV_ENC_BUFFER_FORMAT_YV12;
1985  case AV_PIX_FMT_NV12:
1986  return NV_ENC_BUFFER_FORMAT_NV12;
1987  case AV_PIX_FMT_P010:
1988  case AV_PIX_FMT_P016:
1989  return NV_ENC_BUFFER_FORMAT_YUV420_10BIT;
1990  case AV_PIX_FMT_GBRP:
1991  case AV_PIX_FMT_YUV444P:
1992  return NV_ENC_BUFFER_FORMAT_YUV444;
1993  case AV_PIX_FMT_GBRP16:
1994  case AV_PIX_FMT_YUV444P16:
1995  return NV_ENC_BUFFER_FORMAT_YUV444_10BIT;
1996  case AV_PIX_FMT_0RGB32:
1997  case AV_PIX_FMT_RGB32:
1998  return NV_ENC_BUFFER_FORMAT_ARGB;
1999  case AV_PIX_FMT_0BGR32:
2000  case AV_PIX_FMT_BGR32:
2001  return NV_ENC_BUFFER_FORMAT_ABGR;
2002  case AV_PIX_FMT_X2RGB10:
2003  return NV_ENC_BUFFER_FORMAT_ARGB10;
2004  case AV_PIX_FMT_X2BGR10:
2005  return NV_ENC_BUFFER_FORMAT_ABGR10;
2006 #ifdef NVENC_HAVE_422_SUPPORT
2007  case AV_PIX_FMT_NV16:
2008  return NV_ENC_BUFFER_FORMAT_NV16;
2009  case AV_PIX_FMT_P210:
2010  case AV_PIX_FMT_P216:
2011  return NV_ENC_BUFFER_FORMAT_P210;
2012 #endif
2013  default:
2014  return NV_ENC_BUFFER_FORMAT_UNDEFINED;
2015  }
2016 }
2017 
2018 static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
2019 {
2020  NvencContext *ctx = avctx->priv_data;
2021  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2022  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2023  NvencSurface* tmp_surface = &ctx->surfaces[idx];
2024 
2025  NVENCSTATUS nv_status;
2026  NV_ENC_CREATE_BITSTREAM_BUFFER allocOut = { 0 };
2027  allocOut.version = NV_ENC_CREATE_BITSTREAM_BUFFER_VER;
2028 
2029  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2030  ctx->surfaces[idx].in_ref = av_frame_alloc();
2031  if (!ctx->surfaces[idx].in_ref)
2032  return AVERROR(ENOMEM);
2033  } else {
2034  NV_ENC_CREATE_INPUT_BUFFER allocSurf = { 0 };
2035 
2036  ctx->surfaces[idx].format = nvenc_map_buffer_format(ctx->data_pix_fmt);
2037  if (ctx->surfaces[idx].format == NV_ENC_BUFFER_FORMAT_UNDEFINED) {
2038  av_log(avctx, AV_LOG_FATAL, "Invalid input pixel format: %s\n",
2039  av_get_pix_fmt_name(ctx->data_pix_fmt));
2040  return AVERROR(EINVAL);
2041  }
2042 
2043  allocSurf.version = NV_ENC_CREATE_INPUT_BUFFER_VER;
2044  allocSurf.width = avctx->width;
2045  allocSurf.height = avctx->height;
2046  allocSurf.bufferFmt = ctx->surfaces[idx].format;
2047 
2048  nv_status = p_nvenc->nvEncCreateInputBuffer(ctx->nvencoder, &allocSurf);
2049  if (nv_status != NV_ENC_SUCCESS) {
2050  return nvenc_print_error(avctx, nv_status, "CreateInputBuffer failed");
2051  }
2052 
2053  ctx->surfaces[idx].input_surface = allocSurf.inputBuffer;
2054  ctx->surfaces[idx].width = allocSurf.width;
2055  ctx->surfaces[idx].height = allocSurf.height;
2056  }
2057 
2058  nv_status = p_nvenc->nvEncCreateBitstreamBuffer(ctx->nvencoder, &allocOut);
2059  if (nv_status != NV_ENC_SUCCESS) {
2060  int err = nvenc_print_error(avctx, nv_status, "CreateBitstreamBuffer failed");
2061  if (avctx->pix_fmt != AV_PIX_FMT_CUDA && avctx->pix_fmt != AV_PIX_FMT_D3D11)
2062  p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[idx].input_surface);
2063  av_frame_free(&ctx->surfaces[idx].in_ref);
2064  return err;
2065  }
2066 
2067  ctx->surfaces[idx].output_surface = allocOut.bitstreamBuffer;
2068 
2069  av_fifo_write(ctx->unused_surface_queue, &tmp_surface, 1);
2070 
2071  return 0;
2072 }
2073 
2075 {
2076  NvencContext *ctx = avctx->priv_data;
2077  int i, res = 0, res2;
2078 
2079  ctx->surfaces = av_calloc(ctx->nb_surfaces, sizeof(*ctx->surfaces));
2080  if (!ctx->surfaces)
2081  return AVERROR(ENOMEM);
2082 
2083  ctx->frame_data_array = av_calloc(ctx->frame_data_array_nb, sizeof(*ctx->frame_data_array));
2084  if (!ctx->frame_data_array)
2085  return AVERROR(ENOMEM);
2086 
2087  ctx->timestamp_list = av_fifo_alloc2(ctx->nb_surfaces + ctx->encode_config.frameIntervalP,
2088  sizeof(int64_t), 0);
2089  if (!ctx->timestamp_list)
2090  return AVERROR(ENOMEM);
2091 
2092  ctx->unused_surface_queue = av_fifo_alloc2(ctx->nb_surfaces, sizeof(NvencSurface*), 0);
2093  if (!ctx->unused_surface_queue)
2094  return AVERROR(ENOMEM);
2095 
2096  ctx->output_surface_queue = av_fifo_alloc2(ctx->nb_surfaces, sizeof(NvencSurface*), 0);
2097  if (!ctx->output_surface_queue)
2098  return AVERROR(ENOMEM);
2099  ctx->output_surface_ready_queue = av_fifo_alloc2(ctx->nb_surfaces, sizeof(NvencSurface*), 0);
2100  if (!ctx->output_surface_ready_queue)
2101  return AVERROR(ENOMEM);
2102 
2103  res = nvenc_push_context(avctx);
2104  if (res < 0)
2105  return res;
2106 
2107  for (i = 0; i < ctx->nb_surfaces; i++) {
2108  if ((res = nvenc_alloc_surface(avctx, i)) < 0)
2109  goto fail;
2110  }
2111 
2112 fail:
2113  res2 = nvenc_pop_context(avctx);
2114  if (res2 < 0)
2115  return res2;
2116 
2117  return res;
2118 }
2119 
2121 {
2122  NvencContext *ctx = avctx->priv_data;
2123  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2124  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2125 
2126  NVENCSTATUS nv_status;
2127  uint32_t outSize = 0;
2128  char tmpHeader[NV_MAX_SEQ_HDR_LEN];
2129 
2130  NV_ENC_SEQUENCE_PARAM_PAYLOAD payload = { 0 };
2131  payload.version = NV_ENC_SEQUENCE_PARAM_PAYLOAD_VER;
2132 
2133  payload.spsppsBuffer = tmpHeader;
2134  payload.inBufferSize = sizeof(tmpHeader);
2135  payload.outSPSPPSPayloadSize = &outSize;
2136 
2137  nv_status = p_nvenc->nvEncGetSequenceParams(ctx->nvencoder, &payload);
2138  if (nv_status != NV_ENC_SUCCESS) {
2139  return nvenc_print_error(avctx, nv_status, "GetSequenceParams failed");
2140  }
2141 
2142  avctx->extradata_size = outSize;
2144 
2145  if (!avctx->extradata) {
2146  return AVERROR(ENOMEM);
2147  }
2148 
2149  memcpy(avctx->extradata, tmpHeader, outSize);
2150 
2151  return 0;
2152 }
2153 
2155 {
2156  NvencContext *ctx = avctx->priv_data;
2157  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2158  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2159  int i, res;
2160 
2161  /* the encoder has to be flushed before it can be closed */
2162  if (ctx->nvencoder) {
2163  NV_ENC_PIC_PARAMS params = { .version = NV_ENC_PIC_PARAMS_VER,
2164  .encodePicFlags = NV_ENC_PIC_FLAG_EOS };
2165 
2166  res = nvenc_push_context(avctx);
2167  if (res < 0)
2168  return res;
2169 
2170  p_nvenc->nvEncEncodePicture(ctx->nvencoder, &params);
2171  }
2172 
2173  av_fifo_freep2(&ctx->timestamp_list);
2174  av_fifo_freep2(&ctx->output_surface_ready_queue);
2175  av_fifo_freep2(&ctx->output_surface_queue);
2176  av_fifo_freep2(&ctx->unused_surface_queue);
2177 
2178  if (ctx->frame_data_array) {
2179  for (i = 0; i < ctx->frame_data_array_nb; i++)
2180  av_buffer_unref(&ctx->frame_data_array[i].frame_opaque_ref);
2181  av_freep(&ctx->frame_data_array);
2182  }
2183 
2184  if (ctx->surfaces && (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11)) {
2185  for (i = 0; i < ctx->nb_registered_frames; i++) {
2186  if (ctx->registered_frames[i].mapped)
2187  p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, ctx->registered_frames[i].in_map.mappedResource);
2188  if (ctx->registered_frames[i].regptr)
2189  p_nvenc->nvEncUnregisterResource(ctx->nvencoder, ctx->registered_frames[i].regptr);
2190  }
2191  ctx->nb_registered_frames = 0;
2192  }
2193 
2194  if (ctx->surfaces) {
2195  for (i = 0; i < ctx->nb_surfaces; ++i) {
2196  if (avctx->pix_fmt != AV_PIX_FMT_CUDA && avctx->pix_fmt != AV_PIX_FMT_D3D11)
2197  p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[i].input_surface);
2198  av_frame_free(&ctx->surfaces[i].in_ref);
2199  p_nvenc->nvEncDestroyBitstreamBuffer(ctx->nvencoder, ctx->surfaces[i].output_surface);
2200  }
2201  }
2202  av_freep(&ctx->surfaces);
2203  ctx->nb_surfaces = 0;
2204 
2205  av_frame_free(&ctx->frame);
2206 
2207  av_freep(&ctx->sei_data);
2208 
2209  if (ctx->nvencoder) {
2210  p_nvenc->nvEncDestroyEncoder(ctx->nvencoder);
2211 
2212  res = nvenc_pop_context(avctx);
2213  if (res < 0)
2214  return res;
2215  }
2216  ctx->nvencoder = NULL;
2217 
2218  if (ctx->cu_context_internal)
2219  CHECK_CU(dl_fn->cuda_dl->cuCtxDestroy(ctx->cu_context_internal));
2220  ctx->cu_context = ctx->cu_context_internal = NULL;
2221 
2222 #if CONFIG_D3D11VA
2223  if (ctx->d3d11_device) {
2224  ID3D11Device_Release(ctx->d3d11_device);
2225  ctx->d3d11_device = NULL;
2226  }
2227 #endif
2228 
2229  nvenc_free_functions(&dl_fn->nvenc_dl);
2230  cuda_free_functions(&dl_fn->cuda_dl);
2231 
2232  dl_fn->nvenc_device_count = 0;
2233 
2234  av_log(avctx, AV_LOG_VERBOSE, "Nvenc unloaded\n");
2235 
2236  return 0;
2237 }
2238 
2240 {
2241  NvencContext *ctx = avctx->priv_data;
2242  int ret;
2243 
2244  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2245  AVHWFramesContext *frames_ctx;
2246  if (!avctx->hw_frames_ctx) {
2247  av_log(avctx, AV_LOG_ERROR,
2248  "hw_frames_ctx must be set when using GPU frames as input\n");
2249  return AVERROR(EINVAL);
2250  }
2251  frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
2252  if (frames_ctx->format != avctx->pix_fmt) {
2253  av_log(avctx, AV_LOG_ERROR,
2254  "hw_frames_ctx must match the GPU frame type\n");
2255  return AVERROR(EINVAL);
2256  }
2257  ctx->data_pix_fmt = frames_ctx->sw_format;
2258  } else {
2259  ctx->data_pix_fmt = avctx->pix_fmt;
2260  }
2261 
2262  if (ctx->rgb_mode == NVENC_RGB_MODE_DISABLED && IS_RGB(ctx->data_pix_fmt)) {
2263  av_log(avctx, AV_LOG_ERROR, "Packed RGB input, but RGB support is disabled.\n");
2264  return AVERROR(EINVAL);
2265  }
2266 
2267  ctx->frame = av_frame_alloc();
2268  if (!ctx->frame)
2269  return AVERROR(ENOMEM);
2270 
2271  if ((ret = nvenc_load_libraries(avctx)) < 0)
2272  return ret;
2273 
2274  if ((ret = nvenc_setup_device(avctx)) < 0)
2275  return ret;
2276 
2277  if ((ret = nvenc_setup_encoder(avctx)) < 0)
2278  return ret;
2279 
2280  if ((ret = nvenc_setup_surfaces(avctx)) < 0)
2281  return ret;
2282 
2283  if (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) {
2284  if ((ret = nvenc_setup_extradata(avctx)) < 0)
2285  return ret;
2286  }
2287 
2288  return 0;
2289 }
2290 
2292 {
2293  NvencSurface *tmp_surf;
2294 
2295  if (av_fifo_read(ctx->unused_surface_queue, &tmp_surf, 1) < 0)
2296  // queue empty
2297  return NULL;
2298 
2299  return tmp_surf;
2300 }
2301 
2302 static int nvenc_copy_frame(AVCodecContext *avctx, NvencSurface *nv_surface,
2303  NV_ENC_LOCK_INPUT_BUFFER *lock_buffer_params, const AVFrame *frame)
2304 {
2305  int dst_linesize[4] = {
2306  lock_buffer_params->pitch,
2307  lock_buffer_params->pitch,
2308  lock_buffer_params->pitch,
2309  lock_buffer_params->pitch
2310  };
2311  uint8_t *dst_data[4];
2312  int ret;
2313 
2314  if (frame->format == AV_PIX_FMT_YUV420P)
2315  dst_linesize[1] = dst_linesize[2] >>= 1;
2316 
2317  ret = av_image_fill_pointers(dst_data, frame->format, nv_surface->height,
2318  lock_buffer_params->bufferDataPtr, dst_linesize);
2319  if (ret < 0)
2320  return ret;
2321 
2322  if (frame->format == AV_PIX_FMT_YUV420P)
2323  FFSWAP(uint8_t*, dst_data[1], dst_data[2]);
2324 
2325  av_image_copy2(dst_data, dst_linesize,
2326  frame->data, frame->linesize, frame->format,
2327  avctx->width, avctx->height);
2328 
2329  return 0;
2330 }
2331 
2333 {
2334  NvencContext *ctx = avctx->priv_data;
2335  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2336  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2337  NVENCSTATUS nv_status;
2338 
2339  int i, first_round;
2340 
2341  if (ctx->nb_registered_frames == FF_ARRAY_ELEMS(ctx->registered_frames)) {
2342  for (first_round = 1; first_round >= 0; first_round--) {
2343  for (i = 0; i < ctx->nb_registered_frames; i++) {
2344  if (!ctx->registered_frames[i].mapped) {
2345  if (ctx->registered_frames[i].regptr) {
2346  if (first_round)
2347  continue;
2348  nv_status = p_nvenc->nvEncUnregisterResource(ctx->nvencoder, ctx->registered_frames[i].regptr);
2349  if (nv_status != NV_ENC_SUCCESS)
2350  return nvenc_print_error(avctx, nv_status, "Failed unregistering unused input resource");
2351  ctx->registered_frames[i].ptr = NULL;
2352  ctx->registered_frames[i].regptr = NULL;
2353  }
2354  return i;
2355  }
2356  }
2357  }
2358  } else {
2359  return ctx->nb_registered_frames++;
2360  }
2361 
2362  av_log(avctx, AV_LOG_ERROR, "Too many registered CUDA frames\n");
2363  return AVERROR(ENOMEM);
2364 }
2365 
2367 {
2368  NvencContext *ctx = avctx->priv_data;
2369  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2370  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2371 
2372  AVHWFramesContext *frames_ctx = (AVHWFramesContext*)frame->hw_frames_ctx->data;
2373  NV_ENC_REGISTER_RESOURCE reg = { 0 };
2374  int i, idx, ret;
2375 
2376  for (i = 0; i < ctx->nb_registered_frames; i++) {
2377  if (avctx->pix_fmt == AV_PIX_FMT_CUDA && ctx->registered_frames[i].ptr == frame->data[0])
2378  return i;
2379  else if (avctx->pix_fmt == AV_PIX_FMT_D3D11 && ctx->registered_frames[i].ptr == frame->data[0] && ctx->registered_frames[i].ptr_index == (intptr_t)frame->data[1])
2380  return i;
2381  }
2382 
2383  idx = nvenc_find_free_reg_resource(avctx);
2384  if (idx < 0)
2385  return idx;
2386 
2387  reg.version = NV_ENC_REGISTER_RESOURCE_VER;
2388  reg.width = frames_ctx->width;
2389  reg.height = frames_ctx->height;
2390  reg.pitch = frame->linesize[0];
2391  reg.resourceToRegister = frame->data[0];
2392 
2393  if (avctx->pix_fmt == AV_PIX_FMT_CUDA) {
2394  reg.resourceType = NV_ENC_INPUT_RESOURCE_TYPE_CUDADEVICEPTR;
2395  }
2396  else if (avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2397  reg.resourceType = NV_ENC_INPUT_RESOURCE_TYPE_DIRECTX;
2398  reg.subResourceIndex = (intptr_t)frame->data[1];
2399  }
2400 
2401  reg.bufferFormat = nvenc_map_buffer_format(frames_ctx->sw_format);
2402  if (reg.bufferFormat == NV_ENC_BUFFER_FORMAT_UNDEFINED) {
2403  av_log(avctx, AV_LOG_FATAL, "Invalid input pixel format: %s\n",
2404  av_get_pix_fmt_name(frames_ctx->sw_format));
2405  return AVERROR(EINVAL);
2406  }
2407 
2408  ret = p_nvenc->nvEncRegisterResource(ctx->nvencoder, &reg);
2409  if (ret != NV_ENC_SUCCESS) {
2410  nvenc_print_error(avctx, ret, "Error registering an input resource");
2411  return AVERROR_UNKNOWN;
2412  }
2413 
2414  ctx->registered_frames[idx].ptr = frame->data[0];
2415  ctx->registered_frames[idx].ptr_index = reg.subResourceIndex;
2416  ctx->registered_frames[idx].regptr = reg.registeredResource;
2417  return idx;
2418 }
2419 
2421  NvencSurface *nvenc_frame)
2422 {
2423  NvencContext *ctx = avctx->priv_data;
2424  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2425  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2426 
2427  int res;
2428  NVENCSTATUS nv_status;
2429 
2430  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2431  int reg_idx = nvenc_register_frame(avctx, frame);
2432  if (reg_idx < 0) {
2433  av_log(avctx, AV_LOG_ERROR, "Could not register an input HW frame\n");
2434  return reg_idx;
2435  }
2436 
2437  res = av_frame_ref(nvenc_frame->in_ref, frame);
2438  if (res < 0)
2439  return res;
2440 
2441  if (!ctx->registered_frames[reg_idx].mapped) {
2442  ctx->registered_frames[reg_idx].in_map.version = NV_ENC_MAP_INPUT_RESOURCE_VER;
2443  ctx->registered_frames[reg_idx].in_map.registeredResource = ctx->registered_frames[reg_idx].regptr;
2444  nv_status = p_nvenc->nvEncMapInputResource(ctx->nvencoder, &ctx->registered_frames[reg_idx].in_map);
2445  if (nv_status != NV_ENC_SUCCESS) {
2446  av_frame_unref(nvenc_frame->in_ref);
2447  return nvenc_print_error(avctx, nv_status, "Error mapping an input resource");
2448  }
2449  }
2450 
2451  ctx->registered_frames[reg_idx].mapped += 1;
2452 
2453  nvenc_frame->reg_idx = reg_idx;
2454  nvenc_frame->input_surface = ctx->registered_frames[reg_idx].in_map.mappedResource;
2455  nvenc_frame->format = ctx->registered_frames[reg_idx].in_map.mappedBufferFmt;
2456  nvenc_frame->pitch = frame->linesize[0];
2457 
2458  return 0;
2459  } else {
2460  NV_ENC_LOCK_INPUT_BUFFER lockBufferParams = { 0 };
2461 
2462  lockBufferParams.version = NV_ENC_LOCK_INPUT_BUFFER_VER;
2463  lockBufferParams.inputBuffer = nvenc_frame->input_surface;
2464 
2465  nv_status = p_nvenc->nvEncLockInputBuffer(ctx->nvencoder, &lockBufferParams);
2466  if (nv_status != NV_ENC_SUCCESS) {
2467  return nvenc_print_error(avctx, nv_status, "Failed locking nvenc input buffer");
2468  }
2469 
2470  nvenc_frame->pitch = lockBufferParams.pitch;
2471  res = nvenc_copy_frame(avctx, nvenc_frame, &lockBufferParams, frame);
2472 
2473  nv_status = p_nvenc->nvEncUnlockInputBuffer(ctx->nvencoder, nvenc_frame->input_surface);
2474  if (nv_status != NV_ENC_SUCCESS) {
2475  return nvenc_print_error(avctx, nv_status, "Failed unlocking input buffer!");
2476  }
2477 
2478  return res;
2479  }
2480 }
2481 
2482 #ifdef NVENC_HAVE_TIME_CODE
2483 static void nvenc_fill_time_code(AVCodecContext *avctx, const AVFrame *frame, NV_ENC_TIME_CODE *time_code)
2484 {
2486 
2487  if (sd) {
2488  uint32_t *tc = (uint32_t*)sd->data;
2489  int cnt = FFMIN(tc[0], FF_ARRAY_ELEMS(time_code->clockTimestamp));
2490 
2491  switch (cnt) {
2492  case 0:
2493  time_code->displayPicStruct = NV_ENC_PIC_STRUCT_DISPLAY_FRAME;
2494  time_code->skipClockTimestampInsertion = 1;
2495  break;
2496  case 2:
2497  time_code->displayPicStruct = NV_ENC_PIC_STRUCT_DISPLAY_FRAME_DOUBLING;
2498  break;
2499  case 3:
2500  time_code->displayPicStruct = NV_ENC_PIC_STRUCT_DISPLAY_FRAME_TRIPLING;
2501  break;
2502  default:
2503  time_code->displayPicStruct = NV_ENC_PIC_STRUCT_DISPLAY_FRAME;
2504  break;
2505  }
2506 
2507  for (int i = 0; i < cnt; i++) {
2508  unsigned hh, mm, ss, ff, drop;
2509  ff_timecode_set_smpte(&drop, &hh, &mm, &ss, &ff, avctx->framerate, tc[i + 1], 0, 0);
2510 
2511  time_code->clockTimestamp[i].countingType = 0;
2512  time_code->clockTimestamp[i].discontinuityFlag = 0;
2513  time_code->clockTimestamp[i].cntDroppedFrames = drop;
2514  time_code->clockTimestamp[i].nFrames = ff;
2515  time_code->clockTimestamp[i].secondsValue = ss;
2516  time_code->clockTimestamp[i].minutesValue = mm;
2517  time_code->clockTimestamp[i].hoursValue = hh;
2518  time_code->clockTimestamp[i].timeOffset = 0;
2519  }
2520  } else {
2521  time_code->displayPicStruct = NV_ENC_PIC_STRUCT_DISPLAY_FRAME;
2522  time_code->skipClockTimestampInsertion = 1;
2523  }
2524 }
2525 #endif
2526 
2528  NV_ENC_PIC_PARAMS *params,
2529  NV_ENC_SEI_PAYLOAD *sei_data,
2530  int sei_count)
2531 {
2532  NvencContext *ctx = avctx->priv_data;
2533 
2534  switch (avctx->codec->id) {
2535  case AV_CODEC_ID_H264:
2536  params->codecPicParams.h264PicParams.sliceMode =
2537  ctx->encode_config.encodeCodecConfig.h264Config.sliceMode;
2538  params->codecPicParams.h264PicParams.sliceModeData =
2539  ctx->encode_config.encodeCodecConfig.h264Config.sliceModeData;
2540  if (sei_count > 0) {
2541  params->codecPicParams.h264PicParams.seiPayloadArray = sei_data;
2542  params->codecPicParams.h264PicParams.seiPayloadArrayCnt = sei_count;
2543  }
2544 
2545 #ifdef NVENC_HAVE_TIME_CODE
2546  if (ctx->s12m_tc)
2547  nvenc_fill_time_code(avctx, frame, &params->codecPicParams.h264PicParams.timeCode);
2548 #endif
2549 
2550  break;
2551  case AV_CODEC_ID_HEVC:
2552  params->codecPicParams.hevcPicParams.sliceMode =
2553  ctx->encode_config.encodeCodecConfig.hevcConfig.sliceMode;
2554  params->codecPicParams.hevcPicParams.sliceModeData =
2555  ctx->encode_config.encodeCodecConfig.hevcConfig.sliceModeData;
2556  if (sei_count > 0) {
2557  params->codecPicParams.hevcPicParams.seiPayloadArray = sei_data;
2558  params->codecPicParams.hevcPicParams.seiPayloadArrayCnt = sei_count;
2559  }
2560 
2561  break;
2562 #if CONFIG_AV1_NVENC_ENCODER
2563  case AV_CODEC_ID_AV1:
2564  params->codecPicParams.av1PicParams.numTileColumns =
2565  ctx->encode_config.encodeCodecConfig.av1Config.numTileColumns;
2566  params->codecPicParams.av1PicParams.numTileRows =
2567  ctx->encode_config.encodeCodecConfig.av1Config.numTileRows;
2568  if (sei_count > 0) {
2569  params->codecPicParams.av1PicParams.obuPayloadArray = sei_data;
2570  params->codecPicParams.av1PicParams.obuPayloadArrayCnt = sei_count;
2571  }
2572 
2573  break;
2574 #endif
2575  }
2576 }
2577 
2578 static inline void timestamp_queue_enqueue(AVFifo *queue, int64_t timestamp)
2579 {
2580  av_fifo_write(queue, &timestamp, 1);
2581 }
2582 
2584 {
2585  int64_t timestamp = AV_NOPTS_VALUE;
2586  // The following call might fail if the queue is empty.
2587  av_fifo_read(queue, &timestamp, 1);
2588 
2589  return timestamp;
2590 }
2591 
2592 static inline int64_t timestamp_queue_peek(AVFifo *queue, size_t index)
2593 {
2594  int64_t timestamp = AV_NOPTS_VALUE;
2595  av_fifo_peek(queue, &timestamp, 1, index);
2596 
2597  return timestamp;
2598 }
2599 
2601  NV_ENC_LOCK_BITSTREAM *params,
2602  AVPacket *pkt)
2603 {
2604  NvencContext *ctx = avctx->priv_data;
2605  unsigned int delay;
2606  int64_t delay_time;
2607 
2608  pkt->pts = params->outputTimeStamp;
2609 
2610  if (!(avctx->codec_descriptor->props & AV_CODEC_PROP_REORDER)) {
2611  pkt->dts = pkt->pts;
2612  return 0;
2613  }
2614 
2615  // This can be more than necessary, but we don't know the real reorder delay.
2616  delay = FFMAX(ctx->encode_config.frameIntervalP - 1, 0);
2617 #ifdef NVENC_HAVE_MVHEVC
2618  delay *= ctx->multiview ? 2 : 1;
2619 #endif
2620  if (ctx->output_frame_num >= delay) {
2621  pkt->dts = timestamp_queue_dequeue(ctx->timestamp_list);
2622  ctx->output_frame_num++;
2623  return 0;
2624  }
2625 
2626  delay_time = ctx->initial_delay_time;
2627  if (!delay_time) {
2628  int64_t t1, t2, t3;
2629  t1 = timestamp_queue_peek(ctx->timestamp_list, delay);
2630  t2 = timestamp_queue_peek(ctx->timestamp_list, 0);
2631  t3 = (delay > 1) ? timestamp_queue_peek(ctx->timestamp_list, 1) : t1;
2632 
2633  if (t1 != AV_NOPTS_VALUE) {
2634  delay_time = t1 - t2;
2635  } else if (avctx->framerate.num > 0 && avctx->framerate.den > 0) {
2636  delay_time = av_rescale_q(delay, (AVRational) {avctx->framerate.den, avctx->framerate.num},
2637  avctx->time_base);
2638  } else if (t3 != AV_NOPTS_VALUE) {
2639  delay_time = delay * (t3 - t2);
2640  } else {
2641  delay_time = delay;
2642  }
2643  ctx->initial_delay_time = delay_time;
2644  }
2645 
2646  /* The following method is simple, but doesn't guarantee monotonic with VFR
2647  * when delay_time isn't accurate (that is, t1 == AV_NOPTS_VALUE)
2648  *
2649  * dts = timestamp_queue_peek(ctx->timestamp_list, ctx->output_frame_num) - delay_time
2650  */
2651  pkt->dts = timestamp_queue_peek(ctx->timestamp_list, 0) - delay_time * (delay - ctx->output_frame_num) / delay;
2652  ctx->output_frame_num++;
2653 
2654  return 0;
2655 }
2656 
2657 static int nvenc_store_frame_data(AVCodecContext *avctx, NV_ENC_PIC_PARAMS *pic_params, const AVFrame *frame)
2658 {
2659  NvencContext *ctx = avctx->priv_data;
2660  int res = 0;
2661 
2662  int idx = ctx->frame_data_array_pos;
2663  NvencFrameData *frame_data = &ctx->frame_data_array[idx];
2664 
2665  // in case the encoder got reconfigured, there might be leftovers
2667 
2668  if (frame->opaque_ref && avctx->flags & AV_CODEC_FLAG_COPY_OPAQUE) {
2671  return AVERROR(ENOMEM);
2672  }
2673 
2674  frame_data->duration = frame->duration;
2675  frame_data->frame_opaque = frame->opaque;
2676 
2677  ctx->frame_data_array_pos = (ctx->frame_data_array_pos + 1) % ctx->frame_data_array_nb;
2678  pic_params->inputDuration = idx;
2679 
2680  return res;
2681 }
2682 
2683 static int nvenc_retrieve_frame_data(AVCodecContext *avctx, NV_ENC_LOCK_BITSTREAM *lock_params, AVPacket *pkt)
2684 {
2685  NvencContext *ctx = avctx->priv_data;
2686  int res = 0;
2687 
2688  int idx = lock_params->outputDuration;
2689  NvencFrameData *frame_data = &ctx->frame_data_array[idx];
2690 
2692 
2693  if (avctx->flags & AV_CODEC_FLAG_COPY_OPAQUE) {
2697  }
2698 
2700 
2701  return res;
2702 }
2703 
2705 {
2706  NvencContext *ctx = avctx->priv_data;
2707  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2708  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2709 
2710  NV_ENC_LOCK_BITSTREAM lock_params = { 0 };
2711  NVENCSTATUS nv_status;
2712  int res = 0;
2713 
2714  enum AVPictureType pict_type;
2715 
2716  lock_params.version = NV_ENC_LOCK_BITSTREAM_VER;
2717 
2718  lock_params.doNotWait = 0;
2719  lock_params.outputBitstream = tmpoutsurf->output_surface;
2720 
2721  nv_status = p_nvenc->nvEncLockBitstream(ctx->nvencoder, &lock_params);
2722  if (nv_status != NV_ENC_SUCCESS) {
2723  res = nvenc_print_error(avctx, nv_status, "Failed locking bitstream buffer");
2724  goto error;
2725  }
2726 
2727  res = ff_get_encode_buffer(avctx, pkt, lock_params.bitstreamSizeInBytes, 0);
2728 
2729  if (res < 0) {
2730  p_nvenc->nvEncUnlockBitstream(ctx->nvencoder, tmpoutsurf->output_surface);
2731  goto error;
2732  }
2733 
2734  memcpy(pkt->data, lock_params.bitstreamBufferPtr, lock_params.bitstreamSizeInBytes);
2735 
2736  nv_status = p_nvenc->nvEncUnlockBitstream(ctx->nvencoder, tmpoutsurf->output_surface);
2737  if (nv_status != NV_ENC_SUCCESS) {
2738  res = nvenc_print_error(avctx, nv_status, "Failed unlocking bitstream buffer, expect the gates of mordor to open");
2739  goto error;
2740  }
2741 
2742 
2743  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2744  ctx->registered_frames[tmpoutsurf->reg_idx].mapped -= 1;
2745  if (ctx->registered_frames[tmpoutsurf->reg_idx].mapped == 0) {
2746  nv_status = p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, ctx->registered_frames[tmpoutsurf->reg_idx].in_map.mappedResource);
2747  if (nv_status != NV_ENC_SUCCESS) {
2748  res = nvenc_print_error(avctx, nv_status, "Failed unmapping input resource");
2749  goto error;
2750  }
2751  } else if (ctx->registered_frames[tmpoutsurf->reg_idx].mapped < 0) {
2752  res = AVERROR_BUG;
2753  goto error;
2754  }
2755 
2756  av_frame_unref(tmpoutsurf->in_ref);
2757 
2758  tmpoutsurf->input_surface = NULL;
2759  }
2760 
2761  switch (lock_params.pictureType) {
2762  case NV_ENC_PIC_TYPE_IDR:
2764  case NV_ENC_PIC_TYPE_I:
2765  pict_type = AV_PICTURE_TYPE_I;
2766  break;
2767  case NV_ENC_PIC_TYPE_P:
2768  pict_type = AV_PICTURE_TYPE_P;
2769  break;
2770  case NV_ENC_PIC_TYPE_B:
2771  pict_type = AV_PICTURE_TYPE_B;
2772  break;
2773  case NV_ENC_PIC_TYPE_BI:
2774  pict_type = AV_PICTURE_TYPE_BI;
2775  break;
2776  default:
2777  av_log(avctx, AV_LOG_ERROR, "Unknown picture type encountered, expect the output to be broken.\n");
2778  av_log(avctx, AV_LOG_ERROR, "Please report this error and include as much information on how to reproduce it as possible.\n");
2779  res = AVERROR_EXTERNAL;
2780  goto error;
2781  }
2782 
2784  (lock_params.frameAvgQP - 1) * FF_QP2LAMBDA, NULL, 0, pict_type);
2785 
2786  res = nvenc_set_timestamp(avctx, &lock_params, pkt);
2787  if (res < 0)
2788  goto error2;
2789 
2790  res = nvenc_retrieve_frame_data(avctx, &lock_params, pkt);
2791  if (res < 0)
2792  goto error2;
2793 
2794  return 0;
2795 
2796 error:
2797  timestamp_queue_dequeue(ctx->timestamp_list);
2798 
2799 error2:
2800  return res;
2801 }
2802 
2803 static int output_ready(AVCodecContext *avctx, int flush)
2804 {
2805  NvencContext *ctx = avctx->priv_data;
2806  int nb_ready, nb_pending;
2807 
2808  nb_ready = av_fifo_can_read(ctx->output_surface_ready_queue);
2809  nb_pending = av_fifo_can_read(ctx->output_surface_queue);
2810  if (flush)
2811  return nb_ready > 0;
2812  return (nb_ready > 0) && (nb_ready + nb_pending >= ctx->async_depth);
2813 }
2814 
2816 {
2817  NvencContext *ctx = avctx->priv_data;
2818  int sei_count = 0;
2819  int i, res;
2820 
2822  void *a53_data = NULL;
2823  size_t a53_size = 0;
2824 
2825  if (ff_alloc_a53_sei(frame, 0, &a53_data, &a53_size) < 0) {
2826  av_log(ctx, AV_LOG_ERROR, "Not enough memory for closed captions, skipping\n");
2827  }
2828 
2829  if (a53_data) {
2830  void *tmp = av_fast_realloc(ctx->sei_data,
2831  &ctx->sei_data_size,
2832  (sei_count + 1) * sizeof(*ctx->sei_data));
2833  if (!tmp) {
2834  av_free(a53_data);
2835  res = AVERROR(ENOMEM);
2836  goto error;
2837  } else {
2838  ctx->sei_data = tmp;
2839  ctx->sei_data[sei_count].payloadSize = (uint32_t)a53_size;
2840  ctx->sei_data[sei_count].payload = (uint8_t*)a53_data;
2841 
2842 #if CONFIG_AV1_NVENC_ENCODER
2843  if (avctx->codec->id == AV_CODEC_ID_AV1)
2844  ctx->sei_data[sei_count].payloadType = AV1_METADATA_TYPE_ITUT_T35;
2845  else
2846 #endif
2847  ctx->sei_data[sei_count].payloadType = SEI_TYPE_USER_DATA_REGISTERED_ITU_T_T35;
2848 
2849  sei_count++;
2850  }
2851  }
2852  }
2853 
2855  void *tc_data = NULL;
2856  size_t tc_size = 0;
2857 
2858  if (ff_alloc_timecode_sei(frame, avctx->framerate, 0, &tc_data, &tc_size) < 0) {
2859  av_log(ctx, AV_LOG_ERROR, "Not enough memory for timecode sei, skipping\n");
2860  }
2861 
2862  if (tc_data) {
2863  void *tmp = av_fast_realloc(ctx->sei_data,
2864  &ctx->sei_data_size,
2865  (sei_count + 1) * sizeof(*ctx->sei_data));
2866  if (!tmp) {
2867  av_free(tc_data);
2868  res = AVERROR(ENOMEM);
2869  goto error;
2870  } else {
2871  ctx->sei_data = tmp;
2872  ctx->sei_data[sei_count].payloadSize = (uint32_t)tc_size;
2873  ctx->sei_data[sei_count].payload = (uint8_t*)tc_data;
2874 
2875 #if CONFIG_AV1_NVENC_ENCODER
2876  if (avctx->codec->id == AV_CODEC_ID_AV1)
2877  ctx->sei_data[sei_count].payloadType = AV1_METADATA_TYPE_TIMECODE;
2878  else
2879 #endif
2880  ctx->sei_data[sei_count].payloadType = SEI_TYPE_TIME_CODE;
2881 
2882  sei_count++;
2883  }
2884  }
2885  }
2886 
2887  if (!ctx->udu_sei)
2888  return sei_count;
2889 
2890  for (i = 0; i < frame->nb_side_data; i++) {
2891  AVFrameSideData *side_data = frame->side_data[i];
2892  void *tmp;
2893 
2894  if (side_data->type != AV_FRAME_DATA_SEI_UNREGISTERED)
2895  continue;
2896 
2897  tmp = av_fast_realloc(ctx->sei_data,
2898  &ctx->sei_data_size,
2899  (sei_count + 1) * sizeof(*ctx->sei_data));
2900  if (!tmp) {
2901  res = AVERROR(ENOMEM);
2902  goto error;
2903  } else {
2904  ctx->sei_data = tmp;
2905  ctx->sei_data[sei_count].payloadSize = side_data->size;
2906  ctx->sei_data[sei_count].payloadType = SEI_TYPE_USER_DATA_UNREGISTERED;
2907  ctx->sei_data[sei_count].payload = av_memdup(side_data->data, side_data->size);
2908 
2909  if (!ctx->sei_data[sei_count].payload) {
2910  res = AVERROR(ENOMEM);
2911  goto error;
2912  }
2913 
2914  sei_count++;
2915  }
2916  }
2917 
2918  return sei_count;
2919 
2920 error:
2921  for (i = 0; i < sei_count; i++)
2922  av_freep(&(ctx->sei_data[i].payload));
2923 
2924  return res;
2925 }
2926 
2927 static void reconfig_encoder(AVCodecContext *avctx, const AVFrame *frame)
2928 {
2929  NvencContext *ctx = avctx->priv_data;
2930  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
2931  NVENCSTATUS ret;
2932 
2933  NV_ENC_RECONFIGURE_PARAMS params = { 0 };
2934  int needs_reconfig = 0;
2935  int needs_encode_config = 0;
2936  int reconfig_bitrate = 0, reconfig_dar = 0;
2937  int dw, dh;
2938 
2939  params.version = NV_ENC_RECONFIGURE_PARAMS_VER;
2940  params.reInitEncodeParams = ctx->init_encode_params;
2941 
2942  compute_dar(avctx, &dw, &dh);
2943  if (dw != ctx->init_encode_params.darWidth || dh != ctx->init_encode_params.darHeight) {
2944  av_log(avctx, AV_LOG_VERBOSE,
2945  "aspect ratio change (DAR): %d:%d -> %d:%d\n",
2946  ctx->init_encode_params.darWidth,
2947  ctx->init_encode_params.darHeight, dw, dh);
2948 
2949  params.reInitEncodeParams.darHeight = dh;
2950  params.reInitEncodeParams.darWidth = dw;
2951 
2952  needs_reconfig = 1;
2953  reconfig_dar = 1;
2954  }
2955 
2956  if (ctx->rc != NV_ENC_PARAMS_RC_CONSTQP && ctx->support_dyn_bitrate) {
2957  if (avctx->bit_rate > 0 && params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate != avctx->bit_rate) {
2958  av_log(avctx, AV_LOG_VERBOSE,
2959  "avg bitrate change: %d -> %d\n",
2960  params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate,
2961  (uint32_t)avctx->bit_rate);
2962 
2963  params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate = avctx->bit_rate;
2964  reconfig_bitrate = 1;
2965  }
2966 
2967  if (avctx->rc_max_rate > 0 && ctx->encode_config.rcParams.maxBitRate != avctx->rc_max_rate) {
2968  av_log(avctx, AV_LOG_VERBOSE,
2969  "max bitrate change: %d -> %d\n",
2970  params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate,
2971  (uint32_t)avctx->rc_max_rate);
2972 
2973  params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate = avctx->rc_max_rate;
2974  reconfig_bitrate = 1;
2975  }
2976 
2977  if (avctx->rc_buffer_size > 0 && ctx->encode_config.rcParams.vbvBufferSize != avctx->rc_buffer_size) {
2978  av_log(avctx, AV_LOG_VERBOSE,
2979  "vbv buffer size change: %d -> %d\n",
2980  params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize,
2981  avctx->rc_buffer_size);
2982 
2983  params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize = avctx->rc_buffer_size;
2984  reconfig_bitrate = 1;
2985  }
2986 
2987  if (reconfig_bitrate) {
2988  params.resetEncoder = 1;
2989  params.forceIDR = 1;
2990 
2991  needs_encode_config = 1;
2992  needs_reconfig = 1;
2993  }
2994  }
2995 
2996  if (!needs_encode_config)
2997  params.reInitEncodeParams.encodeConfig = NULL;
2998 
2999  if (needs_reconfig) {
3000  ret = p_nvenc->nvEncReconfigureEncoder(ctx->nvencoder, &params);
3001  if (ret != NV_ENC_SUCCESS) {
3002  nvenc_print_error(avctx, ret, "failed to reconfigure nvenc");
3003  } else {
3004  if (reconfig_dar) {
3005  ctx->init_encode_params.darHeight = dh;
3006  ctx->init_encode_params.darWidth = dw;
3007  }
3008 
3009  if (reconfig_bitrate) {
3010  ctx->encode_config.rcParams.averageBitRate = params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate;
3011  ctx->encode_config.rcParams.maxBitRate = params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate;
3012  ctx->encode_config.rcParams.vbvBufferSize = params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize;
3013  }
3014 
3015  }
3016  }
3017 }
3018 
3019 #ifdef NVENC_HAVE_HEVC_AND_AV1_MASTERING_METADATA
3020 static int nvenc_set_mastering_display_data(AVCodecContext *avctx, const AVFrame *frame, NV_ENC_PIC_PARAMS *pic_params,
3021  MASTERING_DISPLAY_INFO *mastering_disp_info, CONTENT_LIGHT_LEVEL *content_light_level)
3022 {
3023  NvencContext *ctx = avctx->priv_data;
3024 
3025  if (ctx->mdm || ctx->cll) {
3028  const int chroma_den = (avctx->codec->id == AV_CODEC_ID_AV1) ? 1 << 16 : 50000;
3029  const int max_luma_den = (avctx->codec->id == AV_CODEC_ID_AV1) ? 1 << 8 : 10000;
3030  const int min_luma_den = (avctx->codec->id == AV_CODEC_ID_AV1) ? 1 << 14 : 10000;
3031 
3032  if (!sd_mdm)
3033  sd_mdm = av_frame_side_data_get(avctx->decoded_side_data,
3034  avctx->nb_decoded_side_data,
3036  if (!sd_cll)
3037  sd_cll = av_frame_side_data_get(avctx->decoded_side_data,
3038  avctx->nb_decoded_side_data,
3040 
3041  if (sd_mdm) {
3043 
3044  mastering_disp_info->r.x = av_rescale(mdm->display_primaries[0][0].num, chroma_den,
3045  mdm->display_primaries[0][0].den);
3046  mastering_disp_info->r.y = av_rescale(mdm->display_primaries[0][1].num, chroma_den,
3047  mdm->display_primaries[0][1].den);
3048  mastering_disp_info->g.x = av_rescale(mdm->display_primaries[1][0].num, chroma_den,
3049  mdm->display_primaries[1][0].den);
3050  mastering_disp_info->g.y = av_rescale(mdm->display_primaries[1][1].num, chroma_den,
3051  mdm->display_primaries[1][1].den);
3052  mastering_disp_info->b.x = av_rescale(mdm->display_primaries[2][0].num, chroma_den,
3053  mdm->display_primaries[2][0].den);
3054  mastering_disp_info->b.y = av_rescale(mdm->display_primaries[2][1].num, chroma_den,
3055  mdm->display_primaries[2][1].den);
3056  mastering_disp_info->whitePoint.x = av_rescale(mdm->white_point[0].num, chroma_den,
3057  mdm->white_point[0].den);
3058  mastering_disp_info->whitePoint.y = av_rescale(mdm->white_point[1].num, chroma_den,
3059  mdm->white_point[1].den);
3060  mastering_disp_info->maxLuma = av_rescale(mdm->max_luminance.num, max_luma_den,
3061  mdm->max_luminance.den);
3062  mastering_disp_info->minLuma = av_rescale(mdm->min_luminance.num, min_luma_den,
3063  mdm->min_luminance.den);
3064 
3065  if (avctx->codec->id == AV_CODEC_ID_HEVC)
3066  pic_params->codecPicParams.hevcPicParams.pMasteringDisplay = mastering_disp_info;
3067  else if (avctx->codec->id == AV_CODEC_ID_AV1)
3068  pic_params->codecPicParams.av1PicParams.pMasteringDisplay = mastering_disp_info;
3069  else
3070  return AVERROR_BUG;
3071  }
3072  if (sd_cll) {
3073  const AVContentLightMetadata *cll = (AVContentLightMetadata *)sd_cll->data;
3074 
3075  content_light_level->maxContentLightLevel = cll->MaxCLL;
3076  content_light_level->maxPicAverageLightLevel = cll->MaxFALL;
3077 
3078  if (avctx->codec->id == AV_CODEC_ID_HEVC)
3079  pic_params->codecPicParams.hevcPicParams.pMaxCll = content_light_level;
3080  else if (avctx->codec->id == AV_CODEC_ID_AV1)
3081  pic_params->codecPicParams.av1PicParams.pMaxCll = content_light_level;
3082  else
3083  return AVERROR_BUG;
3084  }
3085  }
3086 
3087  return 0;
3088 }
3089 #endif
3090 
3091 static int nvenc_send_frame(AVCodecContext *avctx, const AVFrame *frame)
3092 {
3093  NVENCSTATUS nv_status;
3094  NvencSurface *tmp_out_surf, *in_surf;
3095  int res, res2;
3096  int sei_count = 0;
3097  int i;
3098 #ifdef NVENC_HAVE_HEVC_AND_AV1_MASTERING_METADATA
3099  MASTERING_DISPLAY_INFO mastering_disp_info = { 0 };
3100  CONTENT_LIGHT_LEVEL content_light_level = { 0 };
3101 #endif
3102 #ifdef NVENC_HAVE_MVHEVC
3103  HEVC_3D_REFERENCE_DISPLAY_INFO ref_disp_info = { 0 };
3104 #endif
3105 
3106  NvencContext *ctx = avctx->priv_data;
3107  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
3108  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
3109 
3110  NV_ENC_PIC_PARAMS pic_params = { 0 };
3111  pic_params.version = NV_ENC_PIC_PARAMS_VER;
3112 
3113  if ((!ctx->cu_context && !ctx->d3d11_device) || !ctx->nvencoder)
3114  return AVERROR(EINVAL);
3115 
3116  if (frame && frame->buf[0]) {
3117  in_surf = get_free_frame(ctx);
3118  if (!in_surf)
3119  return AVERROR(EAGAIN);
3120 
3121  res = nvenc_push_context(avctx);
3122  if (res < 0)
3123  return res;
3124 
3125  reconfig_encoder(avctx, frame);
3126 
3127  res = nvenc_upload_frame(avctx, frame, in_surf);
3128 
3129  res2 = nvenc_pop_context(avctx);
3130  if (res2 < 0)
3131  return res2;
3132 
3133  if (res)
3134  return res;
3135 
3136  pic_params.inputBuffer = in_surf->input_surface;
3137  pic_params.bufferFmt = in_surf->format;
3138  pic_params.inputWidth = in_surf->width;
3139  pic_params.inputHeight = in_surf->height;
3140  pic_params.inputPitch = in_surf->pitch;
3141  pic_params.outputBitstream = in_surf->output_surface;
3142 
3143  if (avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
3144  if (frame->flags & AV_FRAME_FLAG_TOP_FIELD_FIRST)
3145  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FIELD_TOP_BOTTOM;
3146  else
3147  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FIELD_BOTTOM_TOP;
3148  } else {
3149  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FRAME;
3150  }
3151 
3152  if (ctx->forced_idr >= 0 && frame->pict_type == AV_PICTURE_TYPE_I) {
3153  pic_params.encodePicFlags =
3154  ctx->forced_idr ? NV_ENC_PIC_FLAG_FORCEIDR : NV_ENC_PIC_FLAG_FORCEINTRA;
3155  } else {
3156  pic_params.encodePicFlags = 0;
3157  }
3158 
3159  pic_params.frameIdx = ctx->frame_idx_counter++;
3160  pic_params.inputTimeStamp = frame->pts;
3161 
3162  if (ctx->extra_sei) {
3163  res = prepare_sei_data_array(avctx, frame);
3164  if (res < 0)
3165  return res;
3166  sei_count = res;
3167  }
3168 
3169 #ifdef NVENC_HAVE_HEVC_AND_AV1_MASTERING_METADATA
3170  res = nvenc_set_mastering_display_data(avctx, frame, &pic_params, &mastering_disp_info, &content_light_level);
3171  if (res < 0)
3172  return res;
3173 #endif
3174 
3175 #ifdef NVENC_HAVE_MVHEVC
3176  if (ctx->multiview) {
3179 
3180  if (sd_view_id)
3181  ctx->next_view_id = *(int*)sd_view_id->data;
3182 
3183  pic_params.codecPicParams.hevcPicParams.viewId = ctx->next_view_id;
3184 
3185  if (sd_tdrdi) {
3187 
3188  ref_disp_info.refViewingDistanceFlag = tdrdi->ref_viewing_distance_flag;
3189  ref_disp_info.precRefViewingDist = tdrdi->prec_ref_viewing_dist;
3190  ref_disp_info.precRefDisplayWidth = tdrdi->prec_ref_display_width;
3191 
3192  ref_disp_info.numRefDisplaysMinus1 = tdrdi->num_ref_displays - 1;
3193 
3194  for (i = 0; i < tdrdi->num_ref_displays &&
3195  i < FF_ARRAY_ELEMS(ref_disp_info.leftViewId); i++) {
3196  const AV3DReferenceDisplay *display = av_tdrdi_get_display(tdrdi, i);
3197  ref_disp_info.leftViewId[i] = display->left_view_id;
3198  ref_disp_info.rightViewId[i] = display->right_view_id;
3199  ref_disp_info.exponentRefDisplayWidth[i] = display->exponent_ref_display_width;
3200  ref_disp_info.mantissaRefDisplayWidth[i] = display->mantissa_ref_display_width;
3201  ref_disp_info.exponentRefViewingDistance[i] = display->exponent_ref_viewing_distance;
3202  ref_disp_info.mantissaRefViewingDistance[i] = display->mantissa_ref_viewing_distance;
3203  ref_disp_info.additionalShiftPresentFlag[i] = display->additional_shift_present_flag;
3204  ref_disp_info.numSampleShiftPlus512[i] = display->num_sample_shift + 512;
3205  }
3206 
3207  pic_params.codecPicParams.hevcPicParams.p3DReferenceDisplayInfo = &ref_disp_info;
3208  ctx->display_sei_sent = 1;
3209  } else if (!ctx->display_sei_sent) {
3210  ref_disp_info.precRefDisplayWidth = 31;
3211  ref_disp_info.leftViewId[0] = 0;
3212  ref_disp_info.rightViewId[0] = 1;
3213 
3214  pic_params.codecPicParams.hevcPicParams.p3DReferenceDisplayInfo = &ref_disp_info;
3215  ctx->display_sei_sent = 1;
3216  }
3217 
3218  ctx->next_view_id = !ctx->next_view_id;
3219  }
3220 #endif
3221 
3222  res = nvenc_store_frame_data(avctx, &pic_params, frame);
3223  if (res < 0)
3224  return res;
3225 
3226  nvenc_codec_specific_pic_params(avctx, frame, &pic_params, ctx->sei_data, sei_count);
3227  } else {
3228  pic_params.encodePicFlags = NV_ENC_PIC_FLAG_EOS;
3229  }
3230 
3231  res = nvenc_push_context(avctx);
3232  if (res < 0)
3233  return res;
3234 
3235  nv_status = p_nvenc->nvEncEncodePicture(ctx->nvencoder, &pic_params);
3236 
3237  for (i = 0; i < sei_count; i++)
3238  av_freep(&(ctx->sei_data[i].payload));
3239 
3240  res = nvenc_pop_context(avctx);
3241  if (res < 0)
3242  return res;
3243 
3244  if (nv_status != NV_ENC_SUCCESS &&
3245  nv_status != NV_ENC_ERR_NEED_MORE_INPUT)
3246  return nvenc_print_error(avctx, nv_status, "EncodePicture failed!");
3247 
3248  if (frame && frame->buf[0]) {
3249  av_fifo_write(ctx->output_surface_queue, &in_surf, 1);
3250 
3252  timestamp_queue_enqueue(ctx->timestamp_list, frame->pts);
3253  }
3254 
3255  /* all the pending buffers are now ready for output */
3256  if (nv_status == NV_ENC_SUCCESS) {
3257  while (av_fifo_read(ctx->output_surface_queue, &tmp_out_surf, 1) >= 0)
3258  av_fifo_write(ctx->output_surface_ready_queue, &tmp_out_surf, 1);
3259  }
3260 
3261  return 0;
3262 }
3263 
3265 {
3266  NvencSurface *tmp_out_surf;
3267  int res, res2;
3268 
3269  NvencContext *ctx = avctx->priv_data;
3270 
3271  AVFrame *frame = ctx->frame;
3272 
3273  if ((!ctx->cu_context && !ctx->d3d11_device) || !ctx->nvencoder)
3274  return AVERROR(EINVAL);
3275 
3276  if (!frame->buf[0]) {
3277  res = ff_encode_get_frame(avctx, frame);
3278  if (res < 0 && res != AVERROR_EOF)
3279  return res;
3280  }
3281 
3282  res = nvenc_send_frame(avctx, frame);
3283  if (res < 0) {
3284  if (res != AVERROR(EAGAIN))
3285  return res;
3286  } else
3288 
3289  if (output_ready(avctx, avctx->internal->draining)) {
3290  av_fifo_read(ctx->output_surface_ready_queue, &tmp_out_surf, 1);
3291 
3292  res = nvenc_push_context(avctx);
3293  if (res < 0)
3294  return res;
3295 
3296  res = process_output_surface(avctx, pkt, tmp_out_surf);
3297 
3298  res2 = nvenc_pop_context(avctx);
3299  if (res2 < 0)
3300  return res2;
3301 
3302  if (res)
3303  return res;
3304 
3305  av_fifo_write(ctx->unused_surface_queue, &tmp_out_surf, 1);
3306  } else if (avctx->internal->draining) {
3307  return AVERROR_EOF;
3308  } else {
3309  return AVERROR(EAGAIN);
3310  }
3311 
3312  return 0;
3313 }
3314 
3316 {
3317  NvencContext *ctx = avctx->priv_data;
3318 
3319  nvenc_send_frame(avctx, NULL);
3320  av_fifo_reset2(ctx->timestamp_list);
3321  ctx->output_frame_num = 0;
3322  ctx->initial_delay_time = 0;
3323 }
ANY_DEVICE
@ ANY_DEVICE
Definition: nvenc.h:202
error
static void error(const char *err)
Definition: target_bsf_fuzzer.c:32
flags
const SwsFlags flags[]
Definition: swscale.c:61
AVHWDeviceContext::hwctx
void * hwctx
The format-specific data, allocated and freed by libavutil along with this context.
Definition: hwcontext.h:86
ff_alloc_a53_sei
int ff_alloc_a53_sei(const AVFrame *frame, size_t prefix_len, void **data, size_t *sei_size)
Check AVFrame for A53 side data and allocate and fill SEI message with A53 info.
Definition: atsc_a53.c:26
AV_LOG_WARNING
#define AV_LOG_WARNING
Something somehow does not look correct.
Definition: log.h:216
PRESET_ALIAS
#define PRESET_ALIAS(alias, name,...)
Definition: nvenc.c:199
AV_PIX_FMT_CUDA
@ AV_PIX_FMT_CUDA
HW acceleration through CUDA.
Definition: pixfmt.h:260
AV3DReferenceDisplay::num_sample_shift
int16_t num_sample_shift
The recommended additional horizontal shift for a stereo pair corresponding to the n-th reference bas...
Definition: tdrdi.h:141
AVMasteringDisplayMetadata::max_luminance
AVRational max_luminance
Max luminance of mastering display (cd/m^2).
Definition: mastering_display_metadata.h:57
AVPixelFormat
AVPixelFormat
Pixel format.
Definition: pixfmt.h:71
name
it s the only field you need to keep assuming you have a context There is some magic you don t need to care about around this just let it vf default minimum maximum flags name is the option name
Definition: writing_filters.txt:88
GUIDTuple::guid
const GUID guid
Definition: nvenc.c:195
level
uint8_t level
Definition: svq3.c:208
av_clip
#define av_clip
Definition: common.h:100
AVERROR
Filter the word “frame” indicates either a video frame or a group of audio as stored in an AVFrame structure Format for each input and each output the list of supported formats For video that means pixel format For audio that means channel sample they are references to shared objects When the negotiation mechanism computes the intersection of the formats supported at each end of a all references to both lists are replaced with a reference to the intersection And when a single format is eventually chosen for a link amongst the remaining all references to the list are updated That means that if a filter requires that its input and output have the same format amongst a supported all it has to do is use a reference to the same list of formats query_formats can leave some formats unset and return AVERROR(EAGAIN) to cause the negotiation mechanism toagain later. That can be used by filters with complex requirements to use the format negotiated on one link to set the formats supported on another. Frame references ownership and permissions
NV_ENC_H264_PROFILE_MAIN
@ NV_ENC_H264_PROFILE_MAIN
Definition: nvenc.h:169
AVCodecContext::colorspace
enum AVColorSpace colorspace
YUV colorspace type.
Definition: avcodec.h:659
AVCodecContext::decoded_side_data
AVFrameSideData ** decoded_side_data
Array containing static side data, such as HDR10 CLL / MDCV structures.
Definition: avcodec.h:1924
av_frame_get_side_data
AVFrameSideData * av_frame_get_side_data(const AVFrame *frame, enum AVFrameSideDataType type)
Definition: frame.c:657
AV_PIX_FMT_BGR32
#define AV_PIX_FMT_BGR32
Definition: pixfmt.h:502
GUIDTuple
Definition: nvenc.c:194
NONE
@ NONE
Definition: af_afade.c:60
GUIDTuple::flags
int flags
Definition: nvenc.c:196
av_pix_fmt_desc_get
const AVPixFmtDescriptor * av_pix_fmt_desc_get(enum AVPixelFormat pix_fmt)
Definition: pixdesc.c:3341
AVERROR_EOF
#define AVERROR_EOF
End of file.
Definition: error.h:57
AVBufferRef::data
uint8_t * data
The data buffer.
Definition: buffer.h:90
timecode_internal.h
AV_FRAME_DATA_A53_CC
@ AV_FRAME_DATA_A53_CC
ATSC A53 Part 4 Closed Captions.
Definition: frame.h:59
AV_PROFILE_H264_MAIN
#define AV_PROFILE_H264_MAIN
Definition: defs.h:112
nvenc_push_context
static int nvenc_push_context(AVCodecContext *avctx)
Definition: nvenc.c:378
AVMasteringDisplayMetadata::display_primaries
AVRational display_primaries[3][2]
CIE 1931 xy chromaticity coords of color primaries (r, g, b order).
Definition: mastering_display_metadata.h:42
AVHWFramesContext::format
enum AVPixelFormat format
The pixel format identifying the underlying HW surface type.
Definition: hwcontext.h:198
AVPictureType
AVPictureType
Definition: avutil.h:276
output_ready
static int output_ready(AVCodecContext *avctx, int flush)
Definition: nvenc.c:2803
NvencContext
Definition: nvenc.h:211
AV3DReferenceDisplaysInfo::prec_ref_viewing_dist
uint8_t prec_ref_viewing_dist
The exponent of the maximum allowable truncation error for {exponent,mantissa}_ref_viewing_distance a...
Definition: tdrdi.h:72
AVCodecContext::codec_descriptor
const struct AVCodecDescriptor * codec_descriptor
AVCodecDescriptor.
Definition: avcodec.h:1704
int64_t
long long int64_t
Definition: coverity.c:34
NVENC_RGB_MODE_DISABLED
@ NVENC_RGB_MODE_DISABLED
Definition: nvenc.h:206
av_tdrdi_get_display
static av_always_inline AV3DReferenceDisplay * av_tdrdi_get_display(AV3DReferenceDisplaysInfo *tdrdi, unsigned int idx)
Definition: tdrdi.h:145
AV_FRAME_DATA_S12M_TIMECODE
@ AV_FRAME_DATA_S12M_TIMECODE
Timecode which conforms to SMPTE ST 12-1.
Definition: frame.h:152
AV_PROFILE_HEVC_MAIN
#define AV_PROFILE_HEVC_MAIN
Definition: defs.h:159
NvencSurface::in_ref
AVFrame * in_ref
Definition: nvenc.h:116
av_frame_free
void av_frame_free(AVFrame **frame)
Free the frame and any dynamically allocated objects in it, e.g.
Definition: frame.c:63
AVContentLightMetadata::MaxCLL
unsigned MaxCLL
Max content light level (cd/m^2).
Definition: mastering_display_metadata.h:111
nvenc_store_frame_data
static int nvenc_store_frame_data(AVCodecContext *avctx, NV_ENC_PIC_PARAMS *pic_params, const AVFrame *frame)
Definition: nvenc.c:2657
av_fifo_peek
int av_fifo_peek(const AVFifo *f, void *buf, size_t nb_elems, size_t offset)
Read data from a FIFO without modifying FIFO state.
Definition: fifo.c:255
AV3DReferenceDisplay
Data structure for single deference display information.
Definition: tdrdi.h:100
AVFrame
This structure describes decoded (raw) audio or video data.
Definition: frame.h:421
pixdesc.h
AVCodecContext::color_trc
enum AVColorTransferCharacteristic color_trc
Color Transfer Characteristic.
Definition: avcodec.h:652
nvenc_set_timestamp
static int nvenc_set_timestamp(AVCodecContext *avctx, NV_ENC_LOCK_BITSTREAM *params, AVPacket *pkt)
Definition: nvenc.c:2600
AVCOL_RANGE_JPEG
@ AVCOL_RANGE_JPEG
Full range content.
Definition: pixfmt.h:750
P1
#define P1
Definition: cavsdsp.c:37
internal.h
AVPacket::data
uint8_t * data
Definition: packet.h:546
nvenc_errors
static const struct @213 nvenc_errors[]
NVENC_TWO_PASSES
@ NVENC_TWO_PASSES
Definition: nvenc.h:195
encode.h
AVCodecContext::b_quant_offset
float b_quant_offset
qscale offset between IP and B-frames
Definition: avcodec.h:785
NvencFrameData
Definition: nvenc.h:126
reconfig_encoder
static void reconfig_encoder(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2927
AV_LOG_VERBOSE
#define AV_LOG_VERBOSE
Detailed information.
Definition: log.h:226
AVCOL_SPC_RGB
@ AVCOL_SPC_RGB
order of coefficients is actually GBR, also IEC 61966-2-1 (sRGB), YZX and ST 428-1
Definition: pixfmt.h:674
timestamp_queue_peek
static int64_t timestamp_queue_peek(AVFifo *queue, size_t index)
Definition: nvenc.c:2592
ff_nvenc_pix_fmts
enum AVPixelFormat ff_nvenc_pix_fmts[]
Definition: nvenc.c:60
set_constqp
static av_cold void set_constqp(AVCodecContext *avctx)
Definition: nvenc.c:867
NvencSurface
Definition: nvenc.h:113
AVPacket::duration
int64_t duration
Duration of this packet in AVStream->time_base units, 0 if unknown.
Definition: packet.h:564
mathematics.h
FFMAX
#define FFMAX(a, b)
Definition: macros.h:47
av_buffer_ref
AVBufferRef * av_buffer_ref(const AVBufferRef *buf)
Create a new reference to an AVBuffer.
Definition: buffer.c:103
nvenc_print_error
static int nvenc_print_error(AVCodecContext *avctx, NVENCSTATUS err, const char *error_string)
Definition: nvenc.c:174
BD
#define BD
AVERROR_UNKNOWN
#define AVERROR_UNKNOWN
Unknown error, typically from an external library.
Definition: error.h:73
AVCodecContext::qmax
int qmax
maximum quantizer
Definition: avcodec.h:1241
nverr
NVENCSTATUS nverr
Definition: nvenc.c:127
set_lossless
static av_cold void set_lossless(AVCodecContext *avctx)
Definition: nvenc.c:982
PRESET
#define PRESET(name,...)
Definition: nvenc.c:202
AV_PKT_FLAG_KEY
#define AV_PKT_FLAG_KEY
The packet contains a keyframe.
Definition: packet.h:601
ff_nvenc_encode_flush
av_cold void ff_nvenc_encode_flush(AVCodecContext *avctx)
Definition: nvenc.c:3315
AV_STEREO3D_UNSPEC
@ AV_STEREO3D_UNSPEC
Video is stereoscopic but the packing is unspecified.
Definition: stereo3d.h:143
av_malloc
#define av_malloc(s)
Definition: tableprint_vlc.h:31
AV_CODEC_FLAG_GLOBAL_HEADER
#define AV_CODEC_FLAG_GLOBAL_HEADER
Place global headers in extradata instead of every keyframe.
Definition: avcodec.h:318
ff_timecode_set_smpte
void ff_timecode_set_smpte(unsigned *drop, unsigned *hh, unsigned *mm, unsigned *ss, unsigned *ff, AVRational rate, uint32_t tcsmpte, int prevent_df, int skip_field)
Convert SMPTE 12M binary representation to sei info.
Definition: timecode_internal.c:33
nvenc.h
AV_FRAME_FLAG_TOP_FIELD_FIRST
#define AV_FRAME_FLAG_TOP_FIELD_FIRST
A flag to mark frames where the top field is displayed first if the content is interlaced.
Definition: frame.h:649
av_memdup
void * av_memdup(const void *p, size_t size)
Duplicate a buffer with av_malloc().
Definition: mem.c:304
AV_HWDEVICE_TYPE_CUDA
@ AV_HWDEVICE_TYPE_CUDA
Definition: hwcontext.h:30
AVContentLightMetadata
Content light level needed by to transmit HDR over HDMI (CTA-861.3).
Definition: mastering_display_metadata.h:107
compute_dar
static void compute_dar(AVCodecContext *avctx, int *dw, int *dh)
Definition: nvenc.c:1771
AV3DReferenceDisplaysInfo
This structure describes information about the reference display width(s) and reference viewing dista...
Definition: tdrdi.h:53
AVCodecContext::framerate
AVRational framerate
Definition: avcodec.h:551
AVCOL_SPC_BT470BG
@ AVCOL_SPC_BT470BG
also ITU-R BT601-6 625 / ITU-R BT1358 625 / ITU-R BT1700 625 PAL & SECAM / IEC 61966-2-4 xvYCC601
Definition: pixfmt.h:679
nvenc_upload_frame
static int nvenc_upload_frame(AVCodecContext *avctx, const AVFrame *frame, NvencSurface *nvenc_frame)
Definition: nvenc.c:2420
NvencDynLoadFunctions::nvenc_device_count
int nvenc_device_count
Definition: nvenc.h:140
AV_CODEC_FLAG_COPY_OPAQUE
#define AV_CODEC_FLAG_COPY_OPAQUE
Definition: avcodec.h:279
AVCodecContext::i_quant_factor
float i_quant_factor
qscale factor between P- and I-frames If > 0 then the last P-frame quantizer will be used (q = lastp_...
Definition: avcodec.h:794
set_vbr
static av_cold void set_vbr(AVCodecContext *avctx)
Definition: nvenc.c:905
nvenc_map_error
static int nvenc_map_error(NVENCSTATUS err, const char **desc)
Definition: nvenc.c:159
AVCodecContext::codec
const struct AVCodec * codec
Definition: avcodec.h:440
AVPacket::opaque_ref
AVBufferRef * opaque_ref
AVBufferRef for free use by the API user.
Definition: packet.h:582
nvenc_check_cap
static int nvenc_check_cap(AVCodecContext *avctx, NV_ENC_CAPS cap)
Definition: nvenc.c:463
presets
static const Preset presets[]
Definition: vf_pseudocolor.c:286
LIST_DEVICES
@ LIST_DEVICES
Definition: nvenc.h:201
fail
#define fail()
Definition: checkasm.h:196
av_fifo_write
int av_fifo_write(AVFifo *f, const void *buf, size_t nb_elems)
Write data into a FIFO.
Definition: fifo.c:188
AV_STEREO3D_2D
@ AV_STEREO3D_2D
Video is not stereoscopic (and metadata has to be there).
Definition: stereo3d.h:52
dummy
int dummy
Definition: motion.c:66
NvencSurface::format
NV_ENC_BUFFER_FORMAT format
Definition: nvenc.h:123
nvenc_setup_rate_control
static av_cold int nvenc_setup_rate_control(AVCodecContext *avctx)
Definition: nvenc.c:1074
sei.h
AVCodecContext::refs
int refs
number of reference frames
Definition: avcodec.h:689
AV_HWDEVICE_TYPE_D3D11VA
@ AV_HWDEVICE_TYPE_D3D11VA
Definition: hwcontext.h:35
nvenc_map_preset
static void nvenc_map_preset(NvencContext *ctx)
Definition: nvenc.c:204
NV_ENC_HEVC_PROFILE_MAIN_10
@ NV_ENC_HEVC_PROFILE_MAIN_10
Definition: nvenc.h:182
AVCodecContext::flags
int flags
AV_CODEC_FLAG_*.
Definition: avcodec.h:488
val
static double val(void *priv, double ch)
Definition: aeval.c:77
nvenc_copy_frame
static int nvenc_copy_frame(AVCodecContext *avctx, NvencSurface *nv_surface, NV_ENC_LOCK_INPUT_BUFFER *lock_buffer_params, const AVFrame *frame)
Definition: nvenc.c:2302
AVERROR_BUFFER_TOO_SMALL
#define AVERROR_BUFFER_TOO_SMALL
Buffer too small.
Definition: error.h:53
hwcontext_cuda.h
av_image_fill_pointers
int av_image_fill_pointers(uint8_t *data[4], enum AVPixelFormat pix_fmt, int height, uint8_t *ptr, const int linesizes[4])
Fill plane data pointers for an image with pixel format pix_fmt and height height.
Definition: imgutils.c:145
NV_ENC_H264_PROFILE_HIGH
@ NV_ENC_H264_PROFILE_HIGH
Definition: nvenc.h:170
ss
#define ss(width, name, subs,...)
Definition: cbs_vp9.c:202
IS_GBRP
#define IS_GBRP(pix_fmt)
Definition: nvenc.c:123
AVCUDADeviceContext::cuda_ctx
CUcontext cuda_ctx
Definition: hwcontext_cuda.h:43
av_reduce
int av_reduce(int *dst_num, int *dst_den, int64_t num, int64_t den, int64_t max)
Reduce a fraction.
Definition: rational.c:35
nvenc_print_driver_requirement
static void nvenc_print_driver_requirement(AVCodecContext *avctx, int level)
Definition: nvenc.c:258
AVRational::num
int num
Numerator.
Definition: rational.h:59
NV_ENC_H264_PROFILE_HIGH_444P
@ NV_ENC_H264_PROFILE_HIGH_444P
Definition: nvenc.h:177
AV_CODEC_FLAG_INTERLACED_DCT
#define AV_CODEC_FLAG_INTERLACED_DCT
Use interlaced DCT.
Definition: avcodec.h:310
nvenc_check_capabilities
static int nvenc_check_capabilities(AVCodecContext *avctx)
Definition: nvenc.c:480
AVHWDeviceContext
This struct aggregates all the (hardware/vendor-specific) "high-level" state, i.e.
Definition: hwcontext.h:61
av_frame_alloc
AVFrame * av_frame_alloc(void)
Allocate an AVFrame and set its fields to default values.
Definition: frame.c:51
AVCodecContext::color_primaries
enum AVColorPrimaries color_primaries
Chromaticity coordinates of the source primaries.
Definition: avcodec.h:645
NVENC_LOSSLESS
@ NVENC_LOSSLESS
Definition: nvenc.h:193
AV_STEREO3D_FRAMESEQUENCE
@ AV_STEREO3D_FRAMESEQUENCE
Views are alternated temporally.
Definition: stereo3d.h:89
pkt
AVPacket * pkt
Definition: movenc.c:60
AV_LOG_ERROR
#define AV_LOG_ERROR
Something went wrong and cannot losslessly be recovered.
Definition: log.h:210
AVFrameSideData::size
size_t size
Definition: frame.h:279
FF_ARRAY_ELEMS
#define FF_ARRAY_ELEMS(a)
Definition: sinewin_tablegen.c:29
av_cold
#define av_cold
Definition: attributes.h:90
av_fifo_read
int av_fifo_read(AVFifo *f, void *buf, size_t nb_elems)
Read data from a FIFO.
Definition: fifo.c:240
AV_PIX_FMT_YUVJ422P
@ AV_PIX_FMT_YUVJ422P
planar YUV 4:2:2, 16bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV422P and setting col...
Definition: pixfmt.h:86
AVCodecContext::extradata_size
int extradata_size
Definition: avcodec.h:515
AVCodecContext::has_b_frames
int has_b_frames
Size of the frame reordering buffer in the decoder.
Definition: avcodec.h:697
ff_nvenc_encode_init
av_cold int ff_nvenc_encode_init(AVCodecContext *avctx)
Definition: nvenc.c:2239
av_fast_realloc
void * av_fast_realloc(void *ptr, unsigned int *size, size_t min_size)
Reallocate the given buffer if it is not large enough, otherwise do nothing.
Definition: mem.c:497
stereo3d.h
AVMasteringDisplayMetadata::white_point
AVRational white_point[2]
CIE 1931 xy chromaticity coords of white point.
Definition: mastering_display_metadata.h:47
AVCodecContext::global_quality
int global_quality
Global quality for codecs which cannot change it per frame.
Definition: avcodec.h:1217
AVD3D11VADeviceContext::device
ID3D11Device * device
Device used for texture creation and access.
Definition: hwcontext_d3d11va.h:56
AV_PIX_FMT_YUV444P16
#define AV_PIX_FMT_YUV444P16
Definition: pixfmt.h:541
AVFormatContext::flags
int flags
Flags modifying the (de)muxer behaviour.
Definition: avformat.h:1415
AVCodecContext::nb_decoded_side_data
int nb_decoded_side_data
Definition: avcodec.h:1925
AV_PIX_FMT_0BGR32
#define AV_PIX_FMT_0BGR32
Definition: pixfmt.h:505
pix_fmt
static enum AVPixelFormat pix_fmt
Definition: demux_decode.c:41
NvencDynLoadFunctions
Definition: nvenc.h:134
AV_PROFILE_H264_HIGH_10
#define AV_PROFILE_H264_HIGH_10
Definition: defs.h:115
NV_ENC_HEVC_PROFILE_REXT
@ NV_ENC_HEVC_PROFILE_REXT
Definition: nvenc.h:183
ctx
AVFormatContext * ctx
Definition: movenc.c:49
SEI_TYPE_USER_DATA_REGISTERED_ITU_T_T35
@ SEI_TYPE_USER_DATA_REGISTERED_ITU_T_T35
Definition: sei.h:34
av_rescale_q
int64_t av_rescale_q(int64_t a, AVRational bq, AVRational cq)
Rescale a 64-bit integer by 2 rational numbers.
Definition: mathematics.c:142
AV_FRAME_DATA_3D_REFERENCE_DISPLAYS
@ AV_FRAME_DATA_3D_REFERENCE_DISPLAYS
This side data contains information about the reference display width(s) and reference viewing distan...
Definition: frame.h:256
nvenc_setup_extradata
static av_cold int nvenc_setup_extradata(AVCodecContext *avctx)
Definition: nvenc.c:2120
timestamp_queue_enqueue
static void timestamp_queue_enqueue(AVFifo *queue, int64_t timestamp)
Definition: nvenc.c:2578
AV_PIX_FMT_YUV420P
@ AV_PIX_FMT_YUV420P
planar YUV 4:2:0, 12bpp, (1 Cr & Cb sample per 2x2 Y samples)
Definition: pixfmt.h:73
AVCodecContext::rc_max_rate
int64_t rc_max_rate
maximum bitrate
Definition: avcodec.h:1270
timestamp_queue_dequeue
static int64_t timestamp_queue_dequeue(AVFifo *queue)
Definition: nvenc.c:2583
AVPacket::opaque
void * opaque
for some private data of the user
Definition: packet.h:571
NvencDynLoadFunctions::nvenc_dl
NvencFunctions * nvenc_dl
Definition: nvenc.h:137
AVCPBProperties
This structure describes the bitrate properties of an encoded bitstream.
Definition: defs.h:279
AV_CODEC_ID_H264
@ AV_CODEC_ID_H264
Definition: codec_id.h:79
NvencSurface::pitch
int pitch
Definition: nvenc.h:120
AV_PIX_FMT_YUVJ444P
@ AV_PIX_FMT_YUVJ444P
planar YUV 4:4:4, 24bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV444P and setting col...
Definition: pixfmt.h:87
AV_PROFILE_H264_HIGH_422
#define AV_PROFILE_H264_HIGH_422
Definition: defs.h:118
NvencSurface::input_surface
NV_ENC_INPUT_PTR input_surface
Definition: nvenc.h:115
AVCodecDescriptor::props
int props
Codec properties, a combination of AV_CODEC_PROP_* flags.
Definition: codec_desc.h:54
if
if(ret)
Definition: filter_design.txt:179
AVCodecContext::rc_buffer_size
int rc_buffer_size
decoder bitstream buffer size
Definition: avcodec.h:1255
NVENC_CAP
#define NVENC_CAP
Definition: nvenc.c:50
AV_PIX_FMT_GBRP16
#define AV_PIX_FMT_GBRP16
Definition: pixfmt.h:547
IS_10BIT
#define IS_10BIT(pix_fmt)
Definition: nvenc.c:97
AV3DReferenceDisplaysInfo::ref_viewing_distance_flag
uint8_t ref_viewing_distance_flag
A flag to indicate the presence of reference viewing distance.
Definition: tdrdi.h:65
fabs
static __device__ float fabs(float a)
Definition: cuda_runtime.h:182
NULL
#define NULL
Definition: coverity.c:32
AVHWFramesContext::sw_format
enum AVPixelFormat sw_format
The pixel format identifying the actual data layout of the hardware frames.
Definition: hwcontext.h:211
IS_YUV422
#define IS_YUV422(pix_fmt)
Definition: nvenc.c:119
NvencSurface::reg_idx
int reg_idx
Definition: nvenc.h:117
AVCodecContext::color_range
enum AVColorRange color_range
MPEG vs JPEG YUV range.
Definition: avcodec.h:669
av_buffer_unref
void av_buffer_unref(AVBufferRef **buf)
Free a given reference and automatically free the buffer if there are no more references to it.
Definition: buffer.c:139
SEI_TYPE_TIME_CODE
@ SEI_TYPE_TIME_CODE
Definition: sei.h:95
AV_CODEC_ID_AV1
@ AV_CODEC_ID_AV1
Definition: codec_id.h:284
tmp
static uint8_t tmp[20]
Definition: aes_ctr.c:47
AVRational
Rational number (pair of numerator and denominator).
Definition: rational.h:58
AVCodecContext::internal
struct AVCodecInternal * internal
Private context used for internal data.
Definition: avcodec.h:466
AV_PIX_FMT_YUVJ420P
@ AV_PIX_FMT_YUVJ420P
planar YUV 4:2:0, 12bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV420P and setting col...
Definition: pixfmt.h:85
AVCodecContext::bit_rate
int64_t bit_rate
the average bitrate
Definition: avcodec.h:481
NVENC_LOWLATENCY
@ NVENC_LOWLATENCY
Definition: nvenc.h:192
ff_nvenc_encode_close
av_cold int ff_nvenc_encode_close(AVCodecContext *avctx)
Definition: nvenc.c:2154
FrameData::duration
int64_t duration
Definition: librav1e.c:60
AV_PICTURE_TYPE_I
@ AV_PICTURE_TYPE_I
Intra.
Definition: avutil.h:278
AV3DReferenceDisplay::exponent_ref_display_width
uint8_t exponent_ref_display_width
The exponent part of the reference display width of the n-th reference display.
Definition: tdrdi.h:114
P3
#define P3
Definition: dsp_template.c:801
av_fifo_can_read
size_t av_fifo_can_read(const AVFifo *f)
Definition: fifo.c:87
flush
void(* flush)(AVBSFContext *ctx)
Definition: dts2pts.c:370
NV_ENC_H264_PROFILE_BASELINE
@ NV_ENC_H264_PROFILE_BASELINE
Definition: nvenc.h:168
FrameData::frame_opaque
void * frame_opaque
Definition: librav1e.c:62
NvencDynLoadFunctions::cuda_dl
CudaFunctions * cuda_dl
Definition: nvenc.h:136
AV_FRAME_DATA_MASTERING_DISPLAY_METADATA
@ AV_FRAME_DATA_MASTERING_DISPLAY_METADATA
Mastering display metadata associated with a video frame.
Definition: frame.h:120
nvenc_setup_h264_config
static av_cold int nvenc_setup_h264_config(AVCodecContext *avctx)
Definition: nvenc.c:1253
AV3DReferenceDisplaysInfo::prec_ref_display_width
uint8_t prec_ref_display_width
The exponent of the maximum allowable truncation error for {exponent,mantissa}_ref_display_width as g...
Definition: tdrdi.h:58
NV_ENC_HEVC_PROFILE_MAIN
@ NV_ENC_HEVC_PROFILE_MAIN
Definition: nvenc.h:181
AVPixFmtDescriptor::flags
uint64_t flags
Combination of AV_PIX_FMT_FLAG_...
Definition: pixdesc.h:94
AV_PROFILE_HEVC_MAIN_10
#define AV_PROFILE_HEVC_MAIN_10
Definition: defs.h:160
AV_PROFILE_HEVC_REXT
#define AV_PROFILE_HEVC_REXT
Definition: defs.h:162
index
int index
Definition: gxfenc.c:90
AV_FRAME_DATA_SEI_UNREGISTERED
@ AV_FRAME_DATA_SEI_UNREGISTERED
User data unregistered metadata associated with a video frame.
Definition: frame.h:178
AVCodecContext::time_base
AVRational time_base
This is the fundamental unit of time (in seconds) in terms of which frame timestamps are represented.
Definition: avcodec.h:535
av_fifo_reset2
void av_fifo_reset2(AVFifo *f)
Definition: fifo.c:280
AV_PIX_FMT_X2BGR10
#define AV_PIX_FMT_X2BGR10
Definition: pixfmt.h:597
AVCUDADeviceContext::stream
CUstream stream
Definition: hwcontext_cuda.h:44
desc
const char * desc
Definition: nvenc.c:129
nvenc_pop_context
static int nvenc_pop_context(AVCodecContext *avctx)
Definition: nvenc.c:389
HW_CONFIG_ENCODER_DEVICE
#define HW_CONFIG_ENCODER_DEVICE(format, device_type_)
Definition: hwconfig.h:95
AVFifo
Definition: fifo.c:35
AVCodecContext::gop_size
int gop_size
the number of pictures in a group of pictures, or 0 for intra_only
Definition: avcodec.h:1005
height
#define height
Definition: dsp.h:89
av_frame_ref
int av_frame_ref(AVFrame *dst, const AVFrame *src)
Set up a new reference to the data described by the source frame.
Definition: frame.c:276
nvenc_check_codec_support
static int nvenc_check_codec_support(AVCodecContext *avctx)
Definition: nvenc.c:427
AV_PIX_FMT_FLAG_RGB
#define AV_PIX_FMT_FLAG_RGB
The pixel format contains RGB-like data (as opposed to YUV/grayscale).
Definition: pixdesc.h:136
AV_CODEC_PROP_REORDER
#define AV_CODEC_PROP_REORDER
Codec supports frame reordering.
Definition: codec_desc.h:92
ff_nvenc_hw_configs
const AVCodecHWConfigInternal *const ff_nvenc_hw_configs[]
Definition: nvenc.c:87
MAX_REGISTERED_FRAMES
#define MAX_REGISTERED_FRAMES
Definition: nvenc.h:41
ff_alloc_timecode_sei
int ff_alloc_timecode_sei(const AVFrame *frame, AVRational rate, size_t prefix_len, void **data, size_t *sei_size)
Check AVFrame for S12M timecode side data and allocate and fill TC SEI message with timecode info.
Definition: utils.c:969
P6
#define P6
Definition: filter_template.c:407
for
for(k=2;k<=8;++k)
Definition: h264pred_template.c:424
nvenc_alloc_surface
static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
Definition: nvenc.c:2018
AV_NOPTS_VALUE
#define AV_NOPTS_VALUE
Undefined timestamp value.
Definition: avutil.h:247
AVFrameSideData::data
uint8_t * data
Definition: frame.h:278
nvenc_check_device
static av_cold int nvenc_check_device(AVCodecContext *avctx, int idx)
Definition: nvenc.c:676
nvenc_register_frame
static int nvenc_register_frame(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2366
AVCodecHWConfigInternal
Definition: hwconfig.h:25
frame_data
FrameData * frame_data(AVFrame *frame)
Get our axiliary frame data attached to the frame, allocating it if needed.
Definition: ffmpeg.c:460
AV_PIX_FMT_NV16
@ AV_PIX_FMT_NV16
interleaved chroma YUV 4:2:2, 16bpp, (1 Cr & Cb sample per 2x1 Y samples)
Definition: pixfmt.h:198
ff_nvenc_receive_packet
int ff_nvenc_receive_packet(AVCodecContext *avctx, AVPacket *pkt)
Definition: nvenc.c:3264
AVPacket::dts
int64_t dts
Decompression timestamp in AVStream->time_base units; the time at which the packet is decompressed.
Definition: packet.h:545
AV_PIX_FMT_RGB32
#define AV_PIX_FMT_RGB32
Definition: pixfmt.h:500
NVENC_DEPRECATED_PRESET
@ NVENC_DEPRECATED_PRESET
Definition: nvenc.h:197
nvenc_override_rate_control
static void nvenc_override_rate_control(AVCodecContext *avctx)
Definition: nvenc.c:996
AVERROR_EXTERNAL
#define AVERROR_EXTERNAL
Generic error in an external library.
Definition: error.h:59
AVPacket::flags
int flags
A combination of AV_PKT_FLAG values.
Definition: packet.h:552
AV_PIX_FMT_D3D11
@ AV_PIX_FMT_D3D11
Hardware surfaces for Direct3D11.
Definition: pixfmt.h:336
AV_PIX_FMT_P216
#define AV_PIX_FMT_P216
Definition: pixfmt.h:603
FrameData::frame_opaque_ref
AVBufferRef * frame_opaque_ref
Definition: librav1e.c:63
xf
#define xf(width, name, var, range_min, range_max, subs,...)
Definition: cbs_av1.c:621
AVCPBProperties::avg_bitrate
int64_t avg_bitrate
Average bitrate of the stream, in bits per second.
Definition: defs.h:294
AV_PIX_FMT_P210
#define AV_PIX_FMT_P210
Definition: pixfmt.h:599
get_free_frame
static NvencSurface * get_free_frame(NvencContext *ctx)
Definition: nvenc.c:2291
AV_LOG_INFO
#define AV_LOG_INFO
Standard information.
Definition: log.h:221
AVCodecContext::b_quant_factor
float b_quant_factor
qscale factor between IP and B-frames If > 0 then the last P-frame quantizer will be used (q= lastp_q...
Definition: avcodec.h:778
AV_FRAME_DATA_VIEW_ID
@ AV_FRAME_DATA_VIEW_ID
This side data must be associated with a video frame.
Definition: frame.h:245
AVCodec::id
enum AVCodecID id
Definition: codec.h:186
nvenc_open_session
static av_cold int nvenc_open_session(AVCodecContext *avctx)
Definition: nvenc.c:401
HW_CONFIG_ENCODER_FRAMES
#define HW_CONFIG_ENCODER_FRAMES(format, device_type_)
Definition: hwconfig.h:98
AV_FRAME_DATA_CONTENT_LIGHT_LEVEL
@ AV_FRAME_DATA_CONTENT_LIGHT_LEVEL
Content light level (based on CTA-861.3).
Definition: frame.h:137
AV3DReferenceDisplay::right_view_id
uint16_t right_view_id
The ViewId of the left view of a stereo pair corresponding to the n-th reference display.
Definition: tdrdi.h:109
i
#define i(width, name, range_min, range_max)
Definition: cbs_h2645.c:256
AVPacket::pts
int64_t pts
Presentation timestamp in AVStream->time_base units; the time at which the decompressed packet will b...
Definition: packet.h:539
FAST
@ FAST
Definition: vf_guided.c:32
AVCodecContext::extradata
uint8_t * extradata
Out-of-band global headers that may be used by some codecs.
Definition: avcodec.h:514
process_output_surface
static int process_output_surface(AVCodecContext *avctx, AVPacket *pkt, NvencSurface *tmpoutsurf)
Definition: nvenc.c:2704
nvenc_load_libraries
static av_cold int nvenc_load_libraries(AVCodecContext *avctx)
Definition: nvenc.c:334
nvenc_recalc_surfaces
static av_cold int nvenc_recalc_surfaces(AVCodecContext *avctx)
Definition: nvenc.c:1031
AVD3D11VADeviceContext
This struct is allocated as AVHWDeviceContext.hwctx.
Definition: hwcontext_d3d11va.h:45
IS_RGB
#define IS_RGB(pix_fmt)
Definition: nvenc.c:106
AVCPBProperties::max_bitrate
int64_t max_bitrate
Maximum bitrate of the stream, in bits per second.
Definition: defs.h:284
AV_CODEC_ID_HEVC
@ AV_CODEC_ID_HEVC
Definition: codec_id.h:228
prepare_sei_data_array
static int prepare_sei_data_array(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2815
AV_FRAME_DATA_STEREO3D
@ AV_FRAME_DATA_STEREO3D
Stereoscopic 3d metadata.
Definition: frame.h:64
FFMIN
#define FFMIN(a, b)
Definition: macros.h:49
av_frame_unref
void av_frame_unref(AVFrame *frame)
Unreference all the buffers referenced by frame and reset the frame fields.
Definition: frame.c:494
AV_PIX_FMT_X2RGB10
#define AV_PIX_FMT_X2RGB10
Definition: pixfmt.h:596
av_mallocz
void * av_mallocz(size_t size)
Allocate a memory block with alignment suitable for all memory accesses (including vectors if availab...
Definition: mem.c:256
NVENC_ONE_PASS
@ NVENC_ONE_PASS
Definition: nvenc.h:194
AV3DReferenceDisplay::mantissa_ref_display_width
uint8_t mantissa_ref_display_width
The mantissa part of the reference display width of the n-th reference display.
Definition: tdrdi.h:119
AVCodecContext::hw_device_ctx
AVBufferRef * hw_device_ctx
A reference to the AVHWDeviceContext describing the device which will be used by a hardware encoder/d...
Definition: avcodec.h:1475
AVMasteringDisplayMetadata
Mastering display metadata capable of representing the color volume of the display used to master the...
Definition: mastering_display_metadata.h:38
IS_YUV444
#define IS_YUV444(pix_fmt)
Definition: nvenc.c:113
P2
#define P2
Definition: cavsdsp.c:36
IS_CBR
#define IS_CBR(rc)
Definition: nvenc.c:53
av_rescale
int64_t av_rescale(int64_t a, int64_t b, int64_t c)
Rescale a 64-bit integer with rounding to nearest.
Definition: mathematics.c:129
AVCodecContext::height
int height
Definition: avcodec.h:592
AVCodecContext::pix_fmt
enum AVPixelFormat pix_fmt
Pixel format, see AV_PIX_FMT_xxx.
Definition: avcodec.h:631
CHECK_CU
#define CHECK_CU(x)
Definition: nvenc.c:48
nvenc_map_buffer_format
static NV_ENC_BUFFER_FORMAT nvenc_map_buffer_format(enum AVPixelFormat pix_fmt)
Definition: nvenc.c:1980
av_calloc
void * av_calloc(size_t nmemb, size_t size)
Definition: mem.c:264
AV_PIX_FMT_P016
#define AV_PIX_FMT_P016
Definition: pixfmt.h:587
AVCodecContext::hw_frames_ctx
AVBufferRef * hw_frames_ctx
A reference to the AVHWFramesContext describing the input (for encoding) or output (decoding) frames.
Definition: avcodec.h:1453
NvencSurface::width
int width
Definition: nvenc.h:118
AV1_METADATA_TYPE_ITUT_T35
@ AV1_METADATA_TYPE_ITUT_T35
Definition: av1.h:47
AVHWFramesContext
This struct describes a set or pool of "hardware" frames (i.e.
Definition: hwcontext.h:116
AVCUDADeviceContext
This struct is allocated as AVHWDeviceContext.hwctx.
Definition: hwcontext_cuda.h:42
AV_PROFILE_H264_HIGH_444_PREDICTIVE
#define AV_PROFILE_H264_HIGH_444_PREDICTIVE
Definition: defs.h:122
ret
ret
Definition: filter_design.txt:187
AV_LOG_FATAL
#define AV_LOG_FATAL
Something went wrong and recovery is not possible.
Definition: log.h:204
AVHWDeviceContext::type
enum AVHWDeviceType type
This field identifies the underlying API used for hardware access.
Definition: hwcontext.h:73
nvenc_setup_encoder
static av_cold int nvenc_setup_encoder(AVCodecContext *avctx)
Definition: nvenc.c:1804
AV_PIX_FMT_NV12
@ AV_PIX_FMT_NV12
planar YUV 4:2:0, 12bpp, 1 plane for Y and 1 plane for the UV components, which are interleaved (firs...
Definition: pixfmt.h:96
FFSWAP
#define FFSWAP(type, a, b)
Definition: macros.h:52
frame
these buffered frames must be flushed immediately if a new input produces new the filter must not call request_frame to get more It must just process the frame or queue it The task of requesting more frames is left to the filter s request_frame method or the application If a filter has several the filter must be ready for frames arriving randomly on any input any filter with several inputs will most likely require some kind of queuing mechanism It is perfectly acceptable to have a limited queue and to drop frames when the inputs are too unbalanced request_frame For filters that do not use the this method is called when a frame is wanted on an output For a it should directly call filter_frame on the corresponding output For a if there are queued frames already one of these frames should be pushed If the filter should request a frame on one of its repeatedly until at least one frame has been pushed Return or at least make progress towards producing a frame
Definition: filter_design.txt:264
averr
int averr
Definition: nvenc.c:128
AV_PIX_FMT_0RGB32
#define AV_PIX_FMT_0RGB32
Definition: pixfmt.h:504
AVHWFramesContext::device_ctx
AVHWDeviceContext * device_ctx
The parent AVHWDeviceContext.
Definition: hwcontext.h:135
AVCPBProperties::buffer_size
int64_t buffer_size
The size of the buffer to which the ratecontrol is applied, in bits.
Definition: defs.h:300
cuda_check.h
atsc_a53.h
AVStereo3D::type
enum AVStereo3DType type
How views are packed within the video.
Definition: stereo3d.h:207
AV_PROFILE_H264_BASELINE
#define AV_PROFILE_H264_BASELINE
Definition: defs.h:110
AV3DReferenceDisplay::mantissa_ref_viewing_distance
uint8_t mantissa_ref_viewing_distance
The mantissa part of the reference viewing distance of the n-th reference display.
Definition: tdrdi.h:129
av_fifo_alloc2
AVFifo * av_fifo_alloc2(size_t nb_elems, size_t elem_size, unsigned int flags)
Allocate and initialize an AVFifo with a given element size.
Definition: fifo.c:47
AV_INPUT_BUFFER_PADDING_SIZE
#define AV_INPUT_BUFFER_PADDING_SIZE
Definition: defs.h:40
AV1_METADATA_TYPE_TIMECODE
@ AV1_METADATA_TYPE_TIMECODE
Definition: av1.h:48
AVCodecContext
main external API structure.
Definition: avcodec.h:431
AV_PROFILE_H264_HIGH
#define AV_PROFILE_H264_HIGH
Definition: defs.h:114
AV_PICTURE_TYPE_B
@ AV_PICTURE_TYPE_B
Bi-dir predicted.
Definition: avutil.h:280
ff_get_encode_buffer
int ff_get_encode_buffer(AVCodecContext *avctx, AVPacket *avpkt, int64_t size, int flags)
Get a buffer for a packet.
Definition: encode.c:106
NvencSurface::height
int height
Definition: nvenc.h:119
SEI_TYPE_USER_DATA_UNREGISTERED
@ SEI_TYPE_USER_DATA_UNREGISTERED
Definition: sei.h:35
av_image_copy2
static void av_image_copy2(uint8_t *const dst_data[4], const int dst_linesizes[4], uint8_t *const src_data[4], const int src_linesizes[4], enum AVPixelFormat pix_fmt, int width, int height)
Wrapper around av_image_copy() to workaround the limitation that the conversion from uint8_t * const ...
Definition: imgutils.h:184
AVCodecContext::qmin
int qmin
minimum quantizer
Definition: avcodec.h:1234
AVRational::den
int den
Denominator.
Definition: rational.h:60
AV_PIX_FMT_NONE
@ AV_PIX_FMT_NONE
Definition: pixfmt.h:72
AVCodecContext::profile
int profile
profile
Definition: avcodec.h:1618
nvenc_setup_surfaces
static av_cold int nvenc_setup_surfaces(AVCodecContext *avctx)
Definition: nvenc.c:2074
AV3DReferenceDisplay::additional_shift_present_flag
uint8_t additional_shift_present_flag
An array of flags to indicates that the information about additional horizontal shift of the left and...
Definition: tdrdi.h:135
AVCodecContext::i_quant_offset
float i_quant_offset
qscale offset between P and I-frames
Definition: avcodec.h:801
AVFrameSideData::type
enum AVFrameSideDataType type
Definition: frame.h:277
NvencSurface::output_surface
NV_ENC_OUTPUT_PTR output_surface
Definition: nvenc.h:122
AV_PROFILE_HEVC_MULTIVIEW_MAIN
#define AV_PROFILE_HEVC_MULTIVIEW_MAIN
Definition: defs.h:163
nvenc_find_free_reg_resource
static int nvenc_find_free_reg_resource(AVCodecContext *avctx)
Definition: nvenc.c:2332
nvenc_codec_specific_pic_params
static void nvenc_codec_specific_pic_params(AVCodecContext *avctx, const AVFrame *frame, NV_ENC_PIC_PARAMS *params, NV_ENC_SEI_PAYLOAD *sei_data, int sei_count)
Definition: nvenc.c:2527
AVMasteringDisplayMetadata::min_luminance
AVRational min_luminance
Min luminance of mastering display (cd/m^2).
Definition: mastering_display_metadata.h:52
AV_PIX_FMT_YUV444P
@ AV_PIX_FMT_YUV444P
planar YUV 4:4:4, 24bpp, (1 Cr & Cb sample per 1x1 Y samples)
Definition: pixfmt.h:78
P7
#define P7
Definition: filter_template.c:406
AV_PIX_FMT_P010
#define AV_PIX_FMT_P010
Definition: pixfmt.h:585
AVCodecInternal::draining
int draining
decoding: AVERROR_EOF has been returned from ff_decode_get_packet(); must not be used by decoders tha...
Definition: internal.h:139
AV_PIX_FMT_GBRP
@ AV_PIX_FMT_GBRP
planar GBR 4:4:4 24bpp
Definition: pixfmt.h:165
AV3DReferenceDisplaysInfo::num_ref_displays
uint8_t num_ref_displays
The number of reference displays that are signalled in this struct.
Definition: tdrdi.h:78
NvencDynLoadFunctions::nvenc_funcs
NV_ENCODE_API_FUNCTION_LIST nvenc_funcs
Definition: nvenc.h:139
AV_PICTURE_TYPE_P
@ AV_PICTURE_TYPE_P
Predicted.
Definition: avutil.h:279
mem.h
AVCodecContext::max_b_frames
int max_b_frames
maximum number of B-frames between non-B-frames Note: The output will be delayed by max_b_frames+1 re...
Definition: avcodec.h:769
ff_encode_get_frame
int ff_encode_get_frame(AVCodecContext *avctx, AVFrame *frame)
Called by encoders to get the next frame for encoding.
Definition: encode.c:205
packet_internal.h
AV3DReferenceDisplay::exponent_ref_viewing_distance
uint8_t exponent_ref_viewing_distance
Tthe exponent part of the reference viewing distance of the n-th reference display.
Definition: tdrdi.h:124
mastering_display_metadata.h
AVFrameSideData
Structure to hold side data for an AVFrame.
Definition: frame.h:276
AVPixFmtDescriptor
Descriptor that unambiguously describes how the bits of a pixel are stored in the up to 4 data planes...
Definition: pixdesc.h:69
P4
#define P4
Definition: filter_template.c:409
av_free
#define av_free(p)
Definition: tableprint_vlc.h:34
AVCodecContext::slices
int slices
Number of slices.
Definition: avcodec.h:1021
DEFAULT
#define DEFAULT
Definition: avdct.c:29
AVContentLightMetadata::MaxFALL
unsigned MaxFALL
Max average light level per frame (cd/m^2).
Definition: mastering_display_metadata.h:116
AVPacket
This structure stores compressed data.
Definition: packet.h:523
AVCodecContext::priv_data
void * priv_data
Definition: avcodec.h:458
av_freep
#define av_freep(p)
Definition: tableprint_vlc.h:35
AV_PICTURE_TYPE_BI
@ AV_PICTURE_TYPE_BI
BI type.
Definition: avutil.h:284
nvenc_setup_device
static av_cold int nvenc_setup_device(AVCodecContext *avctx)
Definition: nvenc.c:751
P5
#define P5
Definition: filter_template.c:408
av_frame_side_data_get
static const AVFrameSideData * av_frame_side_data_get(AVFrameSideData *const *sd, const int nb_sd, enum AVFrameSideDataType type)
Wrapper around av_frame_side_data_get_c() to workaround the limitation that for any type T the conver...
Definition: frame.h:1138
AVCodecContext::width
int width
picture width / height.
Definition: avcodec.h:592
imgutils.h
hwcontext.h
AVERROR_BUG
#define AVERROR_BUG
Internal bug, also see AVERROR_BUG2.
Definition: error.h:52
av_log
#define av_log(a,...)
Definition: tableprint_vlc.h:27
av_fifo_freep2
void av_fifo_freep2(AVFifo **f)
Free an AVFifo and reset pointer to NULL.
Definition: fifo.c:286
ff_side_data_set_encoder_stats
int ff_side_data_set_encoder_stats(AVPacket *pkt, int quality, int64_t *error, int error_count, int pict_type)
Definition: packet.c:611
AVERROR_EXIT
#define AVERROR_EXIT
Immediate exit was requested; the called function should not be restarted.
Definition: error.h:58
ff_encode_add_cpb_side_data
AVCPBProperties * ff_encode_add_cpb_side_data(AVCodecContext *avctx)
Add a CPB properties side data to an encoding context.
Definition: encode.c:880
AVStereo3D
Stereo 3D type: this structure describes how two videos are packed within a single video surface,...
Definition: stereo3d.h:203
nvenc_setup_codec_config
static av_cold int nvenc_setup_codec_config(AVCodecContext *avctx)
Definition: nvenc.c:1754
width
#define width
Definition: dsp.h:89
FF_QP2LAMBDA
#define FF_QP2LAMBDA
factor to convert from H.263 QP to lambda
Definition: avutil.h:226
AV3DReferenceDisplay::left_view_id
uint16_t left_view_id
The ViewId of the left view of a stereo pair corresponding to the n-th reference display.
Definition: tdrdi.h:104
AV_PROFILE_AV1_MAIN
#define AV_PROFILE_AV1_MAIN
Definition: defs.h:169
codec_desc.h
AVCodecContext::sample_aspect_ratio
AVRational sample_aspect_ratio
sample aspect ratio (0 if unknown) That is the width of a pixel divided by the height of the pixel.
Definition: avcodec.h:616
nvenc_setup_hevc_config
static av_cold int nvenc_setup_hevc_config(AVCodecContext *avctx)
Definition: nvenc.c:1444
RC_MODE_DEPRECATED
#define RC_MODE_DEPRECATED
Definition: nvenc.h:42
tdrdi.h
nvenc_send_frame
static int nvenc_send_frame(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:3091
av_get_pix_fmt_name
const char * av_get_pix_fmt_name(enum AVPixelFormat pix_fmt)
Return the short name for a pixel format, NULL in case pix_fmt is unknown.
Definition: pixdesc.c:3261
nvenc_retrieve_frame_data
static int nvenc_retrieve_frame_data(AVCodecContext *avctx, NV_ENC_LOCK_BITSTREAM *lock_params, AVPacket *pkt)
Definition: nvenc.c:2683