FFmpeg
nvenc.c
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1 /*
2  * H.264/HEVC/AV1 hardware encoding using nvidia nvenc
3  * Copyright (c) 2016 Timo Rothenpieler <timo@rothenpieler.org>
4  *
5  * This file is part of FFmpeg.
6  *
7  * FFmpeg is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU Lesser General Public
9  * License as published by the Free Software Foundation; either
10  * version 2.1 of the License, or (at your option) any later version.
11  *
12  * FFmpeg is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15  * Lesser General Public License for more details.
16  *
17  * You should have received a copy of the GNU Lesser General Public
18  * License along with FFmpeg; if not, write to the Free Software
19  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
20  */
21 
22 #include "config.h"
23 #include "config_components.h"
24 
25 #include "nvenc.h"
26 #include "hevc/sei.h"
27 #if CONFIG_AV1_NVENC_ENCODER
28 #include "av1.h"
29 #endif
30 
32 #include "libavutil/hwcontext.h"
33 #include "libavutil/cuda_check.h"
34 #include "libavutil/imgutils.h"
35 #include "libavutil/mem.h"
36 #include "libavutil/pixdesc.h"
38 #include "libavutil/mathematics.h"
40 #include "libavutil/stereo3d.h"
41 #include "libavutil/tdrdi.h"
42 #include "atsc_a53.h"
43 #include "codec_desc.h"
44 #include "encode.h"
45 #include "internal.h"
46 
47 #define CHECK_CU(x) FF_CUDA_CHECK_DL(avctx, dl_fn->cuda_dl, x)
48 
49 #define NVENC_CAP 0x30
50 
51 #ifndef NVENC_NO_DEPRECATED_RC
52 #define IS_CBR(rc) (rc == NV_ENC_PARAMS_RC_CBR || \
53  rc == NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ || \
54  rc == NV_ENC_PARAMS_RC_CBR_HQ)
55 #else
56 #define IS_CBR(rc) (rc == NV_ENC_PARAMS_RC_CBR)
57 #endif
58 
64  AV_PIX_FMT_P016, // Truncated to 10bits
65 #ifdef NVENC_HAVE_422_SUPPORT
69 #endif
71  AV_PIX_FMT_YUV444P16, // Truncated to 10bits
80  AV_PIX_FMT_GBRP16, // Truncated to 10bits
82 #if CONFIG_D3D11VA
84 #endif
86 };
87 
89  HW_CONFIG_ENCODER_FRAMES(CUDA, CUDA),
91 #if CONFIG_D3D11VA
92  HW_CONFIG_ENCODER_FRAMES(D3D11, D3D11VA),
94 #endif
95  NULL,
96 };
97 
98 #define IS_10BIT(pix_fmt) (pix_fmt == AV_PIX_FMT_P010 || \
99  pix_fmt == AV_PIX_FMT_P016 || \
100  pix_fmt == AV_PIX_FMT_P210 || \
101  pix_fmt == AV_PIX_FMT_P216 || \
102  pix_fmt == AV_PIX_FMT_YUV444P10MSB || \
103  pix_fmt == AV_PIX_FMT_YUV444P16 || \
104  pix_fmt == AV_PIX_FMT_X2RGB10 || \
105  pix_fmt == AV_PIX_FMT_X2BGR10 || \
106  pix_fmt == AV_PIX_FMT_GBRP10MSB || \
107  pix_fmt == AV_PIX_FMT_GBRP16)
108 
109 #define IS_RGB(pix_fmt) (pix_fmt == AV_PIX_FMT_0RGB32 || \
110  pix_fmt == AV_PIX_FMT_RGB32 || \
111  pix_fmt == AV_PIX_FMT_0BGR32 || \
112  pix_fmt == AV_PIX_FMT_BGR32 || \
113  pix_fmt == AV_PIX_FMT_X2RGB10 || \
114  pix_fmt == AV_PIX_FMT_X2BGR10)
115 
116 #define IS_YUV444(pix_fmt) (pix_fmt == AV_PIX_FMT_YUV444P || \
117  pix_fmt == AV_PIX_FMT_YUV444P10MSB || \
118  pix_fmt == AV_PIX_FMT_YUV444P16 || \
119  pix_fmt == AV_PIX_FMT_GBRP || \
120  pix_fmt == AV_PIX_FMT_GBRP10MSB || \
121  pix_fmt == AV_PIX_FMT_GBRP16 || \
122  (ctx->rgb_mode == NVENC_RGB_MODE_444 && IS_RGB(pix_fmt)))
123 
124 #define IS_YUV422(pix_fmt) (pix_fmt == AV_PIX_FMT_NV16 || \
125  pix_fmt == AV_PIX_FMT_P210 || \
126  pix_fmt == AV_PIX_FMT_P216)
127 
128 #define IS_GBRP(pix_fmt) (pix_fmt == AV_PIX_FMT_GBRP || \
129  pix_fmt == AV_PIX_FMT_GBRP10MSB || \
130  pix_fmt == AV_PIX_FMT_GBRP16)
131 
132 static const struct {
133  NVENCSTATUS nverr;
134  int averr;
135  const char *desc;
136 } nvenc_errors[] = {
137  { NV_ENC_SUCCESS, 0, "success" },
138  { NV_ENC_ERR_NO_ENCODE_DEVICE, AVERROR(ENOENT), "no encode device" },
139  { NV_ENC_ERR_UNSUPPORTED_DEVICE, AVERROR(ENOSYS), "unsupported device" },
140  { NV_ENC_ERR_INVALID_ENCODERDEVICE, AVERROR(EINVAL), "invalid encoder device" },
141  { NV_ENC_ERR_INVALID_DEVICE, AVERROR(EINVAL), "invalid device" },
142  { NV_ENC_ERR_DEVICE_NOT_EXIST, AVERROR(EIO), "device does not exist" },
143  { NV_ENC_ERR_INVALID_PTR, AVERROR(EFAULT), "invalid ptr" },
144  { NV_ENC_ERR_INVALID_EVENT, AVERROR(EINVAL), "invalid event" },
145  { NV_ENC_ERR_INVALID_PARAM, AVERROR(EINVAL), "invalid param" },
146  { NV_ENC_ERR_INVALID_CALL, AVERROR(EINVAL), "invalid call" },
147  { NV_ENC_ERR_OUT_OF_MEMORY, AVERROR(ENOMEM), "out of memory" },
148  { NV_ENC_ERR_ENCODER_NOT_INITIALIZED, AVERROR(EINVAL), "encoder not initialized" },
149  { NV_ENC_ERR_UNSUPPORTED_PARAM, AVERROR(ENOSYS), "unsupported param" },
150  { NV_ENC_ERR_LOCK_BUSY, AVERROR(EAGAIN), "lock busy" },
151  { NV_ENC_ERR_NOT_ENOUGH_BUFFER, AVERROR_BUFFER_TOO_SMALL, "not enough buffer"},
152  { NV_ENC_ERR_INVALID_VERSION, AVERROR(EINVAL), "invalid version" },
153  { NV_ENC_ERR_MAP_FAILED, AVERROR(EIO), "map failed" },
154  { NV_ENC_ERR_NEED_MORE_INPUT, AVERROR(EAGAIN), "need more input" },
155  { NV_ENC_ERR_ENCODER_BUSY, AVERROR(EAGAIN), "encoder busy" },
156  { NV_ENC_ERR_EVENT_NOT_REGISTERD, AVERROR(EBADF), "event not registered" },
157  { NV_ENC_ERR_GENERIC, AVERROR_UNKNOWN, "generic error" },
158  { NV_ENC_ERR_INCOMPATIBLE_CLIENT_KEY, AVERROR(EINVAL), "incompatible client key" },
159  { NV_ENC_ERR_UNIMPLEMENTED, AVERROR(ENOSYS), "unimplemented" },
160  { NV_ENC_ERR_RESOURCE_REGISTER_FAILED, AVERROR(EIO), "resource register failed" },
161  { NV_ENC_ERR_RESOURCE_NOT_REGISTERED, AVERROR(EBADF), "resource not registered" },
162  { NV_ENC_ERR_RESOURCE_NOT_MAPPED, AVERROR(EBADF), "resource not mapped" },
163 };
164 
165 static int nvenc_map_error(NVENCSTATUS err, const char **desc)
166 {
167  int i;
168  for (i = 0; i < FF_ARRAY_ELEMS(nvenc_errors); i++) {
169  if (nvenc_errors[i].nverr == err) {
170  if (desc)
171  *desc = nvenc_errors[i].desc;
172  return nvenc_errors[i].averr;
173  }
174  }
175  if (desc)
176  *desc = "unknown error";
177  return AVERROR_UNKNOWN;
178 }
179 
180 static int nvenc_print_error(AVCodecContext *avctx, NVENCSTATUS err,
181  const char *error_string)
182 {
183  const char *desc;
184  const char *details = "(no details)";
185  int ret = nvenc_map_error(err, &desc);
186 
187 #ifdef NVENC_HAVE_GETLASTERRORSTRING
188  NvencContext *ctx = avctx->priv_data;
189  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
190 
191  if (p_nvenc && ctx->nvencoder)
192  details = p_nvenc->nvEncGetLastErrorString(ctx->nvencoder);
193 #endif
194 
195  av_log(avctx, AV_LOG_ERROR, "%s: %s (%d): %s\n", error_string, desc, err, details);
196 
197  return ret;
198 }
199 
200 typedef struct GUIDTuple {
201  const GUID guid;
202  int flags;
203 } GUIDTuple;
204 
205 #define PRESET_ALIAS(alias, name, ...) \
206  [PRESET_ ## alias] = { NV_ENC_PRESET_ ## name ## _GUID, __VA_ARGS__ }
207 
208 #define PRESET(name, ...) PRESET_ALIAS(name, name, __VA_ARGS__)
209 
211 {
212  GUIDTuple presets[] = {
213 #ifdef NVENC_HAVE_NEW_PRESETS
214  PRESET(P1),
215  PRESET(P2),
216  PRESET(P3),
217  PRESET(P4),
218  PRESET(P5),
219  PRESET(P6),
220  PRESET(P7),
222  PRESET_ALIAS(MEDIUM, P4, NVENC_ONE_PASS),
224  // Compat aliases
229  PRESET_ALIAS(LOW_LATENCY_DEFAULT, P4, NVENC_DEPRECATED_PRESET | NVENC_LOWLATENCY),
234 #else
235  PRESET(DEFAULT),
236  PRESET(HP),
237  PRESET(HQ),
238  PRESET(BD),
239  PRESET_ALIAS(SLOW, HQ, NVENC_TWO_PASSES),
240  PRESET_ALIAS(MEDIUM, HQ, NVENC_ONE_PASS),
242  PRESET(LOW_LATENCY_DEFAULT, NVENC_LOWLATENCY),
243  PRESET(LOW_LATENCY_HP, NVENC_LOWLATENCY),
244  PRESET(LOW_LATENCY_HQ, NVENC_LOWLATENCY),
245  PRESET(LOSSLESS_DEFAULT, NVENC_LOSSLESS),
246  PRESET(LOSSLESS_HP, NVENC_LOSSLESS),
247 #endif
248  };
249 
250  GUIDTuple *t = &presets[ctx->preset];
251 
252  ctx->init_encode_params.presetGUID = t->guid;
253  ctx->flags = t->flags;
254 
255 #ifdef NVENC_HAVE_NEW_PRESETS
256  if (ctx->tuning_info == NV_ENC_TUNING_INFO_LOSSLESS)
258 #endif
259 }
260 
261 #undef PRESET
262 #undef PRESET_ALIAS
263 
265 {
266 #if NVENCAPI_CHECK_VERSION(13, 1)
267  const char *minver = "(unknown)";
268 #elif NVENCAPI_CHECK_VERSION(13, 0)
269  const char *minver = "570.0";
270 #elif NVENCAPI_CHECK_VERSION(12, 2)
271 # if defined(_WIN32) || defined(__CYGWIN__)
272  const char *minver = "551.76";
273 # else
274  const char *minver = "550.54.14";
275 # endif
276 #elif NVENCAPI_CHECK_VERSION(12, 1)
277 # if defined(_WIN32) || defined(__CYGWIN__)
278  const char *minver = "531.61";
279 # else
280  const char *minver = "530.41.03";
281 # endif
282 #elif NVENCAPI_CHECK_VERSION(12, 0)
283 # if defined(_WIN32) || defined(__CYGWIN__)
284  const char *minver = "522.25";
285 # else
286  const char *minver = "520.56.06";
287 # endif
288 #elif NVENCAPI_CHECK_VERSION(11, 1)
289 # if defined(_WIN32) || defined(__CYGWIN__)
290  const char *minver = "471.41";
291 # else
292  const char *minver = "470.57.02";
293 # endif
294 #elif NVENCAPI_CHECK_VERSION(11, 0)
295 # if defined(_WIN32) || defined(__CYGWIN__)
296  const char *minver = "456.71";
297 # else
298  const char *minver = "455.28";
299 # endif
300 #elif NVENCAPI_CHECK_VERSION(10, 0)
301 # if defined(_WIN32) || defined(__CYGWIN__)
302  const char *minver = "450.51";
303 # else
304  const char *minver = "445.87";
305 # endif
306 #elif NVENCAPI_CHECK_VERSION(9, 1)
307 # if defined(_WIN32) || defined(__CYGWIN__)
308  const char *minver = "436.15";
309 # else
310  const char *minver = "435.21";
311 # endif
312 #elif NVENCAPI_CHECK_VERSION(9, 0)
313 # if defined(_WIN32) || defined(__CYGWIN__)
314  const char *minver = "418.81";
315 # else
316  const char *minver = "418.30";
317 # endif
318 #elif NVENCAPI_CHECK_VERSION(8, 2)
319 # if defined(_WIN32) || defined(__CYGWIN__)
320  const char *minver = "397.93";
321 # else
322  const char *minver = "396.24";
323 #endif
324 #elif NVENCAPI_CHECK_VERSION(8, 1)
325 # if defined(_WIN32) || defined(__CYGWIN__)
326  const char *minver = "390.77";
327 # else
328  const char *minver = "390.25";
329 # endif
330 #else
331 # if defined(_WIN32) || defined(__CYGWIN__)
332  const char *minver = "378.66";
333 # else
334  const char *minver = "378.13";
335 # endif
336 #endif
337  av_log(avctx, level, "The minimum required Nvidia driver for nvenc is %s or newer\n", minver);
338 }
339 
340 #if NVENCAPI_CHECK_VERSION(12, 0)
341 #define to_nv_color_matrix(n) (NV_ENC_VUI_MATRIX_COEFFS)(n)
342 #define to_nv_color_pri(n) (NV_ENC_VUI_COLOR_PRIMARIES)(n)
343 #define to_nv_color_trc(n) (NV_ENC_VUI_TRANSFER_CHARACTERISTIC)(n)
344 #else
345 #define to_nv_color_matrix(n) (uint32_t)(n)
346 #define to_nv_color_pri(n) (uint32_t)(n)
347 #define to_nv_color_trc(n) (uint32_t)(n)
348 #endif
349 
351 {
352  NvencContext *ctx = avctx->priv_data;
353  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
354  NVENCSTATUS err;
355  uint32_t nvenc_max_ver;
356  int ret;
357 
358  ret = cuda_load_functions(&dl_fn->cuda_dl, avctx);
359  if (ret < 0)
360  return ret;
361 
362  ret = nvenc_load_functions(&dl_fn->nvenc_dl, avctx);
363  if (ret < 0) {
365  return ret;
366  }
367 
368  err = dl_fn->nvenc_dl->NvEncodeAPIGetMaxSupportedVersion(&nvenc_max_ver);
369  if (err != NV_ENC_SUCCESS)
370  return nvenc_print_error(avctx, err, "Failed to query nvenc max version");
371 
372  av_log(avctx, AV_LOG_VERBOSE, "Loaded Nvenc version %d.%d\n", nvenc_max_ver >> 4, nvenc_max_ver & 0xf);
373 
374  if ((NVENCAPI_MAJOR_VERSION << 4 | NVENCAPI_MINOR_VERSION) > nvenc_max_ver) {
375  av_log(avctx, AV_LOG_ERROR, "Driver does not support the required nvenc API version. "
376  "Required: %d.%d Found: %d.%d\n",
377  NVENCAPI_MAJOR_VERSION, NVENCAPI_MINOR_VERSION,
378  nvenc_max_ver >> 4, nvenc_max_ver & 0xf);
380  return AVERROR(ENOSYS);
381  }
382 
383  dl_fn->nvenc_funcs.version = NV_ENCODE_API_FUNCTION_LIST_VER;
384 
385  err = dl_fn->nvenc_dl->NvEncodeAPICreateInstance(&dl_fn->nvenc_funcs);
386  if (err != NV_ENC_SUCCESS)
387  return nvenc_print_error(avctx, err, "Failed to create nvenc instance");
388 
389  av_log(avctx, AV_LOG_VERBOSE, "Nvenc initialized successfully\n");
390 
391  return 0;
392 }
393 
395 {
396  NvencContext *ctx = avctx->priv_data;
397  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
398 
399  if (ctx->d3d11_device)
400  return 0;
401 
402  return CHECK_CU(dl_fn->cuda_dl->cuCtxPushCurrent(ctx->cu_context));
403 }
404 
406 {
407  NvencContext *ctx = avctx->priv_data;
408  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
409  CUcontext dummy;
410 
411  if (ctx->d3d11_device)
412  return 0;
413 
414  return CHECK_CU(dl_fn->cuda_dl->cuCtxPopCurrent(&dummy));
415 }
416 
418 {
419  NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS params = { 0 };
420  NvencContext *ctx = avctx->priv_data;
421  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
422  NVENCSTATUS ret;
423 
424  params.version = NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS_VER;
425  params.apiVersion = NVENCAPI_VERSION;
426  if (ctx->d3d11_device) {
427  params.device = ctx->d3d11_device;
428  params.deviceType = NV_ENC_DEVICE_TYPE_DIRECTX;
429  } else {
430  params.device = ctx->cu_context;
431  params.deviceType = NV_ENC_DEVICE_TYPE_CUDA;
432  }
433 
434  ret = p_nvenc->nvEncOpenEncodeSessionEx(&params, &ctx->nvencoder);
435  if (ret != NV_ENC_SUCCESS) {
436  ctx->nvencoder = NULL;
437  return nvenc_print_error(avctx, ret, "OpenEncodeSessionEx failed");
438  }
439 
440  return 0;
441 }
442 
444 {
445  NvencContext *ctx = avctx->priv_data;
446  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
447  int i, ret, count = 0;
448  GUID *guids = NULL;
449 
450  ret = p_nvenc->nvEncGetEncodeGUIDCount(ctx->nvencoder, &count);
451 
452  if (ret != NV_ENC_SUCCESS || !count)
453  return AVERROR(ENOSYS);
454 
455  guids = av_malloc(count * sizeof(GUID));
456  if (!guids)
457  return AVERROR(ENOMEM);
458 
459  ret = p_nvenc->nvEncGetEncodeGUIDs(ctx->nvencoder, guids, count, &count);
460  if (ret != NV_ENC_SUCCESS) {
461  ret = AVERROR(ENOSYS);
462  goto fail;
463  }
464 
465  ret = AVERROR(ENOSYS);
466  for (i = 0; i < count; i++) {
467  if (!memcmp(&guids[i], &ctx->init_encode_params.encodeGUID, sizeof(*guids))) {
468  ret = 0;
469  break;
470  }
471  }
472 
473 fail:
474  av_free(guids);
475 
476  return ret;
477 }
478 
479 static int nvenc_check_cap(AVCodecContext *avctx, NV_ENC_CAPS cap)
480 {
481  NvencContext *ctx = avctx->priv_data;
482  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
483  NV_ENC_CAPS_PARAM params = { 0 };
484  int ret, val = 0;
485 
486  params.version = NV_ENC_CAPS_PARAM_VER;
487  params.capsToQuery = cap;
488 
489  ret = p_nvenc->nvEncGetEncodeCaps(ctx->nvencoder, ctx->init_encode_params.encodeGUID, &params, &val);
490 
491  if (ret == NV_ENC_SUCCESS)
492  return val;
493  return 0;
494 }
495 
497 {
498  NvencContext *ctx = avctx->priv_data;
499  int tmp, ret;
500 
502  if (ret < 0) {
503  av_log(avctx, AV_LOG_WARNING, "Codec not supported\n");
504  return ret;
505  }
506 
507  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_YUV444_ENCODE);
508  if (IS_YUV444(ctx->data_pix_fmt) && ret <= 0) {
509  av_log(avctx, AV_LOG_WARNING, "YUV444P not supported\n");
510  return AVERROR(ENOSYS);
511  }
512 
513 #ifdef NVENC_HAVE_422_SUPPORT
514  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_YUV422_ENCODE);
515 #else
516  ret = 0;
517 #endif
518  if (IS_YUV422(ctx->data_pix_fmt) && ret <= 0) {
519  av_log(avctx, AV_LOG_WARNING, "YUV422P not supported\n");
520  return AVERROR(ENOSYS);
521  }
522 
523  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOSSLESS_ENCODE);
524  if (ctx->flags & NVENC_LOSSLESS && ret <= 0) {
525  av_log(avctx, AV_LOG_WARNING, "Lossless encoding not supported\n");
526  return AVERROR(ENOSYS);
527  }
528 
529  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_WIDTH_MAX);
530  if (ret < avctx->width) {
531  av_log(avctx, AV_LOG_WARNING, "Width %d exceeds %d\n",
532  avctx->width, ret);
533  return AVERROR(ENOSYS);
534  }
535 
536  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_HEIGHT_MAX);
537  if (ret < avctx->height) {
538  av_log(avctx, AV_LOG_WARNING, "Height %d exceeds %d\n",
539  avctx->height, ret);
540  return AVERROR(ENOSYS);
541  }
542 
543  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_NUM_MAX_BFRAMES);
544  if (ret < avctx->max_b_frames) {
545  av_log(avctx, AV_LOG_WARNING, "Max B-frames %d exceed %d\n",
546  avctx->max_b_frames, ret);
547 
548  return AVERROR(ENOSYS);
549  }
550 
551  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_FIELD_ENCODING);
552  if (ret < 1 && avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
553  av_log(avctx, AV_LOG_WARNING,
554  "Interlaced encoding is not supported. Supported level: %d\n",
555  ret);
556  return AVERROR(ENOSYS);
557  }
558 
559  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_10BIT_ENCODE);
560  if ((IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) && ret <= 0) {
561  av_log(avctx, AV_LOG_WARNING, "10 bit encode not supported\n");
562  return AVERROR(ENOSYS);
563  }
564 
565  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOOKAHEAD);
566  if (ctx->rc_lookahead > 0 && ret <= 0) {
567  av_log(avctx, AV_LOG_WARNING, "RC lookahead not supported\n");
568  return AVERROR(ENOSYS);
569  }
570 
571  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_TEMPORAL_AQ);
572  if (ctx->temporal_aq > 0 && ret <= 0) {
573  av_log(avctx, AV_LOG_WARNING, "Temporal AQ not supported\n");
574  return AVERROR(ENOSYS);
575  }
576 
577  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_WEIGHTED_PREDICTION);
578  if (ctx->weighted_pred > 0 && ret <= 0) {
579  av_log (avctx, AV_LOG_WARNING, "Weighted Prediction not supported\n");
580  return AVERROR(ENOSYS);
581  }
582 
583  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_CABAC);
584  if (ctx->coder == NV_ENC_H264_ENTROPY_CODING_MODE_CABAC && ret <= 0) {
585  av_log(avctx, AV_LOG_WARNING, "CABAC entropy coding not supported\n");
586  return AVERROR(ENOSYS);
587  }
588 
589 #ifdef NVENC_HAVE_BFRAME_REF_MODE
590  tmp = (ctx->b_ref_mode >= 0) ? ctx->b_ref_mode : NV_ENC_BFRAME_REF_MODE_DISABLED;
591  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_BFRAME_REF_MODE);
592  if (tmp == NV_ENC_BFRAME_REF_MODE_EACH && ret != 1 && ret != 3) {
593  av_log(avctx, AV_LOG_WARNING, "Each B frame as reference is not supported\n");
594  return AVERROR(ENOSYS);
595  } else if (tmp != NV_ENC_BFRAME_REF_MODE_DISABLED && ret == 0) {
596  av_log(avctx, AV_LOG_WARNING, "B frames as references are not supported\n");
597  return AVERROR(ENOSYS);
598  }
599 #else
600  tmp = (ctx->b_ref_mode >= 0) ? ctx->b_ref_mode : 0;
601  if (tmp > 0) {
602  av_log(avctx, AV_LOG_WARNING, "B frames as references need SDK 8.1 at build time\n");
603  return AVERROR(ENOSYS);
604  }
605 #endif
606 
607 #ifdef NVENC_HAVE_MULTIPLE_REF_FRAMES
608  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_MULTIPLE_REF_FRAMES);
609  if(avctx->refs != NV_ENC_NUM_REF_FRAMES_AUTOSELECT && ret <= 0) {
610  av_log(avctx, AV_LOG_WARNING, "Multiple reference frames are not supported by the device\n");
611  return AVERROR(ENOSYS);
612  }
613 #else
614  if(avctx->refs != 0) {
615  av_log(avctx, AV_LOG_WARNING, "Multiple reference frames need SDK 9.1 at build time\n");
616  return AVERROR(ENOSYS);
617  }
618 #endif
619 
620 #ifdef NVENC_HAVE_SINGLE_SLICE_INTRA_REFRESH
621  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SINGLE_SLICE_INTRA_REFRESH);
622  if(ctx->single_slice_intra_refresh && ret <= 0) {
623  av_log(avctx, AV_LOG_WARNING, "Single slice intra refresh not supported by the device\n");
624  return AVERROR(ENOSYS);
625  }
626 #else
627  if(ctx->single_slice_intra_refresh) {
628  av_log(avctx, AV_LOG_WARNING, "Single slice intra refresh needs SDK 11.1 at build time\n");
629  return AVERROR(ENOSYS);
630  }
631 #endif
632 
633  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_INTRA_REFRESH);
634  if((ctx->intra_refresh || ctx->single_slice_intra_refresh) && ret <= 0) {
635  av_log(avctx, AV_LOG_WARNING, "Intra refresh not supported by the device\n");
636  return AVERROR(ENOSYS);
637  }
638 
639 #ifndef NVENC_HAVE_HEVC_CONSTRAINED_ENCODING
640  if (ctx->constrained_encoding && avctx->codec->id == AV_CODEC_ID_HEVC) {
641  av_log(avctx, AV_LOG_WARNING, "HEVC constrained encoding needs SDK 10.0 at build time\n");
642  return AVERROR(ENOSYS);
643  }
644 #endif
645 
646  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_CONSTRAINED_ENCODING);
647  if(ctx->constrained_encoding && ret <= 0) {
648  av_log(avctx, AV_LOG_WARNING, "Constrained encoding not supported by the device\n");
649  return AVERROR(ENOSYS);
650  }
651 
652 #if defined(NVENC_HAVE_TEMPORAL_FILTER) || defined(NVENC_HAVE_H264_AND_AV1_TEMPORAL_FILTER)
653  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_TEMPORAL_FILTER);
654  if(ctx->tf_level > 0 && ret <= 0) {
655  av_log(avctx, AV_LOG_WARNING, "Temporal filtering not supported by the device\n");
656  return AVERROR(ENOSYS);
657  }
658 #endif
659 
660 #ifdef NVENC_HAVE_LOOKAHEAD_LEVEL
661  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOOKAHEAD_LEVEL);
662  if(ctx->rc_lookahead > 0 && ctx->lookahead_level > 0 &&
663  ctx->lookahead_level != NV_ENC_LOOKAHEAD_LEVEL_AUTOSELECT &&
664  ctx->lookahead_level > ret)
665  {
666  av_log(avctx, AV_LOG_WARNING, "Lookahead level not supported. Maximum level: %d\n", ret);
667  return AVERROR(ENOSYS);
668  }
669 #endif
670 
671 #ifdef NVENC_HAVE_UNIDIR_B
672  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_UNIDIRECTIONAL_B);
673  if(ctx->unidir_b && ret <= 0) {
674  av_log(avctx, AV_LOG_WARNING, "Unidirectional B-Frames not supported by the device\n");
675  return AVERROR(ENOSYS);
676  }
677 #endif
678 
679  ctx->support_dyn_bitrate = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_DYN_BITRATE_CHANGE);
680 
681 #ifdef NVENC_HAVE_MVHEVC
682  ctx->multiview_supported = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_MVHEVC_ENCODE) > 0;
683  if(ctx->profile == NV_ENC_HEVC_PROFILE_MULTIVIEW_MAIN && !ctx->multiview_supported) {
684  av_log(avctx, AV_LOG_WARNING, "Multiview not supported by the device\n");
685  return AVERROR(ENOSYS);
686  }
687 #endif
688 
689  return 0;
690 }
691 
692 static av_cold int nvenc_check_device(AVCodecContext *avctx, int idx)
693 {
694  NvencContext *ctx = avctx->priv_data;
695  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
696  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
697  char name[128] = { 0};
698  int major, minor, ret;
699  CUdevice cu_device;
700  int loglevel = AV_LOG_VERBOSE;
701 
702  if (ctx->device == LIST_DEVICES)
703  loglevel = AV_LOG_INFO;
704 
705  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceGet(&cu_device, idx));
706  if (ret < 0)
707  return ret;
708 
709  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceGetName(name, sizeof(name), cu_device));
710  if (ret < 0)
711  return ret;
712 
713  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceComputeCapability(&major, &minor, cu_device));
714  if (ret < 0)
715  return ret;
716 
717  av_log(avctx, loglevel, "[ GPU #%d - < %s > has Compute SM %d.%d ]\n", idx, name, major, minor);
718  if (((major << 4) | minor) < NVENC_CAP) {
719  av_log(avctx, loglevel, "does not support NVENC\n");
720  goto fail;
721  }
722 
723  if (ctx->device != idx && ctx->device != ANY_DEVICE)
724  return -1;
725 
726  ret = CHECK_CU(dl_fn->cuda_dl->cuCtxCreate(&ctx->cu_context_internal, 0, cu_device));
727  if (ret < 0)
728  goto fail;
729 
730  ctx->cu_context = ctx->cu_context_internal;
731  ctx->cu_stream = NULL;
732 
733  if ((ret = nvenc_pop_context(avctx)) < 0)
734  goto fail2;
735 
736  if ((ret = nvenc_open_session(avctx)) < 0)
737  goto fail2;
738 
739  if ((ret = nvenc_check_capabilities(avctx)) < 0)
740  goto fail3;
741 
742  av_log(avctx, loglevel, "supports NVENC\n");
743 
744  dl_fn->nvenc_device_count++;
745 
746  if (ctx->device == idx || ctx->device == ANY_DEVICE)
747  return 0;
748 
749 fail3:
750  if ((ret = nvenc_push_context(avctx)) < 0)
751  return ret;
752 
753  p_nvenc->nvEncDestroyEncoder(ctx->nvencoder);
754  ctx->nvencoder = NULL;
755 
756  if ((ret = nvenc_pop_context(avctx)) < 0)
757  return ret;
758 
759 fail2:
760  CHECK_CU(dl_fn->cuda_dl->cuCtxDestroy(ctx->cu_context_internal));
761  ctx->cu_context_internal = NULL;
762 
763 fail:
764  return AVERROR(ENOSYS);
765 }
766 
768 {
769  NvencContext *ctx = avctx->priv_data;
770  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
771 
772  switch (avctx->codec->id) {
773  case AV_CODEC_ID_H264:
774  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_H264_GUID;
775  break;
776  case AV_CODEC_ID_HEVC:
777  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_HEVC_GUID;
778  break;
779 #if CONFIG_AV1_NVENC_ENCODER
780  case AV_CODEC_ID_AV1:
781  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_AV1_GUID;
782  break;
783 #endif
784  default:
785  return AVERROR_BUG;
786  }
787 
789 
791  av_log(avctx, AV_LOG_WARNING, "The selected preset is deprecated. Use p1 to p7 + -tune or fast/medium/slow.\n");
792 
793  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11 || avctx->hw_frames_ctx || avctx->hw_device_ctx) {
794  AVHWFramesContext *frames_ctx;
795  AVHWDeviceContext *hwdev_ctx;
796  AVCUDADeviceContext *cuda_device_hwctx = NULL;
797 #if CONFIG_D3D11VA
798  AVD3D11VADeviceContext *d3d11_device_hwctx = NULL;
799 #endif
800  int ret;
801 
802  if (avctx->hw_frames_ctx) {
803  frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
804  if (frames_ctx->format == AV_PIX_FMT_CUDA)
805  cuda_device_hwctx = frames_ctx->device_ctx->hwctx;
806 #if CONFIG_D3D11VA
807  else if (frames_ctx->format == AV_PIX_FMT_D3D11)
808  d3d11_device_hwctx = frames_ctx->device_ctx->hwctx;
809 #endif
810  else
811  return AVERROR(EINVAL);
812  } else if (avctx->hw_device_ctx) {
813  hwdev_ctx = (AVHWDeviceContext*)avctx->hw_device_ctx->data;
814  if (hwdev_ctx->type == AV_HWDEVICE_TYPE_CUDA)
815  cuda_device_hwctx = hwdev_ctx->hwctx;
816 #if CONFIG_D3D11VA
817  else if (hwdev_ctx->type == AV_HWDEVICE_TYPE_D3D11VA)
818  d3d11_device_hwctx = hwdev_ctx->hwctx;
819 #endif
820  else
821  return AVERROR(EINVAL);
822  } else {
823  return AVERROR(EINVAL);
824  }
825 
826  if (cuda_device_hwctx) {
827  ctx->cu_context = cuda_device_hwctx->cuda_ctx;
828  ctx->cu_stream = cuda_device_hwctx->stream;
829  }
830 #if CONFIG_D3D11VA
831  else if (d3d11_device_hwctx) {
832  ctx->d3d11_device = d3d11_device_hwctx->device;
833  ID3D11Device_AddRef(ctx->d3d11_device);
834  }
835 #endif
836 
837  ret = nvenc_open_session(avctx);
838  if (ret < 0)
839  return ret;
840 
841  ret = nvenc_check_capabilities(avctx);
842  if (ret < 0) {
843  av_log(avctx, AV_LOG_FATAL, "Provided device doesn't support required NVENC features\n");
844  return ret;
845  }
846  } else {
847  int i, nb_devices = 0;
848 
849  if (CHECK_CU(dl_fn->cuda_dl->cuInit(0)) < 0)
850  return AVERROR_UNKNOWN;
851 
852  if (CHECK_CU(dl_fn->cuda_dl->cuDeviceGetCount(&nb_devices)) < 0)
853  return AVERROR_UNKNOWN;
854 
855  if (!nb_devices) {
856  av_log(avctx, AV_LOG_FATAL, "No CUDA capable devices found\n");
857  return AVERROR_EXTERNAL;
858  }
859 
860  av_log(avctx, AV_LOG_VERBOSE, "%d CUDA capable devices found\n", nb_devices);
861 
862  dl_fn->nvenc_device_count = 0;
863  for (i = 0; i < nb_devices; ++i) {
864  if ((nvenc_check_device(avctx, i)) >= 0 && ctx->device != LIST_DEVICES)
865  return 0;
866  }
867 
868  if (ctx->device == LIST_DEVICES)
869  return AVERROR_EXIT;
870 
871  if (!dl_fn->nvenc_device_count) {
872  av_log(avctx, AV_LOG_FATAL, "No capable devices found\n");
873  return AVERROR_EXTERNAL;
874  }
875 
876  av_log(avctx, AV_LOG_FATAL, "Requested GPU %d, but only %d GPUs are available!\n", ctx->device, nb_devices);
877  return AVERROR(EINVAL);
878  }
879 
880  return 0;
881 }
882 
883 static av_cold void set_constqp(AVCodecContext *avctx)
884 {
885  NvencContext *ctx = avctx->priv_data;
886  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
887 #if CONFIG_AV1_NVENC_ENCODER
888  int qmax = avctx->codec->id == AV_CODEC_ID_AV1 ? 255 : 51;
889 #else
890  int qmax = 51;
891 #endif
892 
893  rc->rateControlMode = NV_ENC_PARAMS_RC_CONSTQP;
894 
895  if (ctx->init_qp_p >= 0) {
896  rc->constQP.qpInterP = ctx->init_qp_p;
897  if (ctx->init_qp_i >= 0 && ctx->init_qp_b >= 0) {
898  rc->constQP.qpIntra = ctx->init_qp_i;
899  rc->constQP.qpInterB = ctx->init_qp_b;
900  } else if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
901  rc->constQP.qpIntra = av_clip(
902  rc->constQP.qpInterP * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, qmax);
903  rc->constQP.qpInterB = av_clip(
904  rc->constQP.qpInterP * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, qmax);
905  } else {
906  rc->constQP.qpIntra = rc->constQP.qpInterP;
907  rc->constQP.qpInterB = rc->constQP.qpInterP;
908  }
909  } else if (ctx->cqp >= 0) {
910  rc->constQP.qpInterP = rc->constQP.qpInterB = rc->constQP.qpIntra = ctx->cqp;
911  if (avctx->b_quant_factor != 0.0)
912  rc->constQP.qpInterB = av_clip(ctx->cqp * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, qmax);
913  if (avctx->i_quant_factor != 0.0)
914  rc->constQP.qpIntra = av_clip(ctx->cqp * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, qmax);
915  }
916 
917  avctx->qmin = ctx->qmin = -1;
918  avctx->qmax = ctx->qmax = -1;
919 }
920 
921 static av_cold void set_vbr(AVCodecContext *avctx)
922 {
923  NvencContext *ctx = avctx->priv_data;
924  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
925  int qp_inter_p;
926 #if CONFIG_AV1_NVENC_ENCODER
927  int qmax = avctx->codec->id == AV_CODEC_ID_AV1 ? 255 : 51;
928 #else
929  int qmax = 51;
930 #endif
931 
932  if (avctx->qmin >= 0 || avctx->qmax >= 0)
933  av_log(avctx, AV_LOG_WARNING, "Passing qmin/qmax via global AVCodecContext options. Use encoder options instead.\n");
934 
935  if (avctx->qmin >= 0 && ctx->qmin < 0)
936  ctx->qmin = avctx->qmin;
937  if (avctx->qmax >= 0 && ctx->qmax < 0)
938  ctx->qmax = avctx->qmax;
939  avctx->qmin = ctx->qmin;
940  avctx->qmax = ctx->qmax;
941 
942  if (ctx->qmin >= 0 && ctx->qmax >= 0) {
943  rc->enableMinQP = 1;
944  rc->enableMaxQP = 1;
945 
946  rc->minQP.qpInterB = ctx->qmin;
947  rc->minQP.qpInterP = ctx->qmin;
948  rc->minQP.qpIntra = ctx->qmin;
949 
950  rc->maxQP.qpInterB = ctx->qmax;
951  rc->maxQP.qpInterP = ctx->qmax;
952  rc->maxQP.qpIntra = ctx->qmax;
953 
954  qp_inter_p = (ctx->qmax + 3 * ctx->qmin) / 4; // biased towards Qmin
955  } else if (ctx->qmin >= 0) {
956  rc->enableMinQP = 1;
957 
958  rc->minQP.qpInterB = ctx->qmin;
959  rc->minQP.qpInterP = ctx->qmin;
960  rc->minQP.qpIntra = ctx->qmin;
961 
962  qp_inter_p = ctx->qmin;
963  } else {
964  qp_inter_p = 26; // default to 26
965  }
966 
967  rc->enableInitialRCQP = 1;
968 
969  if (ctx->init_qp_p < 0) {
970  rc->initialRCQP.qpInterP = qp_inter_p;
971  } else {
972  rc->initialRCQP.qpInterP = ctx->init_qp_p;
973  }
974 
975  if (ctx->init_qp_i < 0) {
976  if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
977  rc->initialRCQP.qpIntra = av_clip(
978  rc->initialRCQP.qpInterP * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, qmax);
979  } else {
980  rc->initialRCQP.qpIntra = rc->initialRCQP.qpInterP;
981  }
982  } else {
983  rc->initialRCQP.qpIntra = ctx->init_qp_i;
984  }
985 
986  if (ctx->init_qp_b < 0) {
987  if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
988  rc->initialRCQP.qpInterB = av_clip(
989  rc->initialRCQP.qpInterP * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, qmax);
990  } else {
991  rc->initialRCQP.qpInterB = rc->initialRCQP.qpInterP;
992  }
993  } else {
994  rc->initialRCQP.qpInterB = ctx->init_qp_b;
995  }
996 }
997 
999 {
1000  NvencContext *ctx = avctx->priv_data;
1001  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
1002 
1003  rc->rateControlMode = NV_ENC_PARAMS_RC_CONSTQP;
1004  rc->constQP.qpInterB = 0;
1005  rc->constQP.qpInterP = 0;
1006  rc->constQP.qpIntra = 0;
1007 
1008  avctx->qmin = ctx->qmin = -1;
1009  avctx->qmax = ctx->qmax = -1;
1010 }
1011 
1013 {
1014  NvencContext *ctx = avctx->priv_data;
1015  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
1016 
1017  switch (ctx->rc) {
1018  case NV_ENC_PARAMS_RC_CONSTQP:
1019  set_constqp(avctx);
1020  return;
1021 #ifndef NVENC_NO_DEPRECATED_RC
1022  case NV_ENC_PARAMS_RC_VBR_MINQP:
1023  if (avctx->qmin < 0 && ctx->qmin < 0) {
1024  av_log(avctx, AV_LOG_WARNING,
1025  "The variable bitrate rate-control requires "
1026  "the 'qmin' option set.\n");
1027  set_vbr(avctx);
1028  return;
1029  }
1030  /* fall through */
1031  case NV_ENC_PARAMS_RC_VBR_HQ:
1032 #endif
1033  case NV_ENC_PARAMS_RC_VBR:
1034  set_vbr(avctx);
1035  break;
1036  case NV_ENC_PARAMS_RC_CBR:
1037 #ifndef NVENC_NO_DEPRECATED_RC
1038  case NV_ENC_PARAMS_RC_CBR_HQ:
1039  case NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ:
1040 #endif
1041  break;
1042  }
1043 
1044  rc->rateControlMode = ctx->rc;
1045 }
1046 
1048 {
1049  NvencContext *ctx = avctx->priv_data;
1050  // default minimum of 4 surfaces
1051  // multiply by 2 for number of NVENCs on gpu (hardcode to 2)
1052  // another multiply by 2 to avoid blocking next PBB group
1053  int nb_surfaces = FFMAX(4, ctx->encode_config.frameIntervalP * 2 * 2);
1054 
1055  // lookahead enabled
1056  if (ctx->rc_lookahead > 0) {
1057  // +1 is to account for lkd_bound calculation later
1058  // +4 is to allow sufficient pipelining with lookahead
1059  nb_surfaces = FFMAX(1, FFMAX(nb_surfaces, ctx->rc_lookahead + ctx->encode_config.frameIntervalP + 1 + 4));
1060  if (nb_surfaces > ctx->nb_surfaces && ctx->nb_surfaces > 0)
1061  {
1062  av_log(avctx, AV_LOG_WARNING,
1063  "Defined rc_lookahead requires more surfaces, "
1064  "increasing used surfaces %d -> %d\n", ctx->nb_surfaces, nb_surfaces);
1065  }
1066  ctx->nb_surfaces = FFMAX(nb_surfaces, ctx->nb_surfaces);
1067  } else {
1068  if (ctx->encode_config.frameIntervalP > 1 && ctx->nb_surfaces < nb_surfaces && ctx->nb_surfaces > 0)
1069  {
1070  av_log(avctx, AV_LOG_WARNING,
1071  "Defined b-frame requires more surfaces, "
1072  "increasing used surfaces %d -> %d\n", ctx->nb_surfaces, nb_surfaces);
1073  ctx->nb_surfaces = FFMAX(ctx->nb_surfaces, nb_surfaces);
1074  }
1075  else if (ctx->nb_surfaces <= 0)
1076  ctx->nb_surfaces = nb_surfaces;
1077  // otherwise use user specified value
1078  }
1079 
1080  ctx->nb_surfaces = FFMAX(1, FFMIN(MAX_REGISTERED_FRAMES, ctx->nb_surfaces));
1081  ctx->async_depth = FFMIN(ctx->async_depth, ctx->nb_surfaces - 1);
1082 
1083  // Output in the worst case will only start when the surface buffer is completely full.
1084  // Hence we need to keep at least the max amount of surfaces plus the max reorder delay around.
1085  ctx->frame_data_array_nb = FFMAX(ctx->nb_surfaces, ctx->nb_surfaces + ctx->encode_config.frameIntervalP - 1);
1086 
1087  return 0;
1088 }
1089 
1091 {
1092  NvencContext *ctx = avctx->priv_data;
1093 
1094  if (avctx->global_quality > 0)
1095  av_log(avctx, AV_LOG_WARNING, "Using global_quality with nvenc is deprecated. Use qp instead.\n");
1096 
1097  if (ctx->cqp < 0 && avctx->global_quality > 0)
1098  ctx->cqp = avctx->global_quality;
1099 
1100  if (avctx->bit_rate > 0) {
1101  ctx->encode_config.rcParams.averageBitRate = avctx->bit_rate;
1102  } else if (ctx->encode_config.rcParams.averageBitRate > 0) {
1103  ctx->encode_config.rcParams.maxBitRate = ctx->encode_config.rcParams.averageBitRate;
1104  }
1105 
1106  if (avctx->rc_max_rate > 0)
1107  ctx->encode_config.rcParams.maxBitRate = avctx->rc_max_rate;
1108 
1109 #ifdef NVENC_HAVE_MULTIPASS
1110  ctx->encode_config.rcParams.multiPass = ctx->multipass;
1111 
1112  if (ctx->flags & NVENC_ONE_PASS)
1113  ctx->encode_config.rcParams.multiPass = NV_ENC_MULTI_PASS_DISABLED;
1114  if (ctx->flags & NVENC_TWO_PASSES || ctx->twopass > 0)
1115  ctx->encode_config.rcParams.multiPass = NV_ENC_TWO_PASS_FULL_RESOLUTION;
1116 
1117  if (ctx->rc < 0) {
1118  if (ctx->cbr) {
1119  ctx->rc = NV_ENC_PARAMS_RC_CBR;
1120  } else if (ctx->cqp >= 0) {
1121  ctx->rc = NV_ENC_PARAMS_RC_CONSTQP;
1122  } else if (ctx->quality >= 0.0f) {
1123  ctx->rc = NV_ENC_PARAMS_RC_VBR;
1124  }
1125  }
1126 #else
1127  if (ctx->rc < 0) {
1128  if (ctx->flags & NVENC_ONE_PASS)
1129  ctx->twopass = 0;
1130  if (ctx->flags & NVENC_TWO_PASSES)
1131  ctx->twopass = 1;
1132 
1133  if (ctx->twopass < 0)
1134  ctx->twopass = (ctx->flags & NVENC_LOWLATENCY) != 0;
1135 
1136  if (ctx->cbr) {
1137  if (ctx->twopass) {
1138  ctx->rc = NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ;
1139  } else {
1140  ctx->rc = NV_ENC_PARAMS_RC_CBR;
1141  }
1142  } else if (ctx->cqp >= 0) {
1143  ctx->rc = NV_ENC_PARAMS_RC_CONSTQP;
1144  } else if (ctx->twopass) {
1145  ctx->rc = NV_ENC_PARAMS_RC_VBR_HQ;
1146  } else if ((avctx->qmin >= 0 && avctx->qmax >= 0) ||
1147  (ctx->qmin >= 0 && ctx->qmax >= 0)) {
1148  ctx->rc = NV_ENC_PARAMS_RC_VBR_MINQP;
1149  }
1150  }
1151 #endif
1152 
1153  if (ctx->rc >= 0 && ctx->rc & RC_MODE_DEPRECATED) {
1154  av_log(avctx, AV_LOG_WARNING, "Specified rc mode is deprecated.\n");
1155  av_log(avctx, AV_LOG_WARNING, "Use -rc constqp/cbr/vbr, -tune and -multipass instead.\n");
1156 
1157  ctx->rc &= ~RC_MODE_DEPRECATED;
1158  }
1159 
1160 #ifdef NVENC_HAVE_QP_CHROMA_OFFSETS
1161  ctx->encode_config.rcParams.cbQPIndexOffset = ctx->qp_cb_offset;
1162  ctx->encode_config.rcParams.crQPIndexOffset = ctx->qp_cr_offset;
1163 #else
1164  if (ctx->qp_cb_offset || ctx->qp_cr_offset)
1165  av_log(avctx, AV_LOG_WARNING, "Failed setting QP CB/CR offsets, SDK 11.1 or greater required at compile time.\n");
1166 #endif
1167 
1168 #ifdef NVENC_HAVE_LDKFS
1169  if (ctx->ldkfs)
1170  ctx->encode_config.rcParams.lowDelayKeyFrameScale = ctx->ldkfs;
1171 #endif
1172 
1173  if (ctx->flags & NVENC_LOSSLESS) {
1174  set_lossless(avctx);
1175  } else if (ctx->rc >= 0) {
1177  } else {
1178  ctx->encode_config.rcParams.rateControlMode = NV_ENC_PARAMS_RC_VBR;
1179  set_vbr(avctx);
1180  }
1181 
1182  if (avctx->rc_buffer_size > 0) {
1183  ctx->encode_config.rcParams.vbvBufferSize = avctx->rc_buffer_size;
1184  } else if (ctx->encode_config.rcParams.averageBitRate > 0) {
1185  avctx->rc_buffer_size = ctx->encode_config.rcParams.vbvBufferSize = 2 * ctx->encode_config.rcParams.averageBitRate;
1186  }
1187 
1188  if (ctx->aq) {
1189  ctx->encode_config.rcParams.enableAQ = 1;
1190  ctx->encode_config.rcParams.aqStrength = ctx->aq_strength;
1191  av_log(avctx, AV_LOG_VERBOSE, "AQ enabled.\n");
1192  }
1193 
1194  if (ctx->temporal_aq) {
1195  ctx->encode_config.rcParams.enableTemporalAQ = 1;
1196  av_log(avctx, AV_LOG_VERBOSE, "Temporal AQ enabled.\n");
1197  }
1198 
1199  if (ctx->rc_lookahead > 0) {
1200  int lkd_bound = FFMIN(ctx->nb_surfaces, ctx->async_depth) -
1201  ctx->encode_config.frameIntervalP - 4;
1202 
1203  if (lkd_bound < 0) {
1204  ctx->encode_config.rcParams.enableLookahead = 0;
1205  av_log(avctx, AV_LOG_WARNING,
1206  "Lookahead not enabled. Increase buffer delay (-delay).\n");
1207  } else {
1208  ctx->encode_config.rcParams.enableLookahead = 1;
1209  ctx->encode_config.rcParams.lookaheadDepth = av_clip(ctx->rc_lookahead, 0, lkd_bound);
1210  ctx->encode_config.rcParams.disableIadapt = ctx->no_scenecut;
1211  ctx->encode_config.rcParams.disableBadapt = !ctx->b_adapt;
1212  av_log(avctx, AV_LOG_VERBOSE,
1213  "Lookahead enabled: depth %d, scenecut %s, B-adapt %s.\n",
1214  ctx->encode_config.rcParams.lookaheadDepth,
1215  ctx->encode_config.rcParams.disableIadapt ? "disabled" : "enabled",
1216  ctx->encode_config.rcParams.disableBadapt ? "disabled" : "enabled");
1217  if (ctx->encode_config.rcParams.lookaheadDepth < ctx->rc_lookahead)
1218  av_log(avctx, AV_LOG_WARNING, "Clipping lookahead depth to %d (from %d) due to lack of surfaces/delay",
1219  ctx->encode_config.rcParams.lookaheadDepth, ctx->rc_lookahead);
1220 
1221 #ifdef NVENC_HAVE_LOOKAHEAD_LEVEL
1222  if (ctx->lookahead_level >= 0) {
1223  switch (ctx->lookahead_level) {
1224  case NV_ENC_LOOKAHEAD_LEVEL_0:
1225  case NV_ENC_LOOKAHEAD_LEVEL_1:
1226  case NV_ENC_LOOKAHEAD_LEVEL_2:
1227  case NV_ENC_LOOKAHEAD_LEVEL_3:
1228  case NV_ENC_LOOKAHEAD_LEVEL_AUTOSELECT:
1229  break;
1230  default:
1231  av_log(avctx, AV_LOG_ERROR, "Invalid lookahead level.\n");
1232  return AVERROR(EINVAL);
1233  }
1234 
1235  ctx->encode_config.rcParams.lookaheadLevel = ctx->lookahead_level;
1236  }
1237 #endif
1238  }
1239  }
1240 
1241  if (ctx->strict_gop) {
1242  ctx->encode_config.rcParams.strictGOPTarget = 1;
1243  av_log(avctx, AV_LOG_VERBOSE, "Strict GOP target enabled.\n");
1244  }
1245 
1246  if (ctx->nonref_p)
1247  ctx->encode_config.rcParams.enableNonRefP = 1;
1248 
1249  if (ctx->zerolatency)
1250  ctx->encode_config.rcParams.zeroReorderDelay = 1;
1251 
1252  if (ctx->quality) {
1253  //convert from float to fixed point 8.8
1254  int tmp_quality = (int)(ctx->quality * 256.0f);
1255  ctx->encode_config.rcParams.targetQuality = (uint8_t)(tmp_quality >> 8);
1256  ctx->encode_config.rcParams.targetQualityLSB = (uint8_t)(tmp_quality & 0xff);
1257 
1258  av_log(avctx, AV_LOG_VERBOSE, "CQ(%d) mode enabled.\n", tmp_quality);
1259 
1260  // CQ mode shall discard avg bitrate/vbv buffer size and honor only max bitrate
1261  ctx->encode_config.rcParams.averageBitRate = avctx->bit_rate = 0;
1262  ctx->encode_config.rcParams.vbvBufferSize = avctx->rc_buffer_size = 0;
1263  ctx->encode_config.rcParams.maxBitRate = avctx->rc_max_rate;
1264  }
1265 
1266  return 0;
1267 }
1268 
1270 {
1271  NvencContext *ctx = avctx->priv_data;
1272  NV_ENC_CONFIG *cc = &ctx->encode_config;
1273  NV_ENC_CONFIG_H264 *h264 = &cc->encodeCodecConfig.h264Config;
1274  NV_ENC_CONFIG_H264_VUI_PARAMETERS *vui = &h264->h264VUIParameters;
1275 
1276  const AVPixFmtDescriptor *pixdesc = av_pix_fmt_desc_get(ctx->data_pix_fmt);
1277 
1278  if ((pixdesc->flags & AV_PIX_FMT_FLAG_RGB) && !IS_GBRP(ctx->data_pix_fmt)) {
1279  vui->colourMatrix = to_nv_color_matrix(AVCOL_SPC_BT470BG);
1280  vui->colourPrimaries = to_nv_color_pri(avctx->color_primaries);
1281  vui->transferCharacteristics = to_nv_color_trc(avctx->color_trc);
1282  vui->videoFullRangeFlag = 0;
1283  } else {
1284  vui->colourMatrix = to_nv_color_matrix(IS_GBRP(ctx->data_pix_fmt) ? AVCOL_SPC_RGB : avctx->colorspace);
1285  vui->colourPrimaries = to_nv_color_pri(avctx->color_primaries);
1286  vui->transferCharacteristics = to_nv_color_trc(avctx->color_trc);
1287  vui->videoFullRangeFlag = (avctx->color_range == AVCOL_RANGE_JPEG
1288  || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
1289  }
1290 
1291  vui->colourDescriptionPresentFlag =
1292  (vui->colourMatrix != 2 || vui->colourPrimaries != 2 || vui->transferCharacteristics != 2);
1293 
1294  vui->videoSignalTypePresentFlag =
1295  (vui->colourDescriptionPresentFlag
1296  || vui->videoFormat != 5
1297  || vui->videoFullRangeFlag != 0);
1298 
1299  if (ctx->max_slice_size > 0) {
1300  h264->sliceMode = 1;
1301  h264->sliceModeData = ctx->max_slice_size;
1302  } else {
1303  h264->sliceMode = 3;
1304  h264->sliceModeData = avctx->slices > 0 ? avctx->slices : 1;
1305  }
1306 
1307  if (ctx->intra_refresh) {
1308  h264->enableIntraRefresh = 1;
1309  h264->intraRefreshPeriod = cc->gopLength;
1310  h264->intraRefreshCnt = cc->gopLength - 1;
1311  cc->gopLength = NVENC_INFINITE_GOPLENGTH;
1312  h264->outputRecoveryPointSEI = 1;
1313 #ifdef NVENC_HAVE_SINGLE_SLICE_INTRA_REFRESH
1314  h264->singleSliceIntraRefresh = ctx->single_slice_intra_refresh;
1315 #endif
1316  }
1317 
1318  if (ctx->constrained_encoding)
1319  h264->enableConstrainedEncoding = 1;
1320 
1321  h264->disableSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 1 : 0;
1322  h264->repeatSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 0 : 1;
1323  h264->outputAUD = ctx->aud;
1324 
1325  if (ctx->dpb_size >= 0) {
1326  /* 0 means "let the hardware decide" */
1327  h264->maxNumRefFrames = ctx->dpb_size;
1328  }
1329 
1330  h264->idrPeriod = cc->gopLength;
1331 
1332  if (IS_CBR(cc->rcParams.rateControlMode)) {
1333  /* Older SDKs use outputBufferingPeriodSEI to control filler data */
1334  h264->outputBufferingPeriodSEI = ctx->cbr_padding;
1335 
1336 #ifdef NVENC_HAVE_FILLER_DATA
1337  h264->enableFillerDataInsertion = ctx->cbr_padding;
1338 #endif
1339  }
1340 
1341  h264->outputPictureTimingSEI = 1;
1342 
1343 #ifndef NVENC_NO_DEPRECATED_RC
1344  if (cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ ||
1345  cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_CBR_HQ ||
1346  cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_VBR_HQ) {
1347  h264->adaptiveTransformMode = NV_ENC_H264_ADAPTIVE_TRANSFORM_ENABLE;
1348  h264->fmoMode = NV_ENC_H264_FMO_DISABLE;
1349  }
1350 #endif
1351 
1352  if (ctx->flags & NVENC_LOSSLESS) {
1353  h264->qpPrimeYZeroTransformBypassFlag = 1;
1354  } else {
1355  switch(ctx->profile) {
1357  cc->profileGUID = NV_ENC_H264_PROFILE_BASELINE_GUID;
1359  break;
1361  cc->profileGUID = NV_ENC_H264_PROFILE_MAIN_GUID;
1362  avctx->profile = AV_PROFILE_H264_MAIN;
1363  break;
1365  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_GUID;
1366  avctx->profile = AV_PROFILE_H264_HIGH;
1367  break;
1368 #ifdef NVENC_HAVE_H264_10BIT_SUPPORT
1369  case NV_ENC_H264_PROFILE_HIGH_10:
1370  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_10_GUID;
1372  break;
1373 #endif
1374 #ifdef NVENC_HAVE_422_SUPPORT
1375  case NV_ENC_H264_PROFILE_HIGH_422:
1376  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_422_GUID;
1378  break;
1379 #endif
1381  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_444_GUID;
1383  break;
1384  }
1385  }
1386 
1387 #ifdef NVENC_HAVE_H264_10BIT_SUPPORT
1388  // force setting profile as high10 if input is 10 bit or if it should be encoded as 10 bit
1389  if (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) {
1390  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_10_GUID;
1392  }
1393 #endif
1394 
1395  // force setting profile as high444p if input is AV_PIX_FMT_YUV444P
1396  if (IS_YUV444(ctx->data_pix_fmt)) {
1397  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_444_GUID;
1399  }
1400 
1401 #ifdef NVENC_HAVE_422_SUPPORT
1402  // force setting profile as high422p if input is AV_PIX_FMT_YUV422P
1403  if (IS_YUV422(ctx->data_pix_fmt)) {
1404  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_422_GUID;
1406  }
1407 #endif
1408 
1409  vui->bitstreamRestrictionFlag = cc->gopLength != 1 || avctx->profile < AV_PROFILE_H264_HIGH;
1410 
1411  h264->chromaFormatIDC = IS_YUV444(ctx->data_pix_fmt) ? 3 : IS_YUV422(ctx->data_pix_fmt) ? 2 : 1;
1412 
1413  h264->level = ctx->level;
1414 
1415 #ifdef NVENC_HAVE_NEW_BIT_DEPTH_API
1416  h264->inputBitDepth = IS_10BIT(ctx->data_pix_fmt) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1417  h264->outputBitDepth = (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1418 #endif
1419 
1420  if (ctx->coder >= 0)
1421  h264->entropyCodingMode = ctx->coder;
1422 
1423 #ifdef NVENC_HAVE_BFRAME_REF_MODE
1424  if (ctx->b_ref_mode >= 0)
1425  h264->useBFramesAsRef = ctx->b_ref_mode;
1426 #endif
1427 
1428 #ifdef NVENC_HAVE_MULTIPLE_REF_FRAMES
1429  h264->numRefL0 = avctx->refs;
1430  h264->numRefL1 = avctx->refs;
1431 #endif
1432 
1433 #ifdef NVENC_HAVE_H264_AND_AV1_TEMPORAL_FILTER
1434  if (ctx->tf_level >= 0) {
1435  h264->tfLevel = ctx->tf_level;
1436 
1437  switch (ctx->tf_level)
1438  {
1439  case NV_ENC_TEMPORAL_FILTER_LEVEL_0:
1440  case NV_ENC_TEMPORAL_FILTER_LEVEL_4:
1441  break;
1442  default:
1443  av_log(avctx, AV_LOG_ERROR, "Invalid temporal filtering level.\n");
1444  return AVERROR(EINVAL);
1445  }
1446 
1447  if (ctx->encode_config.frameIntervalP < 5)
1448  av_log(avctx, AV_LOG_WARNING, "Temporal filtering needs at least 4 B-Frames (-bf 4).\n");
1449  }
1450 #endif
1451 
1452 #ifdef NVENC_HAVE_TIME_CODE
1453  if (ctx->s12m_tc)
1454  h264->enableTimeCode = 1;
1455 #endif
1456 
1457  return 0;
1458 }
1459 
1461 {
1462  NvencContext *ctx = avctx->priv_data;
1463  NV_ENC_CONFIG *cc = &ctx->encode_config;
1464  NV_ENC_CONFIG_HEVC *hevc = &cc->encodeCodecConfig.hevcConfig;
1465  NV_ENC_CONFIG_HEVC_VUI_PARAMETERS *vui = &hevc->hevcVUIParameters;
1466 
1467  const AVPixFmtDescriptor *pixdesc = av_pix_fmt_desc_get(ctx->data_pix_fmt);
1468 
1469  if ((pixdesc->flags & AV_PIX_FMT_FLAG_RGB) && !IS_GBRP(ctx->data_pix_fmt)) {
1470  vui->colourMatrix = to_nv_color_matrix(AVCOL_SPC_BT470BG);
1471  vui->colourPrimaries = to_nv_color_pri(avctx->color_primaries);
1472  vui->transferCharacteristics = to_nv_color_trc(avctx->color_trc);
1473  vui->videoFullRangeFlag = 0;
1474  } else {
1475  vui->colourMatrix = to_nv_color_matrix(IS_GBRP(ctx->data_pix_fmt) ? AVCOL_SPC_RGB : avctx->colorspace);
1476  vui->colourPrimaries = to_nv_color_pri(avctx->color_primaries);
1477  vui->transferCharacteristics = to_nv_color_trc(avctx->color_trc);
1478  vui->videoFullRangeFlag = (avctx->color_range == AVCOL_RANGE_JPEG
1479  || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
1480  }
1481 
1482  vui->colourDescriptionPresentFlag =
1483  (vui->colourMatrix != 2 || vui->colourPrimaries != 2 || vui->transferCharacteristics != 2);
1484 
1485  vui->videoSignalTypePresentFlag =
1486  (vui->colourDescriptionPresentFlag
1487  || vui->videoFormat != 5
1488  || vui->videoFullRangeFlag != 0);
1489 
1490  if (ctx->max_slice_size > 0) {
1491  hevc->sliceMode = 1;
1492  hevc->sliceModeData = ctx->max_slice_size;
1493  } else {
1494  hevc->sliceMode = 3;
1495  hevc->sliceModeData = avctx->slices > 0 ? avctx->slices : 1;
1496  }
1497 
1498  if (ctx->intra_refresh) {
1499  hevc->enableIntraRefresh = 1;
1500  hevc->intraRefreshPeriod = cc->gopLength;
1501  hevc->intraRefreshCnt = cc->gopLength - 1;
1502  cc->gopLength = NVENC_INFINITE_GOPLENGTH;
1503 #ifdef NVENC_HAVE_HEVC_OUTPUT_RECOVERY_POINT_SEI
1504  hevc->outputRecoveryPointSEI = 1;
1505 #endif
1506 #ifdef NVENC_HAVE_SINGLE_SLICE_INTRA_REFRESH
1507  hevc->singleSliceIntraRefresh = ctx->single_slice_intra_refresh;
1508 #endif
1509  }
1510 
1511 #ifdef NVENC_HAVE_HEVC_AND_AV1_MASTERING_METADATA
1512  ctx->mdm = hevc->outputMasteringDisplay = !!av_frame_side_data_get(avctx->decoded_side_data,
1513  avctx->nb_decoded_side_data,
1515  ctx->cll = hevc->outputMaxCll = !!av_frame_side_data_get(avctx->decoded_side_data,
1516  avctx->nb_decoded_side_data,
1518 #endif
1519 
1520 #ifdef NVENC_HAVE_HEVC_CONSTRAINED_ENCODING
1521  if (ctx->constrained_encoding)
1522  hevc->enableConstrainedEncoding = 1;
1523 #endif
1524 
1525  hevc->disableSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 1 : 0;
1526  hevc->repeatSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 0 : 1;
1527  hevc->outputAUD = ctx->aud;
1528 
1529  if (ctx->dpb_size >= 0) {
1530  /* 0 means "let the hardware decide" */
1531  hevc->maxNumRefFramesInDPB = ctx->dpb_size;
1532  }
1533 
1534  hevc->idrPeriod = cc->gopLength;
1535 
1536  if (IS_CBR(cc->rcParams.rateControlMode)) {
1537  /* Older SDKs use outputBufferingPeriodSEI to control filler data */
1538  hevc->outputBufferingPeriodSEI = ctx->cbr_padding;
1539 
1540 #ifdef NVENC_HAVE_FILLER_DATA
1541  hevc->enableFillerDataInsertion = ctx->cbr_padding;
1542 #endif
1543  }
1544 
1545  hevc->outputPictureTimingSEI = 1;
1546 
1547 #ifdef NVENC_HAVE_MVHEVC
1548  if (ctx->multiview_supported && (ctx->profile == NV_ENC_HEVC_PROFILE_MAIN || ctx->profile == NV_ENC_HEVC_PROFILE_MULTIVIEW_MAIN)) {
1551  const AVStereo3D *stereo3d = sd_stereo3d ? (const AVStereo3D*)sd_stereo3d->data : NULL;
1552 
1553  if (sd_tdrdi && stereo3d && stereo3d->type == AV_STEREO3D_FRAMESEQUENCE)
1554  ctx->profile = NV_ENC_HEVC_PROFILE_MULTIVIEW_MAIN;
1555 
1556  if (ctx->profile == NV_ENC_HEVC_PROFILE_MULTIVIEW_MAIN && stereo3d &&
1557  stereo3d->type != AV_STEREO3D_2D &&
1558  stereo3d->type != AV_STEREO3D_UNSPEC &&
1559  stereo3d->type != AV_STEREO3D_FRAMESEQUENCE)
1560  {
1561  av_log(avctx, AV_LOG_WARNING, "Unsupported multiview input, disabling multiview encoding.\n");
1562  ctx->profile = NV_ENC_HEVC_PROFILE_MAIN;
1563  }
1564  }
1565 #endif
1566 
1567  switch (ctx->profile) {
1569  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN_GUID;
1570  avctx->profile = AV_PROFILE_HEVC_MAIN;
1571  break;
1573  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN10_GUID;
1575  break;
1577  cc->profileGUID = NV_ENC_HEVC_PROFILE_FREXT_GUID;
1578  avctx->profile = AV_PROFILE_HEVC_REXT;
1579  break;
1580 #ifdef NVENC_HAVE_MVHEVC
1581  case NV_ENC_HEVC_PROFILE_MULTIVIEW_MAIN:
1582  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN_GUID;
1584  ctx->multiview = 1;
1585 
1586  hevc->enableMVHEVC = 1;
1587  hevc->outputHevc3DReferenceDisplayInfo = 1;
1588 
1589  av_log(avctx, AV_LOG_VERBOSE, "Enabling MV HEVC encoding.\n");
1590  break;
1591 #endif
1592  }
1593 
1594  // force setting profile as main10 if input is 10 bit or if it should be encoded as 10 bit
1595  if (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) {
1596  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN10_GUID;
1598  }
1599 
1600  // force setting profile as rext if input is yuv444 or yuv422
1601  if (IS_YUV444(ctx->data_pix_fmt) || IS_YUV422(ctx->data_pix_fmt)) {
1602  cc->profileGUID = NV_ENC_HEVC_PROFILE_FREXT_GUID;
1603  avctx->profile = AV_PROFILE_HEVC_REXT;
1604  }
1605 
1606 #ifdef NVENC_HAVE_MVHEVC
1607  if (ctx->multiview && avctx->profile != AV_PROFILE_HEVC_MULTIVIEW_MAIN) {
1608  av_log(avctx, AV_LOG_ERROR, "Multiview encoding only works for Main profile content.\n");
1609  return AVERROR(EINVAL);
1610  }
1611 #endif
1612 
1613  hevc->chromaFormatIDC = IS_YUV444(ctx->data_pix_fmt) ? 3 : IS_YUV422(ctx->data_pix_fmt) ? 2 : 1;
1614 
1615 #ifdef NVENC_HAVE_NEW_BIT_DEPTH_API
1616  hevc->inputBitDepth = IS_10BIT(ctx->data_pix_fmt) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1617  hevc->outputBitDepth = (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1618 #else
1619  hevc->pixelBitDepthMinus8 = IS_10BIT(ctx->data_pix_fmt) ? 2 : 0;
1620 #endif
1621 
1622  hevc->level = ctx->level;
1623 
1624  hevc->tier = ctx->tier;
1625 
1626 #ifdef NVENC_HAVE_HEVC_BFRAME_REF_MODE
1627  if (ctx->b_ref_mode >= 0)
1628  hevc->useBFramesAsRef = ctx->b_ref_mode;
1629 #endif
1630 
1631 #ifdef NVENC_HAVE_MULTIPLE_REF_FRAMES
1632  hevc->numRefL0 = avctx->refs;
1633  hevc->numRefL1 = avctx->refs;
1634 #endif
1635 
1636 #ifdef NVENC_HAVE_TEMPORAL_FILTER
1637  if (ctx->tf_level >= 0) {
1638  hevc->tfLevel = ctx->tf_level;
1639 
1640  switch (ctx->tf_level)
1641  {
1642  case NV_ENC_TEMPORAL_FILTER_LEVEL_0:
1643  case NV_ENC_TEMPORAL_FILTER_LEVEL_4:
1644  break;
1645  default:
1646  av_log(avctx, AV_LOG_ERROR, "Invalid temporal filtering level.\n");
1647  return AVERROR(EINVAL);
1648  }
1649 
1650  if (ctx->encode_config.frameIntervalP < 5)
1651  av_log(avctx, AV_LOG_WARNING, "Temporal filtering needs at least 4 B-Frames (-bf 4).\n");
1652  }
1653 #endif
1654 
1655  return 0;
1656 }
1657 
1658 #if CONFIG_AV1_NVENC_ENCODER
1659 static av_cold int nvenc_setup_av1_config(AVCodecContext *avctx)
1660 {
1661  NvencContext *ctx = avctx->priv_data;
1662  NV_ENC_CONFIG *cc = &ctx->encode_config;
1663  NV_ENC_CONFIG_AV1 *av1 = &cc->encodeCodecConfig.av1Config;
1664 
1665  const AVPixFmtDescriptor *pixdesc = av_pix_fmt_desc_get(ctx->data_pix_fmt);
1666 
1667  if ((pixdesc->flags & AV_PIX_FMT_FLAG_RGB) && !IS_GBRP(ctx->data_pix_fmt)) {
1668  av1->matrixCoefficients = to_nv_color_matrix(AVCOL_SPC_BT470BG);
1669  av1->colorPrimaries = to_nv_color_pri(avctx->color_primaries);
1670  av1->transferCharacteristics = to_nv_color_trc(avctx->color_trc);
1671  av1->colorRange = 0;
1672  } else {
1673  av1->matrixCoefficients = to_nv_color_matrix(IS_GBRP(ctx->data_pix_fmt) ? AVCOL_SPC_RGB : avctx->colorspace);
1674  av1->colorPrimaries = to_nv_color_pri(avctx->color_primaries);
1675  av1->transferCharacteristics = to_nv_color_trc(avctx->color_trc);
1676  av1->colorRange = (avctx->color_range == AVCOL_RANGE_JPEG
1677  || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
1678  }
1679 
1680  if (IS_YUV444(ctx->data_pix_fmt)) {
1681  av_log(avctx, AV_LOG_ERROR, "AV1 High Profile not supported, required for 4:4:4 encoding\n");
1682  return AVERROR(ENOTSUP);
1683  } else {
1684  cc->profileGUID = NV_ENC_AV1_PROFILE_MAIN_GUID;
1685  avctx->profile = AV_PROFILE_AV1_MAIN;
1686  }
1687 
1688  if (ctx->dpb_size >= 0) {
1689  /* 0 means "let the hardware decide" */
1690  av1->maxNumRefFramesInDPB = ctx->dpb_size;
1691  }
1692 
1693  if (ctx->intra_refresh) {
1694  av1->enableIntraRefresh = 1;
1695  av1->intraRefreshPeriod = cc->gopLength;
1696  av1->intraRefreshCnt = cc->gopLength - 1;
1697  cc->gopLength = NVENC_INFINITE_GOPLENGTH;
1698  }
1699 
1700  av1->idrPeriod = cc->gopLength;
1701 
1702  if (IS_CBR(cc->rcParams.rateControlMode)) {
1703  av1->enableBitstreamPadding = ctx->cbr_padding;
1704  }
1705 
1706  if (ctx->tile_cols >= 0)
1707  av1->numTileColumns = ctx->tile_cols;
1708  if (ctx->tile_rows >= 0)
1709  av1->numTileRows = ctx->tile_rows;
1710 
1711  av1->outputAnnexBFormat = 0;
1712 
1713  av1->level = ctx->level;
1714  av1->tier = ctx->tier;
1715 
1716  av1->enableTimingInfo = ctx->timing_info;
1717 
1718  /* mp4 encapsulation requires sequence headers to be present on all keyframes for AV1 */
1719  av1->disableSeqHdr = 0;
1720  av1->repeatSeqHdr = 1;
1721 
1722  av1->chromaFormatIDC = IS_YUV444(ctx->data_pix_fmt) ? 3 : 1;
1723 
1724 #ifdef NVENC_HAVE_NEW_BIT_DEPTH_API
1725  av1->inputBitDepth = IS_10BIT(ctx->data_pix_fmt) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1726  av1->outputBitDepth = (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1727 #else
1728  av1->inputPixelBitDepthMinus8 = IS_10BIT(ctx->data_pix_fmt) ? 2 : 0;
1729  av1->pixelBitDepthMinus8 = (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) ? 2 : 0;
1730 #endif
1731 
1732 #ifdef NVENC_HAVE_HEVC_AND_AV1_MASTERING_METADATA
1733  ctx->mdm = av1->outputMasteringDisplay = !!av_frame_side_data_get(avctx->decoded_side_data,
1734  avctx->nb_decoded_side_data,
1736  ctx->cll = av1->outputMaxCll = !!av_frame_side_data_get(avctx->decoded_side_data,
1737  avctx->nb_decoded_side_data,
1739 #endif
1740 
1741  if (ctx->b_ref_mode >= 0)
1742  av1->useBFramesAsRef = ctx->b_ref_mode;
1743 
1744  av1->numFwdRefs = avctx->refs;
1745  av1->numBwdRefs = avctx->refs;
1746 
1747 #ifdef NVENC_HAVE_H264_AND_AV1_TEMPORAL_FILTER
1748  if (ctx->tf_level >= 0) {
1749  av1->tfLevel = ctx->tf_level;
1750 
1751  switch (ctx->tf_level)
1752  {
1753  case NV_ENC_TEMPORAL_FILTER_LEVEL_0:
1754  case NV_ENC_TEMPORAL_FILTER_LEVEL_4:
1755  break;
1756  default:
1757  av_log(avctx, AV_LOG_ERROR, "Invalid temporal filtering level.\n");
1758  return AVERROR(EINVAL);
1759  }
1760 
1761  if (ctx->encode_config.frameIntervalP < 5)
1762  av_log(avctx, AV_LOG_WARNING, "Temporal filtering needs at least 4 B-Frames (-bf 4).\n");
1763  }
1764 #endif
1765 
1766  return 0;
1767 }
1768 #endif
1769 
1771 {
1772  switch (avctx->codec->id) {
1773  case AV_CODEC_ID_H264:
1774  return nvenc_setup_h264_config(avctx);
1775  case AV_CODEC_ID_HEVC:
1776  return nvenc_setup_hevc_config(avctx);
1777 #if CONFIG_AV1_NVENC_ENCODER
1778  case AV_CODEC_ID_AV1:
1779  return nvenc_setup_av1_config(avctx);
1780 #endif
1781  /* Earlier switch/case will return if unknown codec is passed. */
1782  }
1783 
1784  return 0;
1785 }
1786 
1787 static void compute_dar(AVCodecContext *avctx, int *dw, int *dh) {
1788  int sw, sh;
1789 
1790  sw = avctx->width;
1791  sh = avctx->height;
1792 
1793 #if CONFIG_AV1_NVENC_ENCODER
1794  if (avctx->codec->id == AV_CODEC_ID_AV1) {
1795  /* For AV1 we actually need to calculate the render width/height, not the dar */
1796  if (avctx->sample_aspect_ratio.num > 0 && avctx->sample_aspect_ratio.den > 0
1797  && avctx->sample_aspect_ratio.num != avctx->sample_aspect_ratio.den)
1798  {
1799  if (avctx->sample_aspect_ratio.num > avctx->sample_aspect_ratio.den) {
1800  sw = av_rescale(sw, avctx->sample_aspect_ratio.num, avctx->sample_aspect_ratio.den);
1801  } else {
1802  sh = av_rescale(sh, avctx->sample_aspect_ratio.den, avctx->sample_aspect_ratio.num);
1803  }
1804  }
1805 
1806  *dw = sw;
1807  *dh = sh;
1808  return;
1809  }
1810 #endif
1811 
1812  if (avctx->sample_aspect_ratio.num > 0 && avctx->sample_aspect_ratio.den > 0) {
1813  sw *= avctx->sample_aspect_ratio.num;
1814  sh *= avctx->sample_aspect_ratio.den;
1815  }
1816 
1817  av_reduce(dw, dh, sw, sh, 1024 * 1024);
1818 }
1819 
1821 {
1822  NvencContext *ctx = avctx->priv_data;
1823  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1824  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1825 
1826  NV_ENC_PRESET_CONFIG preset_config = { 0 };
1827  NVENCSTATUS nv_status = NV_ENC_SUCCESS;
1828  AVCPBProperties *cpb_props;
1829  int res = 0;
1830  int dw, dh;
1831 
1832  ctx->encode_config.version = NV_ENC_CONFIG_VER;
1833  ctx->init_encode_params.version = NV_ENC_INITIALIZE_PARAMS_VER;
1834 
1835  ctx->init_encode_params.encodeHeight = avctx->height;
1836  ctx->init_encode_params.encodeWidth = avctx->width;
1837 
1838  ctx->init_encode_params.encodeConfig = &ctx->encode_config;
1839 
1840  preset_config.version = NV_ENC_PRESET_CONFIG_VER;
1841  preset_config.presetCfg.version = NV_ENC_CONFIG_VER;
1842 
1843 #ifdef NVENC_HAVE_NEW_PRESETS
1844  ctx->init_encode_params.tuningInfo = ctx->tuning_info;
1845 
1846  if (ctx->flags & NVENC_LOSSLESS)
1847  ctx->init_encode_params.tuningInfo = NV_ENC_TUNING_INFO_LOSSLESS;
1848  else if (ctx->flags & NVENC_LOWLATENCY)
1849  ctx->init_encode_params.tuningInfo = NV_ENC_TUNING_INFO_LOW_LATENCY;
1850 
1851  nv_status = p_nvenc->nvEncGetEncodePresetConfigEx(ctx->nvencoder,
1852  ctx->init_encode_params.encodeGUID,
1853  ctx->init_encode_params.presetGUID,
1854  ctx->init_encode_params.tuningInfo,
1855  &preset_config);
1856 #else
1857  nv_status = p_nvenc->nvEncGetEncodePresetConfig(ctx->nvencoder,
1858  ctx->init_encode_params.encodeGUID,
1859  ctx->init_encode_params.presetGUID,
1860  &preset_config);
1861 #endif
1862  if (nv_status != NV_ENC_SUCCESS)
1863  return nvenc_print_error(avctx, nv_status, "Cannot get the preset configuration");
1864 
1865  memcpy(&ctx->encode_config, &preset_config.presetCfg, sizeof(ctx->encode_config));
1866 
1867  ctx->encode_config.version = NV_ENC_CONFIG_VER;
1868 
1869  compute_dar(avctx, &dw, &dh);
1870  ctx->init_encode_params.darHeight = dh;
1871  ctx->init_encode_params.darWidth = dw;
1872 
1873  if (avctx->framerate.num > 0 && avctx->framerate.den > 0) {
1874  ctx->init_encode_params.frameRateNum = avctx->framerate.num;
1875  ctx->init_encode_params.frameRateDen = avctx->framerate.den;
1876  } else {
1877  ctx->init_encode_params.frameRateNum = avctx->time_base.den;
1878  ctx->init_encode_params.frameRateDen = avctx->time_base.num;
1879  }
1880 
1881 #ifdef NVENC_HAVE_UNIDIR_B
1882  ctx->init_encode_params.enableUniDirectionalB = ctx->unidir_b;
1883 #endif
1884 
1885  ctx->init_encode_params.enableEncodeAsync = 0;
1886  ctx->init_encode_params.enablePTD = 1;
1887 
1888 #ifdef NVENC_HAVE_NEW_PRESETS
1889  /* If lookahead isn't set from CLI, use value from preset.
1890  * P6 & P7 presets may enable lookahead for better quality.
1891  * */
1892  if (ctx->rc_lookahead == 0 && ctx->encode_config.rcParams.enableLookahead)
1893  ctx->rc_lookahead = ctx->encode_config.rcParams.lookaheadDepth;
1894 #endif
1895 
1896  if (ctx->weighted_pred == 1)
1897  ctx->init_encode_params.enableWeightedPrediction = 1;
1898 
1899 #ifdef NVENC_HAVE_SPLIT_FRAME_ENCODING
1900  ctx->init_encode_params.splitEncodeMode = ctx->split_encode_mode;
1901 
1902  if (ctx->split_encode_mode != NV_ENC_SPLIT_DISABLE_MODE) {
1903  if (avctx->codec->id == AV_CODEC_ID_HEVC && ctx->weighted_pred == 1)
1904  av_log(avctx, AV_LOG_WARNING, "Split encoding not supported with weighted prediction enabled.\n");
1905  }
1906 #endif
1907 
1908  if (ctx->bluray_compat) {
1909  ctx->aud = 1;
1910  ctx->dpb_size = FFMIN(FFMAX(avctx->refs, 0), 6);
1911  avctx->max_b_frames = FFMIN(avctx->max_b_frames, 3);
1912  switch (avctx->codec->id) {
1913  case AV_CODEC_ID_H264:
1914  /* maximum level depends on used resolution */
1915  break;
1916  case AV_CODEC_ID_HEVC:
1917  ctx->level = NV_ENC_LEVEL_HEVC_51;
1918  ctx->tier = NV_ENC_TIER_HEVC_HIGH;
1919  break;
1920  }
1921  }
1922 
1923  if (avctx->gop_size > 0) {
1924  // only overwrite preset if a GOP size was selected as input
1925  ctx->encode_config.gopLength = avctx->gop_size;
1926  } else if (avctx->gop_size == 0) {
1927  ctx->encode_config.frameIntervalP = 0;
1928  ctx->encode_config.gopLength = 1;
1929  }
1930 
1931  if (avctx->max_b_frames >= 0 && ctx->encode_config.gopLength > 1) {
1932  /* 0 is intra-only, 1 is I/P only, 2 is one B-Frame, 3 two B-frames, and so on. */
1933  ctx->encode_config.frameIntervalP = avctx->max_b_frames + 1;
1934  }
1935 
1936  /* force to enable intra refresh */
1937  if(ctx->single_slice_intra_refresh)
1938  ctx->intra_refresh = 1;
1939 
1940  nvenc_recalc_surfaces(avctx);
1941 
1942  res = nvenc_setup_rate_control(avctx);
1943  if (res < 0)
1944  return res;
1945 
1946  if (avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
1947  ctx->encode_config.frameFieldMode = NV_ENC_PARAMS_FRAME_FIELD_MODE_FIELD;
1948  } else {
1949  ctx->encode_config.frameFieldMode = NV_ENC_PARAMS_FRAME_FIELD_MODE_FRAME;
1950  }
1951 
1952  res = nvenc_setup_codec_config(avctx);
1953  if (res)
1954  return res;
1955 
1956  res = nvenc_push_context(avctx);
1957  if (res < 0)
1958  return res;
1959 
1960  nv_status = p_nvenc->nvEncInitializeEncoder(ctx->nvencoder, &ctx->init_encode_params);
1961  if (nv_status != NV_ENC_SUCCESS) {
1962  nvenc_pop_context(avctx);
1963  return nvenc_print_error(avctx, nv_status, "InitializeEncoder failed");
1964  }
1965 
1966 #ifdef NVENC_HAVE_CUSTREAM_PTR
1967  if (ctx->cu_context) {
1968  nv_status = p_nvenc->nvEncSetIOCudaStreams(ctx->nvencoder, &ctx->cu_stream, &ctx->cu_stream);
1969  if (nv_status != NV_ENC_SUCCESS) {
1970  nvenc_pop_context(avctx);
1971  return nvenc_print_error(avctx, nv_status, "SetIOCudaStreams failed");
1972  }
1973  }
1974 #endif
1975 
1976  res = nvenc_pop_context(avctx);
1977  if (res < 0)
1978  return res;
1979 
1980  if (ctx->encode_config.frameIntervalP > 1)
1981  avctx->has_b_frames = 2;
1982 
1983  if (ctx->encode_config.rcParams.averageBitRate > 0)
1984  avctx->bit_rate = ctx->encode_config.rcParams.averageBitRate;
1985 
1986  cpb_props = ff_encode_add_cpb_side_data(avctx);
1987  if (!cpb_props)
1988  return AVERROR(ENOMEM);
1989  cpb_props->max_bitrate = ctx->encode_config.rcParams.maxBitRate;
1990  cpb_props->avg_bitrate = avctx->bit_rate;
1991  cpb_props->buffer_size = ctx->encode_config.rcParams.vbvBufferSize;
1992 
1993  return 0;
1994 }
1995 
1996 static NV_ENC_BUFFER_FORMAT nvenc_map_buffer_format(enum AVPixelFormat pix_fmt)
1997 {
1998  switch (pix_fmt) {
1999  case AV_PIX_FMT_YUV420P:
2000  return NV_ENC_BUFFER_FORMAT_YV12;
2001  case AV_PIX_FMT_NV12:
2002  return NV_ENC_BUFFER_FORMAT_NV12;
2003  case AV_PIX_FMT_P010:
2004  case AV_PIX_FMT_P016:
2005  return NV_ENC_BUFFER_FORMAT_YUV420_10BIT;
2006  case AV_PIX_FMT_GBRP:
2007  case AV_PIX_FMT_YUV444P:
2008  return NV_ENC_BUFFER_FORMAT_YUV444;
2009  case AV_PIX_FMT_GBRP16:
2010  case AV_PIX_FMT_GBRP10MSB:
2011  case AV_PIX_FMT_YUV444P16:
2013  return NV_ENC_BUFFER_FORMAT_YUV444_10BIT;
2014  case AV_PIX_FMT_0RGB32:
2015  case AV_PIX_FMT_RGB32:
2016  return NV_ENC_BUFFER_FORMAT_ARGB;
2017  case AV_PIX_FMT_0BGR32:
2018  case AV_PIX_FMT_BGR32:
2019  return NV_ENC_BUFFER_FORMAT_ABGR;
2020  case AV_PIX_FMT_X2RGB10:
2021  return NV_ENC_BUFFER_FORMAT_ARGB10;
2022  case AV_PIX_FMT_X2BGR10:
2023  return NV_ENC_BUFFER_FORMAT_ABGR10;
2024 #ifdef NVENC_HAVE_422_SUPPORT
2025  case AV_PIX_FMT_NV16:
2026  return NV_ENC_BUFFER_FORMAT_NV16;
2027  case AV_PIX_FMT_P210:
2028  case AV_PIX_FMT_P216:
2029  return NV_ENC_BUFFER_FORMAT_P210;
2030 #endif
2031  default:
2032  return NV_ENC_BUFFER_FORMAT_UNDEFINED;
2033  }
2034 }
2035 
2036 static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
2037 {
2038  NvencContext *ctx = avctx->priv_data;
2039  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2040  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2041  NvencSurface* tmp_surface = &ctx->surfaces[idx];
2042 
2043  NVENCSTATUS nv_status;
2044  NV_ENC_CREATE_BITSTREAM_BUFFER allocOut = { 0 };
2045  allocOut.version = NV_ENC_CREATE_BITSTREAM_BUFFER_VER;
2046 
2047  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2048  ctx->surfaces[idx].in_ref = av_frame_alloc();
2049  if (!ctx->surfaces[idx].in_ref)
2050  return AVERROR(ENOMEM);
2051  } else {
2052  NV_ENC_CREATE_INPUT_BUFFER allocSurf = { 0 };
2053 
2054  ctx->surfaces[idx].format = nvenc_map_buffer_format(ctx->data_pix_fmt);
2055  if (ctx->surfaces[idx].format == NV_ENC_BUFFER_FORMAT_UNDEFINED) {
2056  av_log(avctx, AV_LOG_FATAL, "Invalid input pixel format: %s\n",
2057  av_get_pix_fmt_name(ctx->data_pix_fmt));
2058  return AVERROR(EINVAL);
2059  }
2060 
2061  allocSurf.version = NV_ENC_CREATE_INPUT_BUFFER_VER;
2062  allocSurf.width = avctx->width;
2063  allocSurf.height = avctx->height;
2064  allocSurf.bufferFmt = ctx->surfaces[idx].format;
2065 
2066  nv_status = p_nvenc->nvEncCreateInputBuffer(ctx->nvencoder, &allocSurf);
2067  if (nv_status != NV_ENC_SUCCESS) {
2068  return nvenc_print_error(avctx, nv_status, "CreateInputBuffer failed");
2069  }
2070 
2071  ctx->surfaces[idx].input_surface = allocSurf.inputBuffer;
2072  ctx->surfaces[idx].width = allocSurf.width;
2073  ctx->surfaces[idx].height = allocSurf.height;
2074  }
2075 
2076  nv_status = p_nvenc->nvEncCreateBitstreamBuffer(ctx->nvencoder, &allocOut);
2077  if (nv_status != NV_ENC_SUCCESS) {
2078  int err = nvenc_print_error(avctx, nv_status, "CreateBitstreamBuffer failed");
2079  if (avctx->pix_fmt != AV_PIX_FMT_CUDA && avctx->pix_fmt != AV_PIX_FMT_D3D11)
2080  p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[idx].input_surface);
2081  av_frame_free(&ctx->surfaces[idx].in_ref);
2082  return err;
2083  }
2084 
2085  ctx->surfaces[idx].output_surface = allocOut.bitstreamBuffer;
2086 
2087  av_fifo_write(ctx->unused_surface_queue, &tmp_surface, 1);
2088 
2089  return 0;
2090 }
2091 
2093 {
2094  NvencContext *ctx = avctx->priv_data;
2095  int i, res = 0, res2;
2096 
2097  ctx->surfaces = av_calloc(ctx->nb_surfaces, sizeof(*ctx->surfaces));
2098  if (!ctx->surfaces)
2099  return AVERROR(ENOMEM);
2100 
2101  ctx->frame_data_array = av_calloc(ctx->frame_data_array_nb, sizeof(*ctx->frame_data_array));
2102  if (!ctx->frame_data_array)
2103  return AVERROR(ENOMEM);
2104 
2105  ctx->timestamp_list = av_fifo_alloc2(ctx->nb_surfaces + ctx->encode_config.frameIntervalP,
2106  sizeof(int64_t), 0);
2107  if (!ctx->timestamp_list)
2108  return AVERROR(ENOMEM);
2109 
2110  ctx->unused_surface_queue = av_fifo_alloc2(ctx->nb_surfaces, sizeof(NvencSurface*), 0);
2111  if (!ctx->unused_surface_queue)
2112  return AVERROR(ENOMEM);
2113 
2114  ctx->output_surface_queue = av_fifo_alloc2(ctx->nb_surfaces, sizeof(NvencSurface*), 0);
2115  if (!ctx->output_surface_queue)
2116  return AVERROR(ENOMEM);
2117  ctx->output_surface_ready_queue = av_fifo_alloc2(ctx->nb_surfaces, sizeof(NvencSurface*), 0);
2118  if (!ctx->output_surface_ready_queue)
2119  return AVERROR(ENOMEM);
2120 
2121  res = nvenc_push_context(avctx);
2122  if (res < 0)
2123  return res;
2124 
2125  for (i = 0; i < ctx->nb_surfaces; i++) {
2126  if ((res = nvenc_alloc_surface(avctx, i)) < 0)
2127  goto fail;
2128  }
2129 
2130 fail:
2131  res2 = nvenc_pop_context(avctx);
2132  if (res2 < 0)
2133  return res2;
2134 
2135  return res;
2136 }
2137 
2139 {
2140  NvencContext *ctx = avctx->priv_data;
2141  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2142  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2143 
2144  NVENCSTATUS nv_status;
2145  uint32_t outSize = 0;
2146  char tmpHeader[NV_MAX_SEQ_HDR_LEN];
2147 
2148  NV_ENC_SEQUENCE_PARAM_PAYLOAD payload = { 0 };
2149  payload.version = NV_ENC_SEQUENCE_PARAM_PAYLOAD_VER;
2150 
2151  payload.spsppsBuffer = tmpHeader;
2152  payload.inBufferSize = sizeof(tmpHeader);
2153  payload.outSPSPPSPayloadSize = &outSize;
2154 
2155  nv_status = p_nvenc->nvEncGetSequenceParams(ctx->nvencoder, &payload);
2156  if (nv_status != NV_ENC_SUCCESS) {
2157  return nvenc_print_error(avctx, nv_status, "GetSequenceParams failed");
2158  }
2159 
2160  avctx->extradata_size = outSize;
2162 
2163  if (!avctx->extradata) {
2164  return AVERROR(ENOMEM);
2165  }
2166 
2167  memcpy(avctx->extradata, tmpHeader, outSize);
2168 
2169  return 0;
2170 }
2171 
2173 {
2174  NvencContext *ctx = avctx->priv_data;
2175  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2176  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2177  int i, res;
2178 
2179  /* the encoder has to be flushed before it can be closed */
2180  if (ctx->nvencoder) {
2181  NV_ENC_PIC_PARAMS params = { .version = NV_ENC_PIC_PARAMS_VER,
2182  .encodePicFlags = NV_ENC_PIC_FLAG_EOS };
2183 
2184  res = nvenc_push_context(avctx);
2185  if (res < 0)
2186  return res;
2187 
2188  p_nvenc->nvEncEncodePicture(ctx->nvencoder, &params);
2189  }
2190 
2191  av_fifo_freep2(&ctx->timestamp_list);
2192  av_fifo_freep2(&ctx->output_surface_ready_queue);
2193  av_fifo_freep2(&ctx->output_surface_queue);
2194  av_fifo_freep2(&ctx->unused_surface_queue);
2195 
2196  if (ctx->frame_data_array) {
2197  for (i = 0; i < ctx->frame_data_array_nb; i++)
2198  av_buffer_unref(&ctx->frame_data_array[i].frame_opaque_ref);
2199  av_freep(&ctx->frame_data_array);
2200  }
2201 
2202  if (ctx->surfaces && (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11)) {
2203  for (i = 0; i < ctx->nb_registered_frames; i++) {
2204  if (ctx->registered_frames[i].mapped)
2205  p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, ctx->registered_frames[i].in_map.mappedResource);
2206  if (ctx->registered_frames[i].regptr)
2207  p_nvenc->nvEncUnregisterResource(ctx->nvencoder, ctx->registered_frames[i].regptr);
2208  }
2209  ctx->nb_registered_frames = 0;
2210  }
2211 
2212  if (ctx->surfaces) {
2213  for (i = 0; i < ctx->nb_surfaces; ++i) {
2214  if (avctx->pix_fmt != AV_PIX_FMT_CUDA && avctx->pix_fmt != AV_PIX_FMT_D3D11)
2215  p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[i].input_surface);
2216  av_frame_free(&ctx->surfaces[i].in_ref);
2217  p_nvenc->nvEncDestroyBitstreamBuffer(ctx->nvencoder, ctx->surfaces[i].output_surface);
2218  }
2219  }
2220  av_freep(&ctx->surfaces);
2221  ctx->nb_surfaces = 0;
2222 
2223  av_frame_free(&ctx->frame);
2224 
2225  av_freep(&ctx->sei_data);
2226 
2227  if (ctx->nvencoder) {
2228  p_nvenc->nvEncDestroyEncoder(ctx->nvencoder);
2229 
2230  res = nvenc_pop_context(avctx);
2231  if (res < 0)
2232  return res;
2233  }
2234  ctx->nvencoder = NULL;
2235 
2236  if (ctx->cu_context_internal)
2237  CHECK_CU(dl_fn->cuda_dl->cuCtxDestroy(ctx->cu_context_internal));
2238  ctx->cu_context = ctx->cu_context_internal = NULL;
2239 
2240 #if CONFIG_D3D11VA
2241  if (ctx->d3d11_device) {
2242  ID3D11Device_Release(ctx->d3d11_device);
2243  ctx->d3d11_device = NULL;
2244  }
2245 #endif
2246 
2247  nvenc_free_functions(&dl_fn->nvenc_dl);
2248  cuda_free_functions(&dl_fn->cuda_dl);
2249 
2250  dl_fn->nvenc_device_count = 0;
2251 
2252  av_log(avctx, AV_LOG_VERBOSE, "Nvenc unloaded\n");
2253 
2254  return 0;
2255 }
2256 
2258 {
2259  NvencContext *ctx = avctx->priv_data;
2260  int ret;
2261 
2262  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2263  AVHWFramesContext *frames_ctx;
2264  if (!avctx->hw_frames_ctx) {
2265  av_log(avctx, AV_LOG_ERROR,
2266  "hw_frames_ctx must be set when using GPU frames as input\n");
2267  return AVERROR(EINVAL);
2268  }
2269  frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
2270  if (frames_ctx->format != avctx->pix_fmt) {
2271  av_log(avctx, AV_LOG_ERROR,
2272  "hw_frames_ctx must match the GPU frame type\n");
2273  return AVERROR(EINVAL);
2274  }
2275  ctx->data_pix_fmt = frames_ctx->sw_format;
2276  } else {
2277  ctx->data_pix_fmt = avctx->pix_fmt;
2278  }
2279 
2280  if (ctx->rgb_mode == NVENC_RGB_MODE_DISABLED && IS_RGB(ctx->data_pix_fmt)) {
2281  av_log(avctx, AV_LOG_ERROR, "Packed RGB input, but RGB support is disabled.\n");
2282  return AVERROR(EINVAL);
2283  }
2284 
2285  ctx->frame = av_frame_alloc();
2286  if (!ctx->frame)
2287  return AVERROR(ENOMEM);
2288 
2289  if ((ret = nvenc_load_libraries(avctx)) < 0)
2290  return ret;
2291 
2292  if ((ret = nvenc_setup_device(avctx)) < 0)
2293  return ret;
2294 
2295  if ((ret = nvenc_setup_encoder(avctx)) < 0)
2296  return ret;
2297 
2298  if ((ret = nvenc_setup_surfaces(avctx)) < 0)
2299  return ret;
2300 
2301  if (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) {
2302  if ((ret = nvenc_setup_extradata(avctx)) < 0)
2303  return ret;
2304  }
2305 
2306  return 0;
2307 }
2308 
2310 {
2311  NvencSurface *tmp_surf;
2312 
2313  if (av_fifo_read(ctx->unused_surface_queue, &tmp_surf, 1) < 0)
2314  // queue empty
2315  return NULL;
2316 
2317  return tmp_surf;
2318 }
2319 
2320 static int nvenc_copy_frame(AVCodecContext *avctx, NvencSurface *nv_surface,
2321  NV_ENC_LOCK_INPUT_BUFFER *lock_buffer_params, const AVFrame *frame)
2322 {
2323  int dst_linesize[4] = {
2324  lock_buffer_params->pitch,
2325  lock_buffer_params->pitch,
2326  lock_buffer_params->pitch,
2327  lock_buffer_params->pitch
2328  };
2329  uint8_t *dst_data[4];
2330  int ret;
2331 
2332  if (frame->format == AV_PIX_FMT_YUV420P)
2333  dst_linesize[1] = dst_linesize[2] >>= 1;
2334 
2335  ret = av_image_fill_pointers(dst_data, frame->format, nv_surface->height,
2336  lock_buffer_params->bufferDataPtr, dst_linesize);
2337  if (ret < 0)
2338  return ret;
2339 
2340  if (frame->format == AV_PIX_FMT_YUV420P)
2341  FFSWAP(uint8_t*, dst_data[1], dst_data[2]);
2342 
2343  av_image_copy2(dst_data, dst_linesize,
2344  frame->data, frame->linesize, frame->format,
2345  avctx->width, avctx->height);
2346 
2347  return 0;
2348 }
2349 
2351 {
2352  NvencContext *ctx = avctx->priv_data;
2353  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2354  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2355  NVENCSTATUS nv_status;
2356 
2357  int i, first_round;
2358 
2359  if (ctx->nb_registered_frames == FF_ARRAY_ELEMS(ctx->registered_frames)) {
2360  for (first_round = 1; first_round >= 0; first_round--) {
2361  for (i = 0; i < ctx->nb_registered_frames; i++) {
2362  if (!ctx->registered_frames[i].mapped) {
2363  if (ctx->registered_frames[i].regptr) {
2364  if (first_round)
2365  continue;
2366  nv_status = p_nvenc->nvEncUnregisterResource(ctx->nvencoder, ctx->registered_frames[i].regptr);
2367  if (nv_status != NV_ENC_SUCCESS)
2368  return nvenc_print_error(avctx, nv_status, "Failed unregistering unused input resource");
2369  ctx->registered_frames[i].ptr = NULL;
2370  ctx->registered_frames[i].regptr = NULL;
2371  }
2372  return i;
2373  }
2374  }
2375  }
2376  } else {
2377  return ctx->nb_registered_frames++;
2378  }
2379 
2380  av_log(avctx, AV_LOG_ERROR, "Too many registered CUDA frames\n");
2381  return AVERROR(ENOMEM);
2382 }
2383 
2385 {
2386  NvencContext *ctx = avctx->priv_data;
2387  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2388  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2389 
2390  AVHWFramesContext *frames_ctx = (AVHWFramesContext*)frame->hw_frames_ctx->data;
2391  NV_ENC_REGISTER_RESOURCE reg = { 0 };
2392  int i, idx, ret;
2393 
2394  for (i = 0; i < ctx->nb_registered_frames; i++) {
2395  if (avctx->pix_fmt == AV_PIX_FMT_CUDA && ctx->registered_frames[i].ptr == frame->data[0])
2396  return i;
2397  else if (avctx->pix_fmt == AV_PIX_FMT_D3D11 && ctx->registered_frames[i].ptr == frame->data[0] && ctx->registered_frames[i].ptr_index == (intptr_t)frame->data[1])
2398  return i;
2399  }
2400 
2401  idx = nvenc_find_free_reg_resource(avctx);
2402  if (idx < 0)
2403  return idx;
2404 
2405  reg.version = NV_ENC_REGISTER_RESOURCE_VER;
2406  reg.width = frames_ctx->width;
2407  reg.height = frames_ctx->height;
2408  reg.pitch = frame->linesize[0];
2409  reg.resourceToRegister = frame->data[0];
2410 
2411  if (avctx->pix_fmt == AV_PIX_FMT_CUDA) {
2412  reg.resourceType = NV_ENC_INPUT_RESOURCE_TYPE_CUDADEVICEPTR;
2413  }
2414  else if (avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2415  reg.resourceType = NV_ENC_INPUT_RESOURCE_TYPE_DIRECTX;
2416  reg.subResourceIndex = (intptr_t)frame->data[1];
2417  }
2418 
2419  reg.bufferFormat = nvenc_map_buffer_format(frames_ctx->sw_format);
2420  if (reg.bufferFormat == NV_ENC_BUFFER_FORMAT_UNDEFINED) {
2421  av_log(avctx, AV_LOG_FATAL, "Invalid input pixel format: %s\n",
2422  av_get_pix_fmt_name(frames_ctx->sw_format));
2423  return AVERROR(EINVAL);
2424  }
2425 
2426  ret = p_nvenc->nvEncRegisterResource(ctx->nvencoder, &reg);
2427  if (ret != NV_ENC_SUCCESS) {
2428  nvenc_print_error(avctx, ret, "Error registering an input resource");
2429  return AVERROR_UNKNOWN;
2430  }
2431 
2432  ctx->registered_frames[idx].ptr = frame->data[0];
2433  ctx->registered_frames[idx].ptr_index = reg.subResourceIndex;
2434  ctx->registered_frames[idx].regptr = reg.registeredResource;
2435  return idx;
2436 }
2437 
2439  NvencSurface *nvenc_frame)
2440 {
2441  NvencContext *ctx = avctx->priv_data;
2442  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2443  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2444 
2445  int res;
2446  NVENCSTATUS nv_status;
2447 
2448  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2449  int reg_idx = nvenc_register_frame(avctx, frame);
2450  if (reg_idx < 0) {
2451  av_log(avctx, AV_LOG_ERROR, "Could not register an input HW frame\n");
2452  return reg_idx;
2453  }
2454 
2455  res = av_frame_ref(nvenc_frame->in_ref, frame);
2456  if (res < 0)
2457  return res;
2458 
2459  if (!ctx->registered_frames[reg_idx].mapped) {
2460  ctx->registered_frames[reg_idx].in_map.version = NV_ENC_MAP_INPUT_RESOURCE_VER;
2461  ctx->registered_frames[reg_idx].in_map.registeredResource = ctx->registered_frames[reg_idx].regptr;
2462  nv_status = p_nvenc->nvEncMapInputResource(ctx->nvencoder, &ctx->registered_frames[reg_idx].in_map);
2463  if (nv_status != NV_ENC_SUCCESS) {
2464  av_frame_unref(nvenc_frame->in_ref);
2465  return nvenc_print_error(avctx, nv_status, "Error mapping an input resource");
2466  }
2467  }
2468 
2469  ctx->registered_frames[reg_idx].mapped += 1;
2470 
2471  nvenc_frame->reg_idx = reg_idx;
2472  nvenc_frame->input_surface = ctx->registered_frames[reg_idx].in_map.mappedResource;
2473  nvenc_frame->format = ctx->registered_frames[reg_idx].in_map.mappedBufferFmt;
2474  nvenc_frame->pitch = frame->linesize[0];
2475 
2476  return 0;
2477  } else {
2478  NV_ENC_LOCK_INPUT_BUFFER lockBufferParams = { 0 };
2479 
2480  lockBufferParams.version = NV_ENC_LOCK_INPUT_BUFFER_VER;
2481  lockBufferParams.inputBuffer = nvenc_frame->input_surface;
2482 
2483  nv_status = p_nvenc->nvEncLockInputBuffer(ctx->nvencoder, &lockBufferParams);
2484  if (nv_status != NV_ENC_SUCCESS) {
2485  return nvenc_print_error(avctx, nv_status, "Failed locking nvenc input buffer");
2486  }
2487 
2488  nvenc_frame->pitch = lockBufferParams.pitch;
2489  res = nvenc_copy_frame(avctx, nvenc_frame, &lockBufferParams, frame);
2490 
2491  nv_status = p_nvenc->nvEncUnlockInputBuffer(ctx->nvencoder, nvenc_frame->input_surface);
2492  if (nv_status != NV_ENC_SUCCESS) {
2493  return nvenc_print_error(avctx, nv_status, "Failed unlocking input buffer!");
2494  }
2495 
2496  return res;
2497  }
2498 }
2499 
2500 #ifdef NVENC_HAVE_TIME_CODE
2501 static void nvenc_fill_time_code(AVCodecContext *avctx, const AVFrame *frame, NV_ENC_TIME_CODE *time_code)
2502 {
2504 
2505  if (sd) {
2506  uint32_t *tc = (uint32_t*)sd->data;
2507  int cnt = FFMIN(tc[0], FF_ARRAY_ELEMS(time_code->clockTimestamp));
2508 
2509  switch (cnt) {
2510  case 0:
2511  time_code->displayPicStruct = NV_ENC_PIC_STRUCT_DISPLAY_FRAME;
2512  time_code->skipClockTimestampInsertion = 1;
2513  break;
2514  case 2:
2515  time_code->displayPicStruct = NV_ENC_PIC_STRUCT_DISPLAY_FRAME_DOUBLING;
2516  break;
2517  case 3:
2518  time_code->displayPicStruct = NV_ENC_PIC_STRUCT_DISPLAY_FRAME_TRIPLING;
2519  break;
2520  default:
2521  time_code->displayPicStruct = NV_ENC_PIC_STRUCT_DISPLAY_FRAME;
2522  break;
2523  }
2524 
2525  for (int i = 0; i < cnt; i++) {
2526  unsigned hh, mm, ss, ff, drop;
2527  ff_timecode_set_smpte(&drop, &hh, &mm, &ss, &ff, avctx->framerate, tc[i + 1], 0, 0);
2528 
2529  time_code->clockTimestamp[i].countingType = 0;
2530  time_code->clockTimestamp[i].discontinuityFlag = 0;
2531  time_code->clockTimestamp[i].cntDroppedFrames = drop;
2532  time_code->clockTimestamp[i].nFrames = ff;
2533  time_code->clockTimestamp[i].secondsValue = ss;
2534  time_code->clockTimestamp[i].minutesValue = mm;
2535  time_code->clockTimestamp[i].hoursValue = hh;
2536  time_code->clockTimestamp[i].timeOffset = 0;
2537  }
2538  } else {
2539  time_code->displayPicStruct = NV_ENC_PIC_STRUCT_DISPLAY_FRAME;
2540  time_code->skipClockTimestampInsertion = 1;
2541  }
2542 }
2543 #endif
2544 
2546  NV_ENC_PIC_PARAMS *params,
2547  NV_ENC_SEI_PAYLOAD *sei_data,
2548  int sei_count)
2549 {
2550  NvencContext *ctx = avctx->priv_data;
2551 
2552  switch (avctx->codec->id) {
2553  case AV_CODEC_ID_H264:
2554  params->codecPicParams.h264PicParams.sliceMode =
2555  ctx->encode_config.encodeCodecConfig.h264Config.sliceMode;
2556  params->codecPicParams.h264PicParams.sliceModeData =
2557  ctx->encode_config.encodeCodecConfig.h264Config.sliceModeData;
2558  if (sei_count > 0) {
2559  params->codecPicParams.h264PicParams.seiPayloadArray = sei_data;
2560  params->codecPicParams.h264PicParams.seiPayloadArrayCnt = sei_count;
2561  }
2562 
2563 #ifdef NVENC_HAVE_TIME_CODE
2564  if (ctx->s12m_tc)
2565  nvenc_fill_time_code(avctx, frame, &params->codecPicParams.h264PicParams.timeCode);
2566 #endif
2567 
2568  break;
2569  case AV_CODEC_ID_HEVC:
2570  params->codecPicParams.hevcPicParams.sliceMode =
2571  ctx->encode_config.encodeCodecConfig.hevcConfig.sliceMode;
2572  params->codecPicParams.hevcPicParams.sliceModeData =
2573  ctx->encode_config.encodeCodecConfig.hevcConfig.sliceModeData;
2574  if (sei_count > 0) {
2575  params->codecPicParams.hevcPicParams.seiPayloadArray = sei_data;
2576  params->codecPicParams.hevcPicParams.seiPayloadArrayCnt = sei_count;
2577  }
2578 
2579  break;
2580 #if CONFIG_AV1_NVENC_ENCODER
2581  case AV_CODEC_ID_AV1:
2582  params->codecPicParams.av1PicParams.numTileColumns =
2583  ctx->encode_config.encodeCodecConfig.av1Config.numTileColumns;
2584  params->codecPicParams.av1PicParams.numTileRows =
2585  ctx->encode_config.encodeCodecConfig.av1Config.numTileRows;
2586  if (sei_count > 0) {
2587  params->codecPicParams.av1PicParams.obuPayloadArray = sei_data;
2588  params->codecPicParams.av1PicParams.obuPayloadArrayCnt = sei_count;
2589  }
2590 
2591  break;
2592 #endif
2593  }
2594 }
2595 
2596 static inline void timestamp_queue_enqueue(AVFifo *queue, int64_t timestamp)
2597 {
2598  av_fifo_write(queue, &timestamp, 1);
2599 }
2600 
2602 {
2603  int64_t timestamp = AV_NOPTS_VALUE;
2604  // The following call might fail if the queue is empty.
2605  av_fifo_read(queue, &timestamp, 1);
2606 
2607  return timestamp;
2608 }
2609 
2610 static inline int64_t timestamp_queue_peek(AVFifo *queue, size_t index)
2611 {
2612  int64_t timestamp = AV_NOPTS_VALUE;
2613  av_fifo_peek(queue, &timestamp, 1, index);
2614 
2615  return timestamp;
2616 }
2617 
2619  NV_ENC_LOCK_BITSTREAM *params,
2620  AVPacket *pkt)
2621 {
2622  NvencContext *ctx = avctx->priv_data;
2623  unsigned int delay;
2624  int64_t delay_time;
2625 
2626  pkt->pts = params->outputTimeStamp;
2627 
2628  if (!(avctx->codec_descriptor->props & AV_CODEC_PROP_REORDER)) {
2629  pkt->dts = pkt->pts;
2630  return 0;
2631  }
2632 
2633  // This can be more than necessary, but we don't know the real reorder delay.
2634  delay = FFMAX(ctx->encode_config.frameIntervalP - 1, 0);
2635 #ifdef NVENC_HAVE_MVHEVC
2636  delay *= ctx->multiview ? 2 : 1;
2637 #endif
2638  if (ctx->output_frame_num >= delay) {
2639  pkt->dts = timestamp_queue_dequeue(ctx->timestamp_list);
2640  ctx->output_frame_num++;
2641  return 0;
2642  }
2643 
2644  delay_time = ctx->initial_delay_time;
2645  if (!delay_time) {
2646  int64_t t1, t2, t3;
2647  t1 = timestamp_queue_peek(ctx->timestamp_list, delay);
2648  t2 = timestamp_queue_peek(ctx->timestamp_list, 0);
2649  t3 = (delay > 1) ? timestamp_queue_peek(ctx->timestamp_list, 1) : t1;
2650 
2651  if (t1 != AV_NOPTS_VALUE) {
2652  delay_time = t1 - t2;
2653  } else if (avctx->framerate.num > 0 && avctx->framerate.den > 0) {
2654  delay_time = av_rescale_q(delay, (AVRational) {avctx->framerate.den, avctx->framerate.num},
2655  avctx->time_base);
2656  } else if (t3 != AV_NOPTS_VALUE) {
2657  delay_time = delay * (t3 - t2);
2658  } else {
2659  delay_time = delay;
2660  }
2661  ctx->initial_delay_time = delay_time;
2662  }
2663 
2664  /* The following method is simple, but doesn't guarantee monotonic with VFR
2665  * when delay_time isn't accurate (that is, t1 == AV_NOPTS_VALUE)
2666  *
2667  * dts = timestamp_queue_peek(ctx->timestamp_list, ctx->output_frame_num) - delay_time
2668  */
2669  pkt->dts = timestamp_queue_peek(ctx->timestamp_list, 0) - delay_time * (delay - ctx->output_frame_num) / delay;
2670  ctx->output_frame_num++;
2671 
2672  return 0;
2673 }
2674 
2675 static int nvenc_store_frame_data(AVCodecContext *avctx, NV_ENC_PIC_PARAMS *pic_params, const AVFrame *frame)
2676 {
2677  NvencContext *ctx = avctx->priv_data;
2678  int res = 0;
2679 
2680  int idx = ctx->frame_data_array_pos;
2681  NvencFrameData *frame_data = &ctx->frame_data_array[idx];
2682 
2683  // in case the encoder got reconfigured, there might be leftovers
2685 
2686  if (frame->opaque_ref && avctx->flags & AV_CODEC_FLAG_COPY_OPAQUE) {
2689  return AVERROR(ENOMEM);
2690  }
2691 
2692  frame_data->duration = frame->duration;
2693  frame_data->frame_opaque = frame->opaque;
2694 
2695  ctx->frame_data_array_pos = (ctx->frame_data_array_pos + 1) % ctx->frame_data_array_nb;
2696  pic_params->inputDuration = idx;
2697 
2698  return res;
2699 }
2700 
2701 static int nvenc_retrieve_frame_data(AVCodecContext *avctx, NV_ENC_LOCK_BITSTREAM *lock_params, AVPacket *pkt)
2702 {
2703  NvencContext *ctx = avctx->priv_data;
2704  int res = 0;
2705 
2706  int idx = lock_params->outputDuration;
2707  NvencFrameData *frame_data = &ctx->frame_data_array[idx];
2708 
2710 
2711  if (avctx->flags & AV_CODEC_FLAG_COPY_OPAQUE) {
2715  }
2716 
2718 
2719  return res;
2720 }
2721 
2723 {
2724  NvencContext *ctx = avctx->priv_data;
2725  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2726  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2727 
2728  NV_ENC_LOCK_BITSTREAM lock_params = { 0 };
2729  NVENCSTATUS nv_status;
2730  int res = 0;
2731 
2732  enum AVPictureType pict_type;
2733 
2734  lock_params.version = NV_ENC_LOCK_BITSTREAM_VER;
2735 
2736  lock_params.doNotWait = 0;
2737  lock_params.outputBitstream = tmpoutsurf->output_surface;
2738 
2739  nv_status = p_nvenc->nvEncLockBitstream(ctx->nvencoder, &lock_params);
2740  if (nv_status != NV_ENC_SUCCESS) {
2741  res = nvenc_print_error(avctx, nv_status, "Failed locking bitstream buffer");
2742  goto error;
2743  }
2744 
2745  res = ff_get_encode_buffer(avctx, pkt, lock_params.bitstreamSizeInBytes, 0);
2746 
2747  if (res < 0) {
2748  p_nvenc->nvEncUnlockBitstream(ctx->nvencoder, tmpoutsurf->output_surface);
2749  goto error;
2750  }
2751 
2752  memcpy(pkt->data, lock_params.bitstreamBufferPtr, lock_params.bitstreamSizeInBytes);
2753 
2754  nv_status = p_nvenc->nvEncUnlockBitstream(ctx->nvencoder, tmpoutsurf->output_surface);
2755  if (nv_status != NV_ENC_SUCCESS) {
2756  res = nvenc_print_error(avctx, nv_status, "Failed unlocking bitstream buffer, expect the gates of mordor to open");
2757  goto error;
2758  }
2759 
2760 
2761  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2762  ctx->registered_frames[tmpoutsurf->reg_idx].mapped -= 1;
2763  if (ctx->registered_frames[tmpoutsurf->reg_idx].mapped == 0) {
2764  nv_status = p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, ctx->registered_frames[tmpoutsurf->reg_idx].in_map.mappedResource);
2765  if (nv_status != NV_ENC_SUCCESS) {
2766  res = nvenc_print_error(avctx, nv_status, "Failed unmapping input resource");
2767  goto error;
2768  }
2769  } else if (ctx->registered_frames[tmpoutsurf->reg_idx].mapped < 0) {
2770  res = AVERROR_BUG;
2771  goto error;
2772  }
2773 
2774  av_frame_unref(tmpoutsurf->in_ref);
2775 
2776  tmpoutsurf->input_surface = NULL;
2777  }
2778 
2779  switch (lock_params.pictureType) {
2780  case NV_ENC_PIC_TYPE_IDR:
2782  case NV_ENC_PIC_TYPE_I:
2783  pict_type = AV_PICTURE_TYPE_I;
2784  break;
2785  case NV_ENC_PIC_TYPE_P:
2786  pict_type = AV_PICTURE_TYPE_P;
2787  break;
2788  case NV_ENC_PIC_TYPE_B:
2789  pict_type = AV_PICTURE_TYPE_B;
2790  break;
2791  case NV_ENC_PIC_TYPE_BI:
2792  pict_type = AV_PICTURE_TYPE_BI;
2793  break;
2794  default:
2795  av_log(avctx, AV_LOG_ERROR, "Unknown picture type encountered, expect the output to be broken.\n");
2796  av_log(avctx, AV_LOG_ERROR, "Please report this error and include as much information on how to reproduce it as possible.\n");
2797  res = AVERROR_EXTERNAL;
2798  goto error;
2799  }
2800 
2802  (lock_params.frameAvgQP - 1) * FF_QP2LAMBDA, NULL, 0, pict_type);
2803 
2804  res = nvenc_set_timestamp(avctx, &lock_params, pkt);
2805  if (res < 0)
2806  goto error2;
2807 
2808  res = nvenc_retrieve_frame_data(avctx, &lock_params, pkt);
2809  if (res < 0)
2810  goto error2;
2811 
2812  return 0;
2813 
2814 error:
2815  timestamp_queue_dequeue(ctx->timestamp_list);
2816 
2817 error2:
2818  return res;
2819 }
2820 
2821 static int output_ready(AVCodecContext *avctx, int flush)
2822 {
2823  NvencContext *ctx = avctx->priv_data;
2824  int nb_ready, nb_pending;
2825 
2826  nb_ready = av_fifo_can_read(ctx->output_surface_ready_queue);
2827  nb_pending = av_fifo_can_read(ctx->output_surface_queue);
2828  if (flush)
2829  return nb_ready > 0;
2830  return (nb_ready > 0) && (nb_ready + nb_pending >= ctx->async_depth);
2831 }
2832 
2834 {
2835  NvencContext *ctx = avctx->priv_data;
2836  int sei_count = 0;
2837  int i, res;
2838 
2840  void *a53_data = NULL;
2841  size_t a53_size = 0;
2842 
2843  if (ff_alloc_a53_sei(frame, 0, &a53_data, &a53_size) < 0) {
2844  av_log(ctx, AV_LOG_ERROR, "Not enough memory for closed captions, skipping\n");
2845  }
2846 
2847  if (a53_data) {
2848  void *tmp = av_fast_realloc(ctx->sei_data,
2849  &ctx->sei_data_size,
2850  (sei_count + 1) * sizeof(*ctx->sei_data));
2851  if (!tmp) {
2852  av_free(a53_data);
2853  res = AVERROR(ENOMEM);
2854  goto error;
2855  } else {
2856  ctx->sei_data = tmp;
2857  ctx->sei_data[sei_count].payloadSize = (uint32_t)a53_size;
2858  ctx->sei_data[sei_count].payload = (uint8_t*)a53_data;
2859 
2860 #if CONFIG_AV1_NVENC_ENCODER
2861  if (avctx->codec->id == AV_CODEC_ID_AV1)
2862  ctx->sei_data[sei_count].payloadType = AV1_METADATA_TYPE_ITUT_T35;
2863  else
2864 #endif
2865  ctx->sei_data[sei_count].payloadType = SEI_TYPE_USER_DATA_REGISTERED_ITU_T_T35;
2866 
2867  sei_count++;
2868  }
2869  }
2870  }
2871 
2873  void *tc_data = NULL;
2874  size_t tc_size = 0;
2875 
2876  if (ff_alloc_timecode_sei(frame, avctx->framerate, 0, &tc_data, &tc_size) < 0) {
2877  av_log(ctx, AV_LOG_ERROR, "Not enough memory for timecode sei, skipping\n");
2878  }
2879 
2880  if (tc_data) {
2881  void *tmp = av_fast_realloc(ctx->sei_data,
2882  &ctx->sei_data_size,
2883  (sei_count + 1) * sizeof(*ctx->sei_data));
2884  if (!tmp) {
2885  av_free(tc_data);
2886  res = AVERROR(ENOMEM);
2887  goto error;
2888  } else {
2889  ctx->sei_data = tmp;
2890  ctx->sei_data[sei_count].payloadSize = (uint32_t)tc_size;
2891  ctx->sei_data[sei_count].payload = (uint8_t*)tc_data;
2892 
2893 #if CONFIG_AV1_NVENC_ENCODER
2894  if (avctx->codec->id == AV_CODEC_ID_AV1)
2895  ctx->sei_data[sei_count].payloadType = AV1_METADATA_TYPE_TIMECODE;
2896  else
2897 #endif
2898  ctx->sei_data[sei_count].payloadType = SEI_TYPE_TIME_CODE;
2899 
2900  sei_count++;
2901  }
2902  }
2903  }
2904 
2905  if (!ctx->udu_sei)
2906  return sei_count;
2907 
2908  for (i = 0; i < frame->nb_side_data; i++) {
2909  AVFrameSideData *side_data = frame->side_data[i];
2910  void *tmp;
2911 
2912  if (side_data->type != AV_FRAME_DATA_SEI_UNREGISTERED)
2913  continue;
2914 
2915  tmp = av_fast_realloc(ctx->sei_data,
2916  &ctx->sei_data_size,
2917  (sei_count + 1) * sizeof(*ctx->sei_data));
2918  if (!tmp) {
2919  res = AVERROR(ENOMEM);
2920  goto error;
2921  } else {
2922  ctx->sei_data = tmp;
2923  ctx->sei_data[sei_count].payloadSize = side_data->size;
2924  ctx->sei_data[sei_count].payloadType = SEI_TYPE_USER_DATA_UNREGISTERED;
2925  ctx->sei_data[sei_count].payload = av_memdup(side_data->data, side_data->size);
2926 
2927  if (!ctx->sei_data[sei_count].payload) {
2928  res = AVERROR(ENOMEM);
2929  goto error;
2930  }
2931 
2932  sei_count++;
2933  }
2934  }
2935 
2936  return sei_count;
2937 
2938 error:
2939  for (i = 0; i < sei_count; i++)
2940  av_freep(&(ctx->sei_data[i].payload));
2941 
2942  return res;
2943 }
2944 
2945 static void reconfig_encoder(AVCodecContext *avctx, const AVFrame *frame)
2946 {
2947  NvencContext *ctx = avctx->priv_data;
2948  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
2949  NVENCSTATUS ret;
2950 
2951  NV_ENC_RECONFIGURE_PARAMS params = { 0 };
2952  int needs_reconfig = 0;
2953  int needs_encode_config = 0;
2954  int reconfig_bitrate = 0, reconfig_dar = 0;
2955  int dw, dh;
2956 
2957  params.version = NV_ENC_RECONFIGURE_PARAMS_VER;
2958  params.reInitEncodeParams = ctx->init_encode_params;
2959 
2960  compute_dar(avctx, &dw, &dh);
2961  if (dw != ctx->init_encode_params.darWidth || dh != ctx->init_encode_params.darHeight) {
2962  av_log(avctx, AV_LOG_VERBOSE,
2963  "aspect ratio change (DAR): %d:%d -> %d:%d\n",
2964  ctx->init_encode_params.darWidth,
2965  ctx->init_encode_params.darHeight, dw, dh);
2966 
2967  params.reInitEncodeParams.darHeight = dh;
2968  params.reInitEncodeParams.darWidth = dw;
2969 
2970  needs_reconfig = 1;
2971  reconfig_dar = 1;
2972  }
2973 
2974  if (ctx->rc != NV_ENC_PARAMS_RC_CONSTQP && ctx->support_dyn_bitrate) {
2975  if (avctx->bit_rate > 0 && params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate != avctx->bit_rate) {
2976  av_log(avctx, AV_LOG_VERBOSE,
2977  "avg bitrate change: %d -> %d\n",
2978  params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate,
2979  (uint32_t)avctx->bit_rate);
2980 
2981  params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate = avctx->bit_rate;
2982  reconfig_bitrate = 1;
2983  }
2984 
2985  if (avctx->rc_max_rate > 0 && ctx->encode_config.rcParams.maxBitRate != avctx->rc_max_rate) {
2986  av_log(avctx, AV_LOG_VERBOSE,
2987  "max bitrate change: %d -> %d\n",
2988  params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate,
2989  (uint32_t)avctx->rc_max_rate);
2990 
2991  params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate = avctx->rc_max_rate;
2992  reconfig_bitrate = 1;
2993  }
2994 
2995  if (avctx->rc_buffer_size > 0 && ctx->encode_config.rcParams.vbvBufferSize != avctx->rc_buffer_size) {
2996  av_log(avctx, AV_LOG_VERBOSE,
2997  "vbv buffer size change: %d -> %d\n",
2998  params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize,
2999  avctx->rc_buffer_size);
3000 
3001  params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize = avctx->rc_buffer_size;
3002  reconfig_bitrate = 1;
3003  }
3004 
3005  if (reconfig_bitrate) {
3006  params.resetEncoder = 1;
3007  params.forceIDR = 1;
3008 
3009  needs_encode_config = 1;
3010  needs_reconfig = 1;
3011  }
3012  }
3013 
3014  if (!needs_encode_config)
3015  params.reInitEncodeParams.encodeConfig = NULL;
3016 
3017  if (needs_reconfig) {
3018  ret = p_nvenc->nvEncReconfigureEncoder(ctx->nvencoder, &params);
3019  if (ret != NV_ENC_SUCCESS) {
3020  nvenc_print_error(avctx, ret, "failed to reconfigure nvenc");
3021  } else {
3022  if (reconfig_dar) {
3023  ctx->init_encode_params.darHeight = dh;
3024  ctx->init_encode_params.darWidth = dw;
3025  }
3026 
3027  if (reconfig_bitrate) {
3028  ctx->encode_config.rcParams.averageBitRate = params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate;
3029  ctx->encode_config.rcParams.maxBitRate = params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate;
3030  ctx->encode_config.rcParams.vbvBufferSize = params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize;
3031  }
3032 
3033  }
3034  }
3035 }
3036 
3037 #ifdef NVENC_HAVE_HEVC_AND_AV1_MASTERING_METADATA
3038 static int nvenc_set_mastering_display_data(AVCodecContext *avctx, const AVFrame *frame, NV_ENC_PIC_PARAMS *pic_params,
3039  MASTERING_DISPLAY_INFO *mastering_disp_info, CONTENT_LIGHT_LEVEL *content_light_level)
3040 {
3041  NvencContext *ctx = avctx->priv_data;
3042 
3043  if (ctx->mdm || ctx->cll) {
3046  const int chroma_den = (avctx->codec->id == AV_CODEC_ID_AV1) ? 1 << 16 : 50000;
3047  const int max_luma_den = (avctx->codec->id == AV_CODEC_ID_AV1) ? 1 << 8 : 10000;
3048  const int min_luma_den = (avctx->codec->id == AV_CODEC_ID_AV1) ? 1 << 14 : 10000;
3049 
3050  if (!sd_mdm)
3051  sd_mdm = av_frame_side_data_get(avctx->decoded_side_data,
3052  avctx->nb_decoded_side_data,
3054  if (!sd_cll)
3055  sd_cll = av_frame_side_data_get(avctx->decoded_side_data,
3056  avctx->nb_decoded_side_data,
3058 
3059  if (sd_mdm) {
3061 
3062  mastering_disp_info->r.x = av_rescale(mdm->display_primaries[0][0].num, chroma_den,
3063  mdm->display_primaries[0][0].den);
3064  mastering_disp_info->r.y = av_rescale(mdm->display_primaries[0][1].num, chroma_den,
3065  mdm->display_primaries[0][1].den);
3066  mastering_disp_info->g.x = av_rescale(mdm->display_primaries[1][0].num, chroma_den,
3067  mdm->display_primaries[1][0].den);
3068  mastering_disp_info->g.y = av_rescale(mdm->display_primaries[1][1].num, chroma_den,
3069  mdm->display_primaries[1][1].den);
3070  mastering_disp_info->b.x = av_rescale(mdm->display_primaries[2][0].num, chroma_den,
3071  mdm->display_primaries[2][0].den);
3072  mastering_disp_info->b.y = av_rescale(mdm->display_primaries[2][1].num, chroma_den,
3073  mdm->display_primaries[2][1].den);
3074  mastering_disp_info->whitePoint.x = av_rescale(mdm->white_point[0].num, chroma_den,
3075  mdm->white_point[0].den);
3076  mastering_disp_info->whitePoint.y = av_rescale(mdm->white_point[1].num, chroma_den,
3077  mdm->white_point[1].den);
3078  mastering_disp_info->maxLuma = av_rescale(mdm->max_luminance.num, max_luma_den,
3079  mdm->max_luminance.den);
3080  mastering_disp_info->minLuma = av_rescale(mdm->min_luminance.num, min_luma_den,
3081  mdm->min_luminance.den);
3082 
3083  if (avctx->codec->id == AV_CODEC_ID_HEVC)
3084  pic_params->codecPicParams.hevcPicParams.pMasteringDisplay = mastering_disp_info;
3085  else if (avctx->codec->id == AV_CODEC_ID_AV1)
3086  pic_params->codecPicParams.av1PicParams.pMasteringDisplay = mastering_disp_info;
3087  else
3088  return AVERROR_BUG;
3089  }
3090  if (sd_cll) {
3091  const AVContentLightMetadata *cll = (AVContentLightMetadata *)sd_cll->data;
3092 
3093  content_light_level->maxContentLightLevel = cll->MaxCLL;
3094  content_light_level->maxPicAverageLightLevel = cll->MaxFALL;
3095 
3096  if (avctx->codec->id == AV_CODEC_ID_HEVC)
3097  pic_params->codecPicParams.hevcPicParams.pMaxCll = content_light_level;
3098  else if (avctx->codec->id == AV_CODEC_ID_AV1)
3099  pic_params->codecPicParams.av1PicParams.pMaxCll = content_light_level;
3100  else
3101  return AVERROR_BUG;
3102  }
3103  }
3104 
3105  return 0;
3106 }
3107 #endif
3108 
3109 static int nvenc_send_frame(AVCodecContext *avctx, const AVFrame *frame)
3110 {
3111  NVENCSTATUS nv_status;
3112  NvencSurface *tmp_out_surf, *in_surf;
3113  int res, res2;
3114  int sei_count = 0;
3115  int i;
3116 #ifdef NVENC_HAVE_HEVC_AND_AV1_MASTERING_METADATA
3117  MASTERING_DISPLAY_INFO mastering_disp_info = { 0 };
3118  CONTENT_LIGHT_LEVEL content_light_level = { 0 };
3119 #endif
3120 #ifdef NVENC_HAVE_MVHEVC
3121  HEVC_3D_REFERENCE_DISPLAY_INFO ref_disp_info = { 0 };
3122 #endif
3123 
3124  NvencContext *ctx = avctx->priv_data;
3125  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
3126  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
3127 
3128  NV_ENC_PIC_PARAMS pic_params = { 0 };
3129  pic_params.version = NV_ENC_PIC_PARAMS_VER;
3130 
3131  if ((!ctx->cu_context && !ctx->d3d11_device) || !ctx->nvencoder)
3132  return AVERROR(EINVAL);
3133 
3134  if (frame && frame->buf[0]) {
3135  in_surf = get_free_frame(ctx);
3136  if (!in_surf)
3137  return AVERROR(EAGAIN);
3138 
3139  res = nvenc_push_context(avctx);
3140  if (res < 0)
3141  return res;
3142 
3143  reconfig_encoder(avctx, frame);
3144 
3145  res = nvenc_upload_frame(avctx, frame, in_surf);
3146 
3147  res2 = nvenc_pop_context(avctx);
3148  if (res2 < 0)
3149  return res2;
3150 
3151  if (res)
3152  return res;
3153 
3154  pic_params.inputBuffer = in_surf->input_surface;
3155  pic_params.bufferFmt = in_surf->format;
3156  pic_params.inputWidth = in_surf->width;
3157  pic_params.inputHeight = in_surf->height;
3158  pic_params.inputPitch = in_surf->pitch;
3159  pic_params.outputBitstream = in_surf->output_surface;
3160 
3161  if (avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
3162  if (frame->flags & AV_FRAME_FLAG_TOP_FIELD_FIRST)
3163  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FIELD_TOP_BOTTOM;
3164  else
3165  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FIELD_BOTTOM_TOP;
3166  } else {
3167  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FRAME;
3168  }
3169 
3170  if (ctx->forced_idr >= 0 && frame->pict_type == AV_PICTURE_TYPE_I) {
3171  pic_params.encodePicFlags =
3172  ctx->forced_idr ? NV_ENC_PIC_FLAG_FORCEIDR : NV_ENC_PIC_FLAG_FORCEINTRA;
3173  } else {
3174  pic_params.encodePicFlags = 0;
3175  }
3176 
3177  pic_params.frameIdx = ctx->frame_idx_counter++;
3178  pic_params.inputTimeStamp = frame->pts;
3179 
3180  if (ctx->extra_sei) {
3181  res = prepare_sei_data_array(avctx, frame);
3182  if (res < 0)
3183  return res;
3184  sei_count = res;
3185  }
3186 
3187 #ifdef NVENC_HAVE_HEVC_AND_AV1_MASTERING_METADATA
3188  res = nvenc_set_mastering_display_data(avctx, frame, &pic_params, &mastering_disp_info, &content_light_level);
3189  if (res < 0)
3190  return res;
3191 #endif
3192 
3193 #ifdef NVENC_HAVE_MVHEVC
3194  if (ctx->multiview) {
3197 
3198  if (sd_view_id)
3199  ctx->next_view_id = *(int*)sd_view_id->data;
3200 
3201  pic_params.codecPicParams.hevcPicParams.viewId = ctx->next_view_id;
3202 
3203  if (sd_tdrdi) {
3205 
3206  ref_disp_info.refViewingDistanceFlag = tdrdi->ref_viewing_distance_flag;
3207  ref_disp_info.precRefViewingDist = tdrdi->prec_ref_viewing_dist;
3208  ref_disp_info.precRefDisplayWidth = tdrdi->prec_ref_display_width;
3209 
3210  ref_disp_info.numRefDisplaysMinus1 = tdrdi->num_ref_displays - 1;
3211 
3212  for (i = 0; i < tdrdi->num_ref_displays &&
3213  i < FF_ARRAY_ELEMS(ref_disp_info.leftViewId); i++) {
3214  const AV3DReferenceDisplay *display = av_tdrdi_get_display(tdrdi, i);
3215  ref_disp_info.leftViewId[i] = display->left_view_id;
3216  ref_disp_info.rightViewId[i] = display->right_view_id;
3217  ref_disp_info.exponentRefDisplayWidth[i] = display->exponent_ref_display_width;
3218  ref_disp_info.mantissaRefDisplayWidth[i] = display->mantissa_ref_display_width;
3219  ref_disp_info.exponentRefViewingDistance[i] = display->exponent_ref_viewing_distance;
3220  ref_disp_info.mantissaRefViewingDistance[i] = display->mantissa_ref_viewing_distance;
3221  ref_disp_info.additionalShiftPresentFlag[i] = display->additional_shift_present_flag;
3222  ref_disp_info.numSampleShiftPlus512[i] = display->num_sample_shift + 512;
3223  }
3224 
3225  pic_params.codecPicParams.hevcPicParams.p3DReferenceDisplayInfo = &ref_disp_info;
3226  ctx->display_sei_sent = 1;
3227  } else if (!ctx->display_sei_sent) {
3228  ref_disp_info.precRefDisplayWidth = 31;
3229  ref_disp_info.leftViewId[0] = 0;
3230  ref_disp_info.rightViewId[0] = 1;
3231 
3232  pic_params.codecPicParams.hevcPicParams.p3DReferenceDisplayInfo = &ref_disp_info;
3233  ctx->display_sei_sent = 1;
3234  }
3235 
3236  ctx->next_view_id = !ctx->next_view_id;
3237  }
3238 #endif
3239 
3240  res = nvenc_store_frame_data(avctx, &pic_params, frame);
3241  if (res < 0)
3242  return res;
3243 
3244  nvenc_codec_specific_pic_params(avctx, frame, &pic_params, ctx->sei_data, sei_count);
3245  } else {
3246  pic_params.encodePicFlags = NV_ENC_PIC_FLAG_EOS;
3247  }
3248 
3249  res = nvenc_push_context(avctx);
3250  if (res < 0)
3251  return res;
3252 
3253  nv_status = p_nvenc->nvEncEncodePicture(ctx->nvencoder, &pic_params);
3254 
3255  for (i = 0; i < sei_count; i++)
3256  av_freep(&(ctx->sei_data[i].payload));
3257 
3258  res = nvenc_pop_context(avctx);
3259  if (res < 0)
3260  return res;
3261 
3262  if (nv_status != NV_ENC_SUCCESS &&
3263  nv_status != NV_ENC_ERR_NEED_MORE_INPUT)
3264  return nvenc_print_error(avctx, nv_status, "EncodePicture failed!");
3265 
3266  if (frame && frame->buf[0]) {
3267  av_fifo_write(ctx->output_surface_queue, &in_surf, 1);
3268 
3270  timestamp_queue_enqueue(ctx->timestamp_list, frame->pts);
3271  }
3272 
3273  /* all the pending buffers are now ready for output */
3274  if (nv_status == NV_ENC_SUCCESS) {
3275  while (av_fifo_read(ctx->output_surface_queue, &tmp_out_surf, 1) >= 0)
3276  av_fifo_write(ctx->output_surface_ready_queue, &tmp_out_surf, 1);
3277  }
3278 
3279  return 0;
3280 }
3281 
3283 {
3284  NvencSurface *tmp_out_surf;
3285  int res, res2;
3286 
3287  NvencContext *ctx = avctx->priv_data;
3288 
3289  AVFrame *frame = ctx->frame;
3290 
3291  if ((!ctx->cu_context && !ctx->d3d11_device) || !ctx->nvencoder)
3292  return AVERROR(EINVAL);
3293 
3294  if (!frame->buf[0]) {
3295  res = ff_encode_get_frame(avctx, frame);
3296  if (res < 0 && res != AVERROR_EOF)
3297  return res;
3298  }
3299 
3300  res = nvenc_send_frame(avctx, frame);
3301  if (res < 0) {
3302  if (res != AVERROR(EAGAIN))
3303  return res;
3304  } else
3306 
3307  if (output_ready(avctx, avctx->internal->draining)) {
3308  av_fifo_read(ctx->output_surface_ready_queue, &tmp_out_surf, 1);
3309 
3310  res = nvenc_push_context(avctx);
3311  if (res < 0)
3312  return res;
3313 
3314  res = process_output_surface(avctx, pkt, tmp_out_surf);
3315 
3316  res2 = nvenc_pop_context(avctx);
3317  if (res2 < 0)
3318  return res2;
3319 
3320  if (res)
3321  return res;
3322 
3323  av_fifo_write(ctx->unused_surface_queue, &tmp_out_surf, 1);
3324  } else if (avctx->internal->draining) {
3325  return AVERROR_EOF;
3326  } else {
3327  return AVERROR(EAGAIN);
3328  }
3329 
3330  return 0;
3331 }
3332 
3334 {
3335  NvencContext *ctx = avctx->priv_data;
3336 
3337  nvenc_send_frame(avctx, NULL);
3338  av_fifo_reset2(ctx->timestamp_list);
3339  ctx->output_frame_num = 0;
3340  ctx->initial_delay_time = 0;
3341 }
error
static void error(const char *err)
Definition: target_bsf_fuzzer.c:32
flags
const SwsFlags flags[]
Definition: swscale.c:61
LIST_DEVICES
@ LIST_DEVICES
Definition: nvenc.h:201
AVHWDeviceContext::hwctx
void * hwctx
The format-specific data, allocated and freed by libavutil along with this context.
Definition: hwcontext.h:88
ff_alloc_a53_sei
int ff_alloc_a53_sei(const AVFrame *frame, size_t prefix_len, void **data, size_t *sei_size)
Check AVFrame for A53 side data and allocate and fill SEI message with A53 info.
Definition: atsc_a53.c:26
AV_LOG_WARNING
#define AV_LOG_WARNING
Something somehow does not look correct.
Definition: log.h:216
PRESET_ALIAS
#define PRESET_ALIAS(alias, name,...)
Definition: nvenc.c:205
AV_PIX_FMT_CUDA
@ AV_PIX_FMT_CUDA
HW acceleration through CUDA.
Definition: pixfmt.h:260
AV3DReferenceDisplay::num_sample_shift
int16_t num_sample_shift
The recommended additional horizontal shift for a stereo pair corresponding to the n-th reference bas...
Definition: tdrdi.h:141
AVMasteringDisplayMetadata::max_luminance
AVRational max_luminance
Max luminance of mastering display (cd/m^2).
Definition: mastering_display_metadata.h:57
AVPixelFormat
AVPixelFormat
Pixel format.
Definition: pixfmt.h:71
name
it s the only field you need to keep assuming you have a context There is some magic you don t need to care about around this just let it vf default minimum maximum flags name is the option name
Definition: writing_filters.txt:88
GUIDTuple::guid
const GUID guid
Definition: nvenc.c:201
level
uint8_t level
Definition: svq3.c:208
av_clip
#define av_clip
Definition: common.h:100
AVERROR
Filter the word “frame” indicates either a video frame or a group of audio as stored in an AVFrame structure Format for each input and each output the list of supported formats For video that means pixel format For audio that means channel sample they are references to shared objects When the negotiation mechanism computes the intersection of the formats supported at each end of a all references to both lists are replaced with a reference to the intersection And when a single format is eventually chosen for a link amongst the remaining all references to the list are updated That means that if a filter requires that its input and output have the same format amongst a supported all it has to do is use a reference to the same list of formats query_formats can leave some formats unset and return AVERROR(EAGAIN) to cause the negotiation mechanism toagain later. That can be used by filters with complex requirements to use the format negotiated on one link to set the formats supported on another. Frame references ownership and permissions
AVCodecContext::colorspace
enum AVColorSpace colorspace
YUV colorspace type.
Definition: avcodec.h:659
AVCodecContext::decoded_side_data
AVFrameSideData ** decoded_side_data
Array containing static side data, such as HDR10 CLL / MDCV structures.
Definition: avcodec.h:1924
NV_ENC_H264_PROFILE_HIGH_444P
@ NV_ENC_H264_PROFILE_HIGH_444P
Definition: nvenc.h:177
av_frame_get_side_data
AVFrameSideData * av_frame_get_side_data(const AVFrame *frame, enum AVFrameSideDataType type)
Definition: frame.c:659
AV_PIX_FMT_BGR32
#define AV_PIX_FMT_BGR32
Definition: pixfmt.h:513
GUIDTuple
Definition: nvenc.c:200
GUIDTuple::flags
int flags
Definition: nvenc.c:202
av_pix_fmt_desc_get
const AVPixFmtDescriptor * av_pix_fmt_desc_get(enum AVPixelFormat pix_fmt)
Definition: pixdesc.c:3456
AVERROR_EOF
#define AVERROR_EOF
End of file.
Definition: error.h:57
AVBufferRef::data
uint8_t * data
The data buffer.
Definition: buffer.h:90
timecode_internal.h
AV_FRAME_DATA_A53_CC
@ AV_FRAME_DATA_A53_CC
ATSC A53 Part 4 Closed Captions.
Definition: frame.h:59
AV_PROFILE_H264_MAIN
#define AV_PROFILE_H264_MAIN
Definition: defs.h:112
nvenc_push_context
static int nvenc_push_context(AVCodecContext *avctx)
Definition: nvenc.c:394
AVMasteringDisplayMetadata::display_primaries
AVRational display_primaries[3][2]
CIE 1931 xy chromaticity coords of color primaries (r, g, b order).
Definition: mastering_display_metadata.h:42
AVHWFramesContext::format
enum AVPixelFormat format
The pixel format identifying the underlying HW surface type.
Definition: hwcontext.h:200
AVPictureType
AVPictureType
Definition: avutil.h:276
NVENC_RGB_MODE_DISABLED
@ NVENC_RGB_MODE_DISABLED
Definition: nvenc.h:206
output_ready
static int output_ready(AVCodecContext *avctx, int flush)
Definition: nvenc.c:2821
NvencContext
Definition: nvenc.h:211
AV3DReferenceDisplaysInfo::prec_ref_viewing_dist
uint8_t prec_ref_viewing_dist
The exponent of the maximum allowable truncation error for {exponent,mantissa}_ref_viewing_distance a...
Definition: tdrdi.h:72
AVCodecContext::codec_descriptor
const struct AVCodecDescriptor * codec_descriptor
AVCodecDescriptor.
Definition: avcodec.h:1704
int64_t
long long int64_t
Definition: coverity.c:34
NV_ENC_HEVC_PROFILE_MAIN
@ NV_ENC_HEVC_PROFILE_MAIN
Definition: nvenc.h:181
av_tdrdi_get_display
static av_always_inline AV3DReferenceDisplay * av_tdrdi_get_display(AV3DReferenceDisplaysInfo *tdrdi, unsigned int idx)
Definition: tdrdi.h:145
AV_PIX_FMT_YUV444P10MSB
#define AV_PIX_FMT_YUV444P10MSB
Definition: pixfmt.h:554
AV_FRAME_DATA_S12M_TIMECODE
@ AV_FRAME_DATA_S12M_TIMECODE
Timecode which conforms to SMPTE ST 12-1.
Definition: frame.h:152
AV_PROFILE_HEVC_MAIN
#define AV_PROFILE_HEVC_MAIN
Definition: defs.h:159
NvencSurface::in_ref
AVFrame * in_ref
Definition: nvenc.h:116
av_frame_free
void av_frame_free(AVFrame **frame)
Free the frame and any dynamically allocated objects in it, e.g.
Definition: frame.c:64
AVContentLightMetadata::MaxCLL
unsigned MaxCLL
Max content light level (cd/m^2).
Definition: mastering_display_metadata.h:111
nvenc_store_frame_data
static int nvenc_store_frame_data(AVCodecContext *avctx, NV_ENC_PIC_PARAMS *pic_params, const AVFrame *frame)
Definition: nvenc.c:2675
av_fifo_peek
int av_fifo_peek(const AVFifo *f, void *buf, size_t nb_elems, size_t offset)
Read data from a FIFO without modifying FIFO state.
Definition: fifo.c:255
AV3DReferenceDisplay
Data structure for single deference display information.
Definition: tdrdi.h:100
AVFrame
This structure describes decoded (raw) audio or video data.
Definition: frame.h:427
pixdesc.h
AVCodecContext::color_trc
enum AVColorTransferCharacteristic color_trc
Color Transfer Characteristic.
Definition: avcodec.h:652
nvenc_set_timestamp
static int nvenc_set_timestamp(AVCodecContext *avctx, NV_ENC_LOCK_BITSTREAM *params, AVPacket *pkt)
Definition: nvenc.c:2618
AVCOL_RANGE_JPEG
@ AVCOL_RANGE_JPEG
Full range content.
Definition: pixfmt.h:777
internal.h
AVPacket::data
uint8_t * data
Definition: packet.h:588
encode.h
AVCodecContext::b_quant_offset
float b_quant_offset
qscale offset between IP and B-frames
Definition: avcodec.h:785
NvencFrameData
Definition: nvenc.h:126
reconfig_encoder
static void reconfig_encoder(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2945
AV_LOG_VERBOSE
#define AV_LOG_VERBOSE
Detailed information.
Definition: log.h:226
AVCOL_SPC_RGB
@ AVCOL_SPC_RGB
order of coefficients is actually GBR, also IEC 61966-2-1 (sRGB), YZX and ST 428-1
Definition: pixfmt.h:701
timestamp_queue_peek
static int64_t timestamp_queue_peek(AVFifo *queue, size_t index)
Definition: nvenc.c:2610
ff_nvenc_pix_fmts
enum AVPixelFormat ff_nvenc_pix_fmts[]
Definition: nvenc.c:59
set_constqp
static av_cold void set_constqp(AVCodecContext *avctx)
Definition: nvenc.c:883
NvencSurface
Definition: nvenc.h:113
AVPacket::duration
int64_t duration
Duration of this packet in AVStream->time_base units, 0 if unknown.
Definition: packet.h:606
mathematics.h
FFMAX
#define FFMAX(a, b)
Definition: macros.h:47
av_buffer_ref
AVBufferRef * av_buffer_ref(const AVBufferRef *buf)
Create a new reference to an AVBuffer.
Definition: buffer.c:103
nvenc_print_error
static int nvenc_print_error(AVCodecContext *avctx, NVENCSTATUS err, const char *error_string)
Definition: nvenc.c:180
BD
#define BD
AVERROR_UNKNOWN
#define AVERROR_UNKNOWN
Unknown error, typically from an external library.
Definition: error.h:73
AVCodecContext::qmax
int qmax
maximum quantizer
Definition: avcodec.h:1241
nverr
NVENCSTATUS nverr
Definition: nvenc.c:133
NONE
#define NONE
Definition: vf_drawvg.c:257
set_lossless
static av_cold void set_lossless(AVCodecContext *avctx)
Definition: nvenc.c:998
PRESET
#define PRESET(name,...)
Definition: nvenc.c:208
AV_PKT_FLAG_KEY
#define AV_PKT_FLAG_KEY
The packet contains a keyframe.
Definition: packet.h:643
ff_nvenc_encode_flush
av_cold void ff_nvenc_encode_flush(AVCodecContext *avctx)
Definition: nvenc.c:3333
AV_STEREO3D_UNSPEC
@ AV_STEREO3D_UNSPEC
Video is stereoscopic but the packing is unspecified.
Definition: stereo3d.h:143
av_malloc
#define av_malloc(s)
Definition: tableprint_vlc.h:31
AV_CODEC_FLAG_GLOBAL_HEADER
#define AV_CODEC_FLAG_GLOBAL_HEADER
Place global headers in extradata instead of every keyframe.
Definition: avcodec.h:318
ff_timecode_set_smpte
void ff_timecode_set_smpte(unsigned *drop, unsigned *hh, unsigned *mm, unsigned *ss, unsigned *ff, AVRational rate, uint32_t tcsmpte, int prevent_df, int skip_field)
Convert SMPTE 12M binary representation to sei info.
Definition: timecode_internal.c:33
nvenc.h
AV_FRAME_FLAG_TOP_FIELD_FIRST
#define AV_FRAME_FLAG_TOP_FIELD_FIRST
A flag to mark frames where the top field is displayed first if the content is interlaced.
Definition: frame.h:655
av_memdup
void * av_memdup(const void *p, size_t size)
Duplicate a buffer with av_malloc().
Definition: mem.c:304
AV_HWDEVICE_TYPE_CUDA
@ AV_HWDEVICE_TYPE_CUDA
Definition: hwcontext.h:30
AVContentLightMetadata
Content light level needed by to transmit HDR over HDMI (CTA-861.3).
Definition: mastering_display_metadata.h:107
compute_dar
static void compute_dar(AVCodecContext *avctx, int *dw, int *dh)
Definition: nvenc.c:1787
AV3DReferenceDisplaysInfo
This structure describes information about the reference display width(s) and reference viewing dista...
Definition: tdrdi.h:53
AVCodecContext::framerate
AVRational framerate
Definition: avcodec.h:551
AVCOL_SPC_BT470BG
@ AVCOL_SPC_BT470BG
also ITU-R BT601-6 625 / ITU-R BT1358 625 / ITU-R BT1700 625 PAL & SECAM / IEC 61966-2-4 xvYCC601
Definition: pixfmt.h:706
nvenc_upload_frame
static int nvenc_upload_frame(AVCodecContext *avctx, const AVFrame *frame, NvencSurface *nvenc_frame)
Definition: nvenc.c:2438
NvencDynLoadFunctions::nvenc_device_count
int nvenc_device_count
Definition: nvenc.h:140
AV_CODEC_FLAG_COPY_OPAQUE
#define AV_CODEC_FLAG_COPY_OPAQUE
Definition: avcodec.h:279
AVCodecContext::i_quant_factor
float i_quant_factor
qscale factor between P- and I-frames If > 0 then the last P-frame quantizer will be used (q = lastp_...
Definition: avcodec.h:794
set_vbr
static av_cold void set_vbr(AVCodecContext *avctx)
Definition: nvenc.c:921
nvenc_map_error
static int nvenc_map_error(NVENCSTATUS err, const char **desc)
Definition: nvenc.c:165
AVCodecContext::codec
const struct AVCodec * codec
Definition: avcodec.h:440
AVPacket::opaque_ref
AVBufferRef * opaque_ref
AVBufferRef for free use by the API user.
Definition: packet.h:624
nvenc_check_cap
static int nvenc_check_cap(AVCodecContext *avctx, NV_ENC_CAPS cap)
Definition: nvenc.c:479
presets
static const Preset presets[]
Definition: vf_pseudocolor.c:286
fail
#define fail()
Definition: checkasm.h:207
av_fifo_write
int av_fifo_write(AVFifo *f, const void *buf, size_t nb_elems)
Write data into a FIFO.
Definition: fifo.c:188
AV_STEREO3D_2D
@ AV_STEREO3D_2D
Video is not stereoscopic (and metadata has to be there).
Definition: stereo3d.h:52
dummy
int dummy
Definition: motion.c:66
NvencSurface::format
NV_ENC_BUFFER_FORMAT format
Definition: nvenc.h:123
nvenc_setup_rate_control
static av_cold int nvenc_setup_rate_control(AVCodecContext *avctx)
Definition: nvenc.c:1090
sei.h
AVCodecContext::refs
int refs
number of reference frames
Definition: avcodec.h:689
AV_HWDEVICE_TYPE_D3D11VA
@ AV_HWDEVICE_TYPE_D3D11VA
Definition: hwcontext.h:35
nvenc_map_preset
static void nvenc_map_preset(NvencContext *ctx)
Definition: nvenc.c:210
AVCodecContext::flags
int flags
AV_CODEC_FLAG_*.
Definition: avcodec.h:488
val
static double val(void *priv, double ch)
Definition: aeval.c:77
nvenc_copy_frame
static int nvenc_copy_frame(AVCodecContext *avctx, NvencSurface *nv_surface, NV_ENC_LOCK_INPUT_BUFFER *lock_buffer_params, const AVFrame *frame)
Definition: nvenc.c:2320
AVERROR_BUFFER_TOO_SMALL
#define AVERROR_BUFFER_TOO_SMALL
Buffer too small.
Definition: error.h:53
hwcontext_cuda.h
av_image_fill_pointers
int av_image_fill_pointers(uint8_t *data[4], enum AVPixelFormat pix_fmt, int height, uint8_t *ptr, const int linesizes[4])
Fill plane data pointers for an image with pixel format pix_fmt and height height.
Definition: imgutils.c:145
ss
#define ss(width, name, subs,...)
Definition: cbs_vp9.c:202
IS_GBRP
#define IS_GBRP(pix_fmt)
Definition: nvenc.c:128
ff_encode_add_stats_side_data
int ff_encode_add_stats_side_data(AVPacket *pkt, int quality, const int64_t error[], int error_count, enum AVPictureType pict_type)
Definition: encode.c:918
AVCUDADeviceContext::cuda_ctx
CUcontext cuda_ctx
Definition: hwcontext_cuda.h:43
av_reduce
int av_reduce(int *dst_num, int *dst_den, int64_t num, int64_t den, int64_t max)
Reduce a fraction.
Definition: rational.c:35
nvenc_print_driver_requirement
static void nvenc_print_driver_requirement(AVCodecContext *avctx, int level)
Definition: nvenc.c:264
AVRational::num
int num
Numerator.
Definition: rational.h:59
AV_CODEC_FLAG_INTERLACED_DCT
#define AV_CODEC_FLAG_INTERLACED_DCT
Use interlaced DCT.
Definition: avcodec.h:310
nvenc_check_capabilities
static int nvenc_check_capabilities(AVCodecContext *avctx)
Definition: nvenc.c:496
AVHWDeviceContext
This struct aggregates all the (hardware/vendor-specific) "high-level" state, i.e.
Definition: hwcontext.h:63
av_frame_alloc
AVFrame * av_frame_alloc(void)
Allocate an AVFrame and set its fields to default values.
Definition: frame.c:52
AVCodecContext::color_primaries
enum AVColorPrimaries color_primaries
Chromaticity coordinates of the source primaries.
Definition: avcodec.h:645
AV_STEREO3D_FRAMESEQUENCE
@ AV_STEREO3D_FRAMESEQUENCE
Views are alternated temporally.
Definition: stereo3d.h:89
pkt
AVPacket * pkt
Definition: movenc.c:60
AV_LOG_ERROR
#define AV_LOG_ERROR
Something went wrong and cannot losslessly be recovered.
Definition: log.h:210
AVFrameSideData::size
size_t size
Definition: frame.h:285
FF_ARRAY_ELEMS
#define FF_ARRAY_ELEMS(a)
Definition: sinewin_tablegen.c:29
av_cold
#define av_cold
Definition: attributes.h:106
to_nv_color_pri
#define to_nv_color_pri(n)
Definition: nvenc.c:346
av_fifo_read
int av_fifo_read(AVFifo *f, void *buf, size_t nb_elems)
Read data from a FIFO.
Definition: fifo.c:240
P2
#define P2
Definition: cavsdsp.c:36
NVENC_LOSSLESS
@ NVENC_LOSSLESS
Definition: nvenc.h:193
AV_PIX_FMT_YUVJ422P
@ AV_PIX_FMT_YUVJ422P
planar YUV 4:2:2, 16bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV422P and setting col...
Definition: pixfmt.h:86
AVCodecContext::extradata_size
int extradata_size
Definition: avcodec.h:515
AVCodecContext::has_b_frames
int has_b_frames
Size of the frame reordering buffer in the decoder.
Definition: avcodec.h:697
ff_nvenc_encode_init
av_cold int ff_nvenc_encode_init(AVCodecContext *avctx)
Definition: nvenc.c:2257
av_fast_realloc
void * av_fast_realloc(void *ptr, unsigned int *size, size_t min_size)
Reallocate the given buffer if it is not large enough, otherwise do nothing.
Definition: mem.c:497
stereo3d.h
AVMasteringDisplayMetadata::white_point
AVRational white_point[2]
CIE 1931 xy chromaticity coords of white point.
Definition: mastering_display_metadata.h:47
AVCodecContext::global_quality
int global_quality
Global quality for codecs which cannot change it per frame.
Definition: avcodec.h:1217
AVD3D11VADeviceContext::device
ID3D11Device * device
Device used for texture creation and access.
Definition: hwcontext_d3d11va.h:56
AV_PIX_FMT_YUV444P16
#define AV_PIX_FMT_YUV444P16
Definition: pixfmt.h:552
AVFormatContext::flags
int flags
Flags modifying the (de)muxer behaviour.
Definition: avformat.h:1415
AVCodecContext::nb_decoded_side_data
int nb_decoded_side_data
Definition: avcodec.h:1925
AV_PIX_FMT_0BGR32
#define AV_PIX_FMT_0BGR32
Definition: pixfmt.h:516
pix_fmt
static enum AVPixelFormat pix_fmt
Definition: demux_decode.c:41
NvencDynLoadFunctions
Definition: nvenc.h:134
AV_PROFILE_H264_HIGH_10
#define AV_PROFILE_H264_HIGH_10
Definition: defs.h:115
ctx
AVFormatContext * ctx
Definition: movenc.c:49
SEI_TYPE_USER_DATA_REGISTERED_ITU_T_T35
@ SEI_TYPE_USER_DATA_REGISTERED_ITU_T_T35
Definition: sei.h:34
av_rescale_q
int64_t av_rescale_q(int64_t a, AVRational bq, AVRational cq)
Rescale a 64-bit integer by 2 rational numbers.
Definition: mathematics.c:142
AV_FRAME_DATA_3D_REFERENCE_DISPLAYS
@ AV_FRAME_DATA_3D_REFERENCE_DISPLAYS
This side data contains information about the reference display width(s) and reference viewing distan...
Definition: frame.h:256
nvenc_setup_extradata
static av_cold int nvenc_setup_extradata(AVCodecContext *avctx)
Definition: nvenc.c:2138
timestamp_queue_enqueue
static void timestamp_queue_enqueue(AVFifo *queue, int64_t timestamp)
Definition: nvenc.c:2596
P1
#define P1
Definition: cavsdsp.c:37
AV_PIX_FMT_YUV420P
@ AV_PIX_FMT_YUV420P
planar YUV 4:2:0, 12bpp, (1 Cr & Cb sample per 2x2 Y samples)
Definition: pixfmt.h:73
AVCodecContext::rc_max_rate
int64_t rc_max_rate
maximum bitrate
Definition: avcodec.h:1270
timestamp_queue_dequeue
static int64_t timestamp_queue_dequeue(AVFifo *queue)
Definition: nvenc.c:2601
AVPacket::opaque
void * opaque
for some private data of the user
Definition: packet.h:613
NvencDynLoadFunctions::nvenc_dl
NvencFunctions * nvenc_dl
Definition: nvenc.h:137
AVCPBProperties
This structure describes the bitrate properties of an encoded bitstream.
Definition: defs.h:282
AV_CODEC_ID_H264
@ AV_CODEC_ID_H264
Definition: codec_id.h:79
NvencSurface::pitch
int pitch
Definition: nvenc.h:120
tmp
static uint8_t tmp[40]
Definition: aes_ctr.c:52
AV_PIX_FMT_YUVJ444P
@ AV_PIX_FMT_YUVJ444P
planar YUV 4:4:4, 24bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV444P and setting col...
Definition: pixfmt.h:87
AV_PROFILE_H264_HIGH_422
#define AV_PROFILE_H264_HIGH_422
Definition: defs.h:118
NvencSurface::input_surface
NV_ENC_INPUT_PTR input_surface
Definition: nvenc.h:115
AVCodecDescriptor::props
int props
Codec properties, a combination of AV_CODEC_PROP_* flags.
Definition: codec_desc.h:54
if
if(ret)
Definition: filter_design.txt:179
AVCodecContext::rc_buffer_size
int rc_buffer_size
decoder bitstream buffer size
Definition: avcodec.h:1255
NVENC_CAP
#define NVENC_CAP
Definition: nvenc.c:49
AV_PIX_FMT_GBRP16
#define AV_PIX_FMT_GBRP16
Definition: pixfmt.h:561
IS_10BIT
#define IS_10BIT(pix_fmt)
Definition: nvenc.c:98
AV3DReferenceDisplaysInfo::ref_viewing_distance_flag
uint8_t ref_viewing_distance_flag
A flag to indicate the presence of reference viewing distance.
Definition: tdrdi.h:65
fabs
static __device__ float fabs(float a)
Definition: cuda_runtime.h:182
NULL
#define NULL
Definition: coverity.c:32
AVHWFramesContext::sw_format
enum AVPixelFormat sw_format
The pixel format identifying the actual data layout of the hardware frames.
Definition: hwcontext.h:213
IS_YUV422
#define IS_YUV422(pix_fmt)
Definition: nvenc.c:124
NvencSurface::reg_idx
int reg_idx
Definition: nvenc.h:117
AVCodecContext::color_range
enum AVColorRange color_range
MPEG vs JPEG YUV range.
Definition: avcodec.h:669
av_buffer_unref
void av_buffer_unref(AVBufferRef **buf)
Free a given reference and automatically free the buffer if there are no more references to it.
Definition: buffer.c:139
SEI_TYPE_TIME_CODE
@ SEI_TYPE_TIME_CODE
Definition: sei.h:95
AV_CODEC_ID_AV1
@ AV_CODEC_ID_AV1
Definition: codec_id.h:284
AVRational
Rational number (pair of numerator and denominator).
Definition: rational.h:58
AVCodecContext::internal
struct AVCodecInternal * internal
Private context used for internal data.
Definition: avcodec.h:466
AV_PIX_FMT_YUVJ420P
@ AV_PIX_FMT_YUVJ420P
planar YUV 4:2:0, 12bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV420P and setting col...
Definition: pixfmt.h:85
AVCodecContext::bit_rate
int64_t bit_rate
the average bitrate
Definition: avcodec.h:481
ff_nvenc_encode_close
av_cold int ff_nvenc_encode_close(AVCodecContext *avctx)
Definition: nvenc.c:2172
FrameData::duration
int64_t duration
Definition: librav1e.c:60
AV_PICTURE_TYPE_I
@ AV_PICTURE_TYPE_I
Intra.
Definition: avutil.h:278
AV3DReferenceDisplay::exponent_ref_display_width
uint8_t exponent_ref_display_width
The exponent part of the reference display width of the n-th reference display.
Definition: tdrdi.h:114
P3
#define P3
Definition: dsp_template.c:801
av_fifo_can_read
size_t av_fifo_can_read(const AVFifo *f)
Definition: fifo.c:87
flush
void(* flush)(AVBSFContext *ctx)
Definition: dts2pts.c:552
FrameData::frame_opaque
void * frame_opaque
Definition: librav1e.c:62
NvencDynLoadFunctions::cuda_dl
CudaFunctions * cuda_dl
Definition: nvenc.h:136
AV_FRAME_DATA_MASTERING_DISPLAY_METADATA
@ AV_FRAME_DATA_MASTERING_DISPLAY_METADATA
Mastering display metadata associated with a video frame.
Definition: frame.h:120
nvenc_setup_h264_config
static av_cold int nvenc_setup_h264_config(AVCodecContext *avctx)
Definition: nvenc.c:1269
AV3DReferenceDisplaysInfo::prec_ref_display_width
uint8_t prec_ref_display_width
The exponent of the maximum allowable truncation error for {exponent,mantissa}_ref_display_width as g...
Definition: tdrdi.h:58
AVPixFmtDescriptor::flags
uint64_t flags
Combination of AV_PIX_FMT_FLAG_...
Definition: pixdesc.h:94
AV_PROFILE_HEVC_MAIN_10
#define AV_PROFILE_HEVC_MAIN_10
Definition: defs.h:160
NV_ENC_H264_PROFILE_MAIN
@ NV_ENC_H264_PROFILE_MAIN
Definition: nvenc.h:169
AV_PROFILE_HEVC_REXT
#define AV_PROFILE_HEVC_REXT
Definition: defs.h:162
index
int index
Definition: gxfenc.c:90
AV_FRAME_DATA_SEI_UNREGISTERED
@ AV_FRAME_DATA_SEI_UNREGISTERED
User data unregistered metadata associated with a video frame.
Definition: frame.h:178
AVCodecContext::time_base
AVRational time_base
This is the fundamental unit of time (in seconds) in terms of which frame timestamps are represented.
Definition: avcodec.h:535
av_fifo_reset2
void av_fifo_reset2(AVFifo *f)
Definition: fifo.c:280
AV_PIX_FMT_X2BGR10
#define AV_PIX_FMT_X2BGR10
Definition: pixfmt.h:614
AVCUDADeviceContext::stream
CUstream stream
Definition: hwcontext_cuda.h:44
desc
const char * desc
Definition: nvenc.c:135
nvenc_pop_context
static int nvenc_pop_context(AVCodecContext *avctx)
Definition: nvenc.c:405
NVENC_TWO_PASSES
@ NVENC_TWO_PASSES
Definition: nvenc.h:195
HW_CONFIG_ENCODER_DEVICE
#define HW_CONFIG_ENCODER_DEVICE(format, device_type_)
Definition: hwconfig.h:95
AVFifo
Definition: fifo.c:35
AVCodecContext::gop_size
int gop_size
the number of pictures in a group of pictures, or 0 for intra_only
Definition: avcodec.h:1005
height
#define height
Definition: dsp.h:89
av_frame_ref
int av_frame_ref(AVFrame *dst, const AVFrame *src)
Set up a new reference to the data described by the source frame.
Definition: frame.c:278
nvenc_check_codec_support
static int nvenc_check_codec_support(AVCodecContext *avctx)
Definition: nvenc.c:443
AV_PIX_FMT_FLAG_RGB
#define AV_PIX_FMT_FLAG_RGB
The pixel format contains RGB-like data (as opposed to YUV/grayscale).
Definition: pixdesc.h:136
AV_CODEC_PROP_REORDER
#define AV_CODEC_PROP_REORDER
Codec supports frame reordering.
Definition: codec_desc.h:92
ff_nvenc_hw_configs
const AVCodecHWConfigInternal *const ff_nvenc_hw_configs[]
Definition: nvenc.c:88
MAX_REGISTERED_FRAMES
#define MAX_REGISTERED_FRAMES
Definition: nvenc.h:41
ff_alloc_timecode_sei
int ff_alloc_timecode_sei(const AVFrame *frame, AVRational rate, size_t prefix_len, void **data, size_t *sei_size)
Check AVFrame for S12M timecode side data and allocate and fill TC SEI message with timecode info.
Definition: utils.c:982
P6
#define P6
Definition: filter_template.c:407
for
for(k=2;k<=8;++k)
Definition: h264pred_template.c:424
nvenc_alloc_surface
static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
Definition: nvenc.c:2036
AV_NOPTS_VALUE
#define AV_NOPTS_VALUE
Undefined timestamp value.
Definition: avutil.h:247
AVFrameSideData::data
uint8_t * data
Definition: frame.h:284
nvenc_check_device
static av_cold int nvenc_check_device(AVCodecContext *avctx, int idx)
Definition: nvenc.c:692
nvenc_register_frame
static int nvenc_register_frame(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2384
AVCodecHWConfigInternal
Definition: hwconfig.h:25
NVENC_LOWLATENCY
@ NVENC_LOWLATENCY
Definition: nvenc.h:192
frame_data
FrameData * frame_data(AVFrame *frame)
Get our axiliary frame data attached to the frame, allocating it if needed.
Definition: ffmpeg.c:473
AV_PIX_FMT_NV16
@ AV_PIX_FMT_NV16
interleaved chroma YUV 4:2:2, 16bpp, (1 Cr & Cb sample per 2x1 Y samples)
Definition: pixfmt.h:198
ff_nvenc_receive_packet
int ff_nvenc_receive_packet(AVCodecContext *avctx, AVPacket *pkt)
Definition: nvenc.c:3282
AVPacket::dts
int64_t dts
Decompression timestamp in AVStream->time_base units; the time at which the packet is decompressed.
Definition: packet.h:587
AV_PIX_FMT_RGB32
#define AV_PIX_FMT_RGB32
Definition: pixfmt.h:511
nvenc_override_rate_control
static void nvenc_override_rate_control(AVCodecContext *avctx)
Definition: nvenc.c:1012
AVERROR_EXTERNAL
#define AVERROR_EXTERNAL
Generic error in an external library.
Definition: error.h:59
AVPacket::flags
int flags
A combination of AV_PKT_FLAG values.
Definition: packet.h:594
AV_PIX_FMT_D3D11
@ AV_PIX_FMT_D3D11
Hardware surfaces for Direct3D11.
Definition: pixfmt.h:336
AV_PIX_FMT_P216
#define AV_PIX_FMT_P216
Definition: pixfmt.h:620
FrameData::frame_opaque_ref
AVBufferRef * frame_opaque_ref
Definition: librav1e.c:63
xf
#define xf(width, name, var, range_min, range_max, subs,...)
Definition: cbs_av1.c:622
AVCPBProperties::avg_bitrate
int64_t avg_bitrate
Average bitrate of the stream, in bits per second.
Definition: defs.h:297
AV_PIX_FMT_P210
#define AV_PIX_FMT_P210
Definition: pixfmt.h:616
get_free_frame
static NvencSurface * get_free_frame(NvencContext *ctx)
Definition: nvenc.c:2309
NV_ENC_HEVC_PROFILE_REXT
@ NV_ENC_HEVC_PROFILE_REXT
Definition: nvenc.h:183
AV_LOG_INFO
#define AV_LOG_INFO
Standard information.
Definition: log.h:221
AVCodecContext::b_quant_factor
float b_quant_factor
qscale factor between IP and B-frames If > 0 then the last P-frame quantizer will be used (q= lastp_q...
Definition: avcodec.h:778
AV_FRAME_DATA_VIEW_ID
@ AV_FRAME_DATA_VIEW_ID
This side data must be associated with a video frame.
Definition: frame.h:245
AVCodec::id
enum AVCodecID id
Definition: codec.h:186
nvenc_open_session
static av_cold int nvenc_open_session(AVCodecContext *avctx)
Definition: nvenc.c:417
HW_CONFIG_ENCODER_FRAMES
#define HW_CONFIG_ENCODER_FRAMES(format, device_type_)
Definition: hwconfig.h:98
AV_FRAME_DATA_CONTENT_LIGHT_LEVEL
@ AV_FRAME_DATA_CONTENT_LIGHT_LEVEL
Content light level (based on CTA-861.3).
Definition: frame.h:137
AV3DReferenceDisplay::right_view_id
uint16_t right_view_id
The ViewId of the left view of a stereo pair corresponding to the n-th reference display.
Definition: tdrdi.h:109
i
#define i(width, name, range_min, range_max)
Definition: cbs_h2645.c:256
AVPacket::pts
int64_t pts
Presentation timestamp in AVStream->time_base units; the time at which the decompressed packet will b...
Definition: packet.h:581
NV_ENC_H264_PROFILE_BASELINE
@ NV_ENC_H264_PROFILE_BASELINE
Definition: nvenc.h:168
nvenc_errors
static const struct @214 nvenc_errors[]
FAST
@ FAST
Definition: vf_guided.c:32
AVCodecContext::extradata
uint8_t * extradata
Out-of-band global headers that may be used by some codecs.
Definition: avcodec.h:514
process_output_surface
static int process_output_surface(AVCodecContext *avctx, AVPacket *pkt, NvencSurface *tmpoutsurf)
Definition: nvenc.c:2722
nvenc_load_libraries
static av_cold int nvenc_load_libraries(AVCodecContext *avctx)
Definition: nvenc.c:350
nvenc_recalc_surfaces
static av_cold int nvenc_recalc_surfaces(AVCodecContext *avctx)
Definition: nvenc.c:1047
AVD3D11VADeviceContext
This struct is allocated as AVHWDeviceContext.hwctx.
Definition: hwcontext_d3d11va.h:45
IS_RGB
#define IS_RGB(pix_fmt)
Definition: nvenc.c:109
AVCPBProperties::max_bitrate
int64_t max_bitrate
Maximum bitrate of the stream, in bits per second.
Definition: defs.h:287
NV_ENC_H264_PROFILE_HIGH
@ NV_ENC_H264_PROFILE_HIGH
Definition: nvenc.h:170
AV_CODEC_ID_HEVC
@ AV_CODEC_ID_HEVC
Definition: codec_id.h:228
NV_ENC_HEVC_PROFILE_MAIN_10
@ NV_ENC_HEVC_PROFILE_MAIN_10
Definition: nvenc.h:182
prepare_sei_data_array
static int prepare_sei_data_array(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2833
AV_FRAME_DATA_STEREO3D
@ AV_FRAME_DATA_STEREO3D
Stereoscopic 3d metadata.
Definition: frame.h:64
FFMIN
#define FFMIN(a, b)
Definition: macros.h:49
NVENC_DEPRECATED_PRESET
@ NVENC_DEPRECATED_PRESET
Definition: nvenc.h:197
av_frame_unref
void av_frame_unref(AVFrame *frame)
Unreference all the buffers referenced by frame and reset the frame fields.
Definition: frame.c:496
AV_PIX_FMT_X2RGB10
#define AV_PIX_FMT_X2RGB10
Definition: pixfmt.h:613
av_mallocz
void * av_mallocz(size_t size)
Allocate a memory block with alignment suitable for all memory accesses (including vectors if availab...
Definition: mem.c:256
AV3DReferenceDisplay::mantissa_ref_display_width
uint8_t mantissa_ref_display_width
The mantissa part of the reference display width of the n-th reference display.
Definition: tdrdi.h:119
AVCodecContext::hw_device_ctx
AVBufferRef * hw_device_ctx
A reference to the AVHWDeviceContext describing the device which will be used by a hardware encoder/d...
Definition: avcodec.h:1475
AVMasteringDisplayMetadata
Mastering display metadata capable of representing the color volume of the display used to master the...
Definition: mastering_display_metadata.h:38
IS_YUV444
#define IS_YUV444(pix_fmt)
Definition: nvenc.c:116
IS_CBR
#define IS_CBR(rc)
Definition: nvenc.c:52
av_rescale
int64_t av_rescale(int64_t a, int64_t b, int64_t c)
Rescale a 64-bit integer with rounding to nearest.
Definition: mathematics.c:129
AVCodecContext::height
int height
Definition: avcodec.h:592
AVCodecContext::pix_fmt
enum AVPixelFormat pix_fmt
Pixel format, see AV_PIX_FMT_xxx.
Definition: avcodec.h:631
CHECK_CU
#define CHECK_CU(x)
Definition: nvenc.c:47
nvenc_map_buffer_format
static NV_ENC_BUFFER_FORMAT nvenc_map_buffer_format(enum AVPixelFormat pix_fmt)
Definition: nvenc.c:1996
av_calloc
void * av_calloc(size_t nmemb, size_t size)
Definition: mem.c:264
AV_PIX_FMT_P016
#define AV_PIX_FMT_P016
Definition: pixfmt.h:604
AVCodecContext::hw_frames_ctx
AVBufferRef * hw_frames_ctx
A reference to the AVHWFramesContext describing the input (for encoding) or output (decoding) frames.
Definition: avcodec.h:1453
NvencSurface::width
int width
Definition: nvenc.h:118
AV1_METADATA_TYPE_ITUT_T35
@ AV1_METADATA_TYPE_ITUT_T35
Definition: av1.h:47
AVHWFramesContext
This struct describes a set or pool of "hardware" frames (i.e.
Definition: hwcontext.h:118
AVCUDADeviceContext
This struct is allocated as AVHWDeviceContext.hwctx.
Definition: hwcontext_cuda.h:42
AV_PROFILE_H264_HIGH_444_PREDICTIVE
#define AV_PROFILE_H264_HIGH_444_PREDICTIVE
Definition: defs.h:122
ret
ret
Definition: filter_design.txt:187
AV_LOG_FATAL
#define AV_LOG_FATAL
Something went wrong and recovery is not possible.
Definition: log.h:204
AVHWDeviceContext::type
enum AVHWDeviceType type
This field identifies the underlying API used for hardware access.
Definition: hwcontext.h:75
nvenc_setup_encoder
static av_cold int nvenc_setup_encoder(AVCodecContext *avctx)
Definition: nvenc.c:1820
AV_PIX_FMT_NV12
@ AV_PIX_FMT_NV12
planar YUV 4:2:0, 12bpp, 1 plane for Y and 1 plane for the UV components, which are interleaved (firs...
Definition: pixfmt.h:96
FFSWAP
#define FFSWAP(type, a, b)
Definition: macros.h:52
frame
these buffered frames must be flushed immediately if a new input produces new the filter must not call request_frame to get more It must just process the frame or queue it The task of requesting more frames is left to the filter s request_frame method or the application If a filter has several the filter must be ready for frames arriving randomly on any input any filter with several inputs will most likely require some kind of queuing mechanism It is perfectly acceptable to have a limited queue and to drop frames when the inputs are too unbalanced request_frame For filters that do not use the this method is called when a frame is wanted on an output For a it should directly call filter_frame on the corresponding output For a if there are queued frames already one of these frames should be pushed If the filter should request a frame on one of its repeatedly until at least one frame has been pushed Return or at least make progress towards producing a frame
Definition: filter_design.txt:265
averr
int averr
Definition: nvenc.c:134
AV_PIX_FMT_0RGB32
#define AV_PIX_FMT_0RGB32
Definition: pixfmt.h:515
AVHWFramesContext::device_ctx
AVHWDeviceContext * device_ctx
The parent AVHWDeviceContext.
Definition: hwcontext.h:137
AVCPBProperties::buffer_size
int64_t buffer_size
The size of the buffer to which the ratecontrol is applied, in bits.
Definition: defs.h:303
cuda_check.h
atsc_a53.h
AVStereo3D::type
enum AVStereo3DType type
How views are packed within the video.
Definition: stereo3d.h:207
AV_PROFILE_H264_BASELINE
#define AV_PROFILE_H264_BASELINE
Definition: defs.h:110
AV3DReferenceDisplay::mantissa_ref_viewing_distance
uint8_t mantissa_ref_viewing_distance
The mantissa part of the reference viewing distance of the n-th reference display.
Definition: tdrdi.h:129
av_fifo_alloc2
AVFifo * av_fifo_alloc2(size_t nb_elems, size_t elem_size, unsigned int flags)
Allocate and initialize an AVFifo with a given element size.
Definition: fifo.c:47
AV_INPUT_BUFFER_PADDING_SIZE
#define AV_INPUT_BUFFER_PADDING_SIZE
Definition: defs.h:40
AV1_METADATA_TYPE_TIMECODE
@ AV1_METADATA_TYPE_TIMECODE
Definition: av1.h:48
AVCodecContext
main external API structure.
Definition: avcodec.h:431
AV_PROFILE_H264_HIGH
#define AV_PROFILE_H264_HIGH
Definition: defs.h:114
ANY_DEVICE
@ ANY_DEVICE
Definition: nvenc.h:202
AV_PICTURE_TYPE_B
@ AV_PICTURE_TYPE_B
Bi-dir predicted.
Definition: avutil.h:280
ff_get_encode_buffer
int ff_get_encode_buffer(AVCodecContext *avctx, AVPacket *avpkt, int64_t size, int flags)
Get a buffer for a packet.
Definition: encode.c:105
NvencSurface::height
int height
Definition: nvenc.h:119
SEI_TYPE_USER_DATA_UNREGISTERED
@ SEI_TYPE_USER_DATA_UNREGISTERED
Definition: sei.h:35
av_image_copy2
static void av_image_copy2(uint8_t *const dst_data[4], const int dst_linesizes[4], uint8_t *const src_data[4], const int src_linesizes[4], enum AVPixelFormat pix_fmt, int width, int height)
Wrapper around av_image_copy() to workaround the limitation that the conversion from uint8_t * const ...
Definition: imgutils.h:184
AVCodecContext::qmin
int qmin
minimum quantizer
Definition: avcodec.h:1234
AVRational::den
int den
Denominator.
Definition: rational.h:60
AV_PIX_FMT_NONE
@ AV_PIX_FMT_NONE
Definition: pixfmt.h:72
AVCodecContext::profile
int profile
profile
Definition: avcodec.h:1618
nvenc_setup_surfaces
static av_cold int nvenc_setup_surfaces(AVCodecContext *avctx)
Definition: nvenc.c:2092
AV3DReferenceDisplay::additional_shift_present_flag
uint8_t additional_shift_present_flag
An array of flags to indicates that the information about additional horizontal shift of the left and...
Definition: tdrdi.h:135
AVCodecContext::i_quant_offset
float i_quant_offset
qscale offset between P and I-frames
Definition: avcodec.h:801
AVFrameSideData::type
enum AVFrameSideDataType type
Definition: frame.h:283
NvencSurface::output_surface
NV_ENC_OUTPUT_PTR output_surface
Definition: nvenc.h:122
AV_PROFILE_HEVC_MULTIVIEW_MAIN
#define AV_PROFILE_HEVC_MULTIVIEW_MAIN
Definition: defs.h:163
nvenc_find_free_reg_resource
static int nvenc_find_free_reg_resource(AVCodecContext *avctx)
Definition: nvenc.c:2350
nvenc_codec_specific_pic_params
static void nvenc_codec_specific_pic_params(AVCodecContext *avctx, const AVFrame *frame, NV_ENC_PIC_PARAMS *params, NV_ENC_SEI_PAYLOAD *sei_data, int sei_count)
Definition: nvenc.c:2545
AVMasteringDisplayMetadata::min_luminance
AVRational min_luminance
Min luminance of mastering display (cd/m^2).
Definition: mastering_display_metadata.h:52
AV_PIX_FMT_YUV444P
@ AV_PIX_FMT_YUV444P
planar YUV 4:4:4, 24bpp, (1 Cr & Cb sample per 1x1 Y samples)
Definition: pixfmt.h:78
P7
#define P7
Definition: filter_template.c:406
AV_PIX_FMT_P010
#define AV_PIX_FMT_P010
Definition: pixfmt.h:602
AVCodecInternal::draining
int draining
decoding: AVERROR_EOF has been returned from ff_decode_get_packet(); must not be used by decoders tha...
Definition: internal.h:139
AV_PIX_FMT_GBRP
@ AV_PIX_FMT_GBRP
planar GBR 4:4:4 24bpp
Definition: pixfmt.h:165
AV3DReferenceDisplaysInfo::num_ref_displays
uint8_t num_ref_displays
The number of reference displays that are signalled in this struct.
Definition: tdrdi.h:78
NvencDynLoadFunctions::nvenc_funcs
NV_ENCODE_API_FUNCTION_LIST nvenc_funcs
Definition: nvenc.h:139
AV_PICTURE_TYPE_P
@ AV_PICTURE_TYPE_P
Predicted.
Definition: avutil.h:279
mem.h
AVCodecContext::max_b_frames
int max_b_frames
maximum number of B-frames between non-B-frames Note: The output will be delayed by max_b_frames+1 re...
Definition: avcodec.h:769
ff_encode_get_frame
int ff_encode_get_frame(AVCodecContext *avctx, AVFrame *frame)
Called by encoders to get the next frame for encoding.
Definition: encode.c:204
AV3DReferenceDisplay::exponent_ref_viewing_distance
uint8_t exponent_ref_viewing_distance
The exponent part of the reference viewing distance of the n-th reference display.
Definition: tdrdi.h:124
mastering_display_metadata.h
AVFrameSideData
Structure to hold side data for an AVFrame.
Definition: frame.h:282
AVPixFmtDescriptor
Descriptor that unambiguously describes how the bits of a pixel are stored in the up to 4 data planes...
Definition: pixdesc.h:69
P4
#define P4
Definition: filter_template.c:409
av_free
#define av_free(p)
Definition: tableprint_vlc.h:34
AVCodecContext::slices
int slices
Number of slices.
Definition: avcodec.h:1021
to_nv_color_matrix
#define to_nv_color_matrix(n)
Definition: nvenc.c:345
DEFAULT
#define DEFAULT
Definition: avdct.c:30
AVContentLightMetadata::MaxFALL
unsigned MaxFALL
Max average light level per frame (cd/m^2).
Definition: mastering_display_metadata.h:116
AVPacket
This structure stores compressed data.
Definition: packet.h:565
to_nv_color_trc
#define to_nv_color_trc(n)
Definition: nvenc.c:347
AVCodecContext::priv_data
void * priv_data
Definition: avcodec.h:458
av_freep
#define av_freep(p)
Definition: tableprint_vlc.h:35
AV_PICTURE_TYPE_BI
@ AV_PICTURE_TYPE_BI
BI type.
Definition: avutil.h:284
nvenc_setup_device
static av_cold int nvenc_setup_device(AVCodecContext *avctx)
Definition: nvenc.c:767
P5
#define P5
Definition: filter_template.c:408
av_frame_side_data_get
static const AVFrameSideData * av_frame_side_data_get(AVFrameSideData *const *sd, const int nb_sd, enum AVFrameSideDataType type)
Wrapper around av_frame_side_data_get_c() to workaround the limitation that for any type T the conver...
Definition: frame.h:1151
AVCodecContext::width
int width
picture width / height.
Definition: avcodec.h:592
imgutils.h
hwcontext.h
AVERROR_BUG
#define AVERROR_BUG
Internal bug, also see AVERROR_BUG2.
Definition: error.h:52
av_log
#define av_log(a,...)
Definition: tableprint_vlc.h:27
av_fifo_freep2
void av_fifo_freep2(AVFifo **f)
Free an AVFifo and reset pointer to NULL.
Definition: fifo.c:286
AVERROR_EXIT
#define AVERROR_EXIT
Immediate exit was requested; the called function should not be restarted.
Definition: error.h:58
AV_PIX_FMT_GBRP10MSB
#define AV_PIX_FMT_GBRP10MSB
Definition: pixfmt.h:568
ff_encode_add_cpb_side_data
AVCPBProperties * ff_encode_add_cpb_side_data(AVCodecContext *avctx)
Add a CPB properties side data to an encoding context.
Definition: encode.c:887
AVStereo3D
Stereo 3D type: this structure describes how two videos are packed within a single video surface,...
Definition: stereo3d.h:203
nvenc_setup_codec_config
static av_cold int nvenc_setup_codec_config(AVCodecContext *avctx)
Definition: nvenc.c:1770
width
#define width
Definition: dsp.h:89
FF_QP2LAMBDA
#define FF_QP2LAMBDA
factor to convert from H.263 QP to lambda
Definition: avutil.h:226
AV3DReferenceDisplay::left_view_id
uint16_t left_view_id
The ViewId of the left view of a stereo pair corresponding to the n-th reference display.
Definition: tdrdi.h:104
AV_PROFILE_AV1_MAIN
#define AV_PROFILE_AV1_MAIN
Definition: defs.h:169
codec_desc.h
NVENC_ONE_PASS
@ NVENC_ONE_PASS
Definition: nvenc.h:194
AVCodecContext::sample_aspect_ratio
AVRational sample_aspect_ratio
sample aspect ratio (0 if unknown) That is the width of a pixel divided by the height of the pixel.
Definition: avcodec.h:616
nvenc_setup_hevc_config
static av_cold int nvenc_setup_hevc_config(AVCodecContext *avctx)
Definition: nvenc.c:1460
RC_MODE_DEPRECATED
#define RC_MODE_DEPRECATED
Definition: nvenc.h:42
tdrdi.h
nvenc_send_frame
static int nvenc_send_frame(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:3109
av_get_pix_fmt_name
const char * av_get_pix_fmt_name(enum AVPixelFormat pix_fmt)
Return the short name for a pixel format, NULL in case pix_fmt is unknown.
Definition: pixdesc.c:3376
nvenc_retrieve_frame_data
static int nvenc_retrieve_frame_data(AVCodecContext *avctx, NV_ENC_LOCK_BITSTREAM *lock_params, AVPacket *pkt)
Definition: nvenc.c:2701