FFmpeg
nvenc.c
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1 /*
2  * H.264/HEVC/AV1 hardware encoding using nvidia nvenc
3  * Copyright (c) 2016 Timo Rothenpieler <timo@rothenpieler.org>
4  *
5  * This file is part of FFmpeg.
6  *
7  * FFmpeg is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU Lesser General Public
9  * License as published by the Free Software Foundation; either
10  * version 2.1 of the License, or (at your option) any later version.
11  *
12  * FFmpeg is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15  * Lesser General Public License for more details.
16  *
17  * You should have received a copy of the GNU Lesser General Public
18  * License along with FFmpeg; if not, write to the Free Software
19  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
20  */
21 
22 #include "config.h"
23 #include "config_components.h"
24 
25 #include "nvenc.h"
26 #include "hevc/sei.h"
27 #if CONFIG_AV1_NVENC_ENCODER
28 #include "av1.h"
29 #endif
30 
31 #include "libavutil/hwcontext_cuda.h"
32 #include "libavutil/hwcontext.h"
33 #include "libavutil/cuda_check.h"
34 #include "libavutil/imgutils.h"
35 #include "libavutil/mem.h"
36 #include "libavutil/pixdesc.h"
37 #include "libavutil/timecode_internal.h"
38 #include "libavutil/mathematics.h"
39 #include "libavutil/mastering_display_metadata.h"
40 #include "libavutil/stereo3d.h"
41 #include "libavutil/tdrdi.h"
42 #include "atsc_a53.h"
43 #include "codec_desc.h"
44 #include "encode.h"
45 #include "internal.h"
46 
47 #define CHECK_CU(x) FF_CUDA_CHECK_DL(avctx, dl_fn->cuda_dl, x)
48 
49 #define NVENC_CAP 0x30
50 
51 #ifndef NVENC_NO_DEPRECATED_RC
52 #define IS_CBR(rc) (rc == NV_ENC_PARAMS_RC_CBR || \
53  rc == NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ || \
54  rc == NV_ENC_PARAMS_RC_CBR_HQ)
55 #else
56 #define IS_CBR(rc) (rc == NV_ENC_PARAMS_RC_CBR)
57 #endif
58 
59 const enum AVPixelFormat ff_nvenc_pix_fmts[] = {
60  AV_PIX_FMT_YUV420P,
61  AV_PIX_FMT_NV12,
62  AV_PIX_FMT_P010,
63  AV_PIX_FMT_YUV444P,
64  AV_PIX_FMT_P016, // Truncated to 10bits
65 #ifdef NVENC_HAVE_422_SUPPORT
66  AV_PIX_FMT_NV16,
67  AV_PIX_FMT_P210,
68  AV_PIX_FMT_P216,
69 #endif
70  AV_PIX_FMT_YUV444P10MSB,
71  AV_PIX_FMT_YUV444P16, // Truncated to 10bits
72  AV_PIX_FMT_0RGB32,
73  AV_PIX_FMT_RGB32,
74  AV_PIX_FMT_0BGR32,
75  AV_PIX_FMT_BGR32,
76  AV_PIX_FMT_X2RGB10,
77  AV_PIX_FMT_X2BGR10,
78  AV_PIX_FMT_GBRP,
79  AV_PIX_FMT_GBRP10MSB,
80  AV_PIX_FMT_GBRP16, // Truncated to 10bits
81  AV_PIX_FMT_CUDA,
82 #if CONFIG_D3D11VA
83  AV_PIX_FMT_D3D11,
84 #endif
85  AV_PIX_FMT_NONE
86 };
87 
88 const AVCodecHWConfigInternal *const ff_nvenc_hw_configs[] = {
89  HW_CONFIG_ENCODER_FRAMES(CUDA, CUDA),
90  HW_CONFIG_ENCODER_DEVICE(NONE, CUDA),
91 #if CONFIG_D3D11VA
92  HW_CONFIG_ENCODER_FRAMES(D3D11, D3D11VA),
93  HW_CONFIG_ENCODER_DEVICE(NONE, D3D11VA),
94 #endif
95  NULL,
96 };
97 
98 #define IS_10BIT(pix_fmt) (pix_fmt == AV_PIX_FMT_P010 || \
99  pix_fmt == AV_PIX_FMT_P016 || \
100  pix_fmt == AV_PIX_FMT_P210 || \
101  pix_fmt == AV_PIX_FMT_P216 || \
102  pix_fmt == AV_PIX_FMT_YUV444P10MSB || \
103  pix_fmt == AV_PIX_FMT_YUV444P16 || \
104  pix_fmt == AV_PIX_FMT_X2RGB10 || \
105  pix_fmt == AV_PIX_FMT_X2BGR10 || \
106  pix_fmt == AV_PIX_FMT_GBRP10MSB || \
107  pix_fmt == AV_PIX_FMT_GBRP16)
108 
109 #define IS_RGB(pix_fmt) (pix_fmt == AV_PIX_FMT_0RGB32 || \
110  pix_fmt == AV_PIX_FMT_RGB32 || \
111  pix_fmt == AV_PIX_FMT_0BGR32 || \
112  pix_fmt == AV_PIX_FMT_BGR32 || \
113  pix_fmt == AV_PIX_FMT_X2RGB10 || \
114  pix_fmt == AV_PIX_FMT_X2BGR10)
115 
116 #define IS_YUV444(pix_fmt) (pix_fmt == AV_PIX_FMT_YUV444P || \
117  pix_fmt == AV_PIX_FMT_YUV444P10MSB || \
118  pix_fmt == AV_PIX_FMT_YUV444P16 || \
119  pix_fmt == AV_PIX_FMT_GBRP || \
120  pix_fmt == AV_PIX_FMT_GBRP10MSB || \
121  pix_fmt == AV_PIX_FMT_GBRP16 || \
122  (ctx->rgb_mode == NVENC_RGB_MODE_444 && IS_RGB(pix_fmt)))
123 
124 #define IS_YUV422(pix_fmt) (pix_fmt == AV_PIX_FMT_NV16 || \
125  pix_fmt == AV_PIX_FMT_P210 || \
126  pix_fmt == AV_PIX_FMT_P216)
127 
128 #define IS_GBRP(pix_fmt) (pix_fmt == AV_PIX_FMT_GBRP || \
129  pix_fmt == AV_PIX_FMT_GBRP10MSB || \
130  pix_fmt == AV_PIX_FMT_GBRP16)
131 
132 static const struct {
133  NVENCSTATUS nverr;
134  int averr;
135  const char *desc;
136 } nvenc_errors[] = {
137  { NV_ENC_SUCCESS, 0, "success" },
138  { NV_ENC_ERR_NO_ENCODE_DEVICE, AVERROR(ENOENT), "no encode device" },
139  { NV_ENC_ERR_UNSUPPORTED_DEVICE, AVERROR(ENOSYS), "unsupported device" },
140  { NV_ENC_ERR_INVALID_ENCODERDEVICE, AVERROR(EINVAL), "invalid encoder device" },
141  { NV_ENC_ERR_INVALID_DEVICE, AVERROR(EINVAL), "invalid device" },
142  { NV_ENC_ERR_DEVICE_NOT_EXIST, AVERROR(EIO), "device does not exist" },
143  { NV_ENC_ERR_INVALID_PTR, AVERROR(EFAULT), "invalid ptr" },
144  { NV_ENC_ERR_INVALID_EVENT, AVERROR(EINVAL), "invalid event" },
145  { NV_ENC_ERR_INVALID_PARAM, AVERROR(EINVAL), "invalid param" },
146  { NV_ENC_ERR_INVALID_CALL, AVERROR(EINVAL), "invalid call" },
147  { NV_ENC_ERR_OUT_OF_MEMORY, AVERROR(ENOMEM), "out of memory" },
148  { NV_ENC_ERR_ENCODER_NOT_INITIALIZED, AVERROR(EINVAL), "encoder not initialized" },
149  { NV_ENC_ERR_UNSUPPORTED_PARAM, AVERROR(ENOSYS), "unsupported param" },
150  { NV_ENC_ERR_LOCK_BUSY, AVERROR(EAGAIN), "lock busy" },
151  { NV_ENC_ERR_NOT_ENOUGH_BUFFER, AVERROR_BUFFER_TOO_SMALL, "not enough buffer"},
152  { NV_ENC_ERR_INVALID_VERSION, AVERROR(EINVAL), "invalid version" },
153  { NV_ENC_ERR_MAP_FAILED, AVERROR(EIO), "map failed" },
154  { NV_ENC_ERR_NEED_MORE_INPUT, AVERROR(EAGAIN), "need more input" },
155  { NV_ENC_ERR_ENCODER_BUSY, AVERROR(EAGAIN), "encoder busy" },
156  { NV_ENC_ERR_EVENT_NOT_REGISTERD, AVERROR(EBADF), "event not registered" },
157  { NV_ENC_ERR_GENERIC, AVERROR_UNKNOWN, "generic error" },
158  { NV_ENC_ERR_INCOMPATIBLE_CLIENT_KEY, AVERROR(EINVAL), "incompatible client key" },
159  { NV_ENC_ERR_UNIMPLEMENTED, AVERROR(ENOSYS), "unimplemented" },
160  { NV_ENC_ERR_RESOURCE_REGISTER_FAILED, AVERROR(EIO), "resource register failed" },
161  { NV_ENC_ERR_RESOURCE_NOT_REGISTERED, AVERROR(EBADF), "resource not registered" },
162  { NV_ENC_ERR_RESOURCE_NOT_MAPPED, AVERROR(EBADF), "resource not mapped" },
163 };
164 
165 static int nvenc_map_error(NVENCSTATUS err, const char **desc)
166 {
167  int i;
168  for (i = 0; i < FF_ARRAY_ELEMS(nvenc_errors); i++) {
169  if (nvenc_errors[i].nverr == err) {
170  if (desc)
171  *desc = nvenc_errors[i].desc;
172  return nvenc_errors[i].averr;
173  }
174  }
175  if (desc)
176  *desc = "unknown error";
177  return AVERROR_UNKNOWN;
178 }
179 
180 static int nvenc_print_error(AVCodecContext *avctx, NVENCSTATUS err,
181  const char *error_string)
182 {
183  const char *desc;
184  const char *details = "(no details)";
185  int ret = nvenc_map_error(err, &desc);
186 
187 #ifdef NVENC_HAVE_GETLASTERRORSTRING
188  NvencContext *ctx = avctx->priv_data;
189  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
190 
191  if (p_nvenc && ctx->nvencoder)
192  details = p_nvenc->nvEncGetLastErrorString(ctx->nvencoder);
193 #endif
194 
195  av_log(avctx, AV_LOG_ERROR, "%s: %s (%d): %s\n", error_string, desc, err, details);
196 
197  return ret;
198 }
199 
200 typedef struct GUIDTuple {
201  const GUID guid;
202  int flags;
203 } GUIDTuple;
204 
205 #define PRESET_ALIAS(alias, name, ...) \
206  [PRESET_ ## alias] = { NV_ENC_PRESET_ ## name ## _GUID, __VA_ARGS__ }
207 
208 #define PRESET(name, ...) PRESET_ALIAS(name, name, __VA_ARGS__)
209 
210 static void nvenc_map_preset(NvencContext *ctx)
211 {
212  GUIDTuple presets[] = {
213 #ifdef NVENC_HAVE_NEW_PRESETS
214  PRESET(P1),
215  PRESET(P2),
216  PRESET(P3),
217  PRESET(P4),
218  PRESET(P5),
219  PRESET(P6),
220  PRESET(P7),
221  PRESET_ALIAS(SLOW, P7, NVENC_TWO_PASSES),
222  PRESET_ALIAS(MEDIUM, P4, NVENC_ONE_PASS),
223  PRESET_ALIAS(FAST, P1, NVENC_ONE_PASS),
224  // Compat aliases
225  PRESET_ALIAS(DEFAULT, P4, NVENC_DEPRECATED_PRESET),
226  PRESET_ALIAS(HP, P1, NVENC_DEPRECATED_PRESET),
227  PRESET_ALIAS(HQ, P7, NVENC_DEPRECATED_PRESET),
228  PRESET_ALIAS(BD, P5, NVENC_DEPRECATED_PRESET),
229  PRESET_ALIAS(LOW_LATENCY_DEFAULT, P4, NVENC_DEPRECATED_PRESET | NVENC_LOWLATENCY),
230  PRESET_ALIAS(LOW_LATENCY_HP, P1, NVENC_DEPRECATED_PRESET | NVENC_LOWLATENCY),
231  PRESET_ALIAS(LOW_LATENCY_HQ, P7, NVENC_DEPRECATED_PRESET | NVENC_LOWLATENCY),
232  PRESET_ALIAS(LOSSLESS_DEFAULT, P4, NVENC_DEPRECATED_PRESET | NVENC_LOSSLESS),
233  PRESET_ALIAS(LOSSLESS_HP, P1, NVENC_DEPRECATED_PRESET | NVENC_LOSSLESS),
234 #else
235  PRESET(DEFAULT),
236  PRESET(HP),
237  PRESET(HQ),
238  PRESET(BD),
239  PRESET_ALIAS(SLOW, HQ, NVENC_TWO_PASSES),
240  PRESET_ALIAS(MEDIUM, HQ, NVENC_ONE_PASS),
241  PRESET_ALIAS(FAST, HP, NVENC_ONE_PASS),
242  PRESET(LOW_LATENCY_DEFAULT, NVENC_LOWLATENCY),
243  PRESET(LOW_LATENCY_HP, NVENC_LOWLATENCY),
244  PRESET(LOW_LATENCY_HQ, NVENC_LOWLATENCY),
245  PRESET(LOSSLESS_DEFAULT, NVENC_LOSSLESS),
246  PRESET(LOSSLESS_HP, NVENC_LOSSLESS),
247 #endif
248  };
249 
250  GUIDTuple *t = &presets[ctx->preset];
251 
252  ctx->init_encode_params.presetGUID = t->guid;
253  ctx->flags = t->flags;
254 
255 #ifdef NVENC_HAVE_NEW_PRESETS
256  if (ctx->tuning_info == NV_ENC_TUNING_INFO_LOSSLESS)
257  ctx->flags |= NVENC_LOSSLESS;
258 #endif
259 }
260 
261 #undef PRESET
262 #undef PRESET_ALIAS
263 
264 static void nvenc_print_driver_requirement(AVCodecContext *avctx, int level)
265 {
266 #if NVENCAPI_CHECK_VERSION(13, 1)
267  const char *minver = "(unknown)";
268 #elif NVENCAPI_CHECK_VERSION(13, 0)
269  const char *minver = "570.0";
270 #elif NVENCAPI_CHECK_VERSION(12, 2)
271 # if defined(_WIN32) || defined(__CYGWIN__)
272  const char *minver = "551.76";
273 # else
274  const char *minver = "550.54.14";
275 # endif
276 #elif NVENCAPI_CHECK_VERSION(12, 1)
277 # if defined(_WIN32) || defined(__CYGWIN__)
278  const char *minver = "531.61";
279 # else
280  const char *minver = "530.41.03";
281 # endif
282 #elif NVENCAPI_CHECK_VERSION(12, 0)
283 # if defined(_WIN32) || defined(__CYGWIN__)
284  const char *minver = "522.25";
285 # else
286  const char *minver = "520.56.06";
287 # endif
288 #elif NVENCAPI_CHECK_VERSION(11, 1)
289 # if defined(_WIN32) || defined(__CYGWIN__)
290  const char *minver = "471.41";
291 # else
292  const char *minver = "470.57.02";
293 # endif
294 #elif NVENCAPI_CHECK_VERSION(11, 0)
295 # if defined(_WIN32) || defined(__CYGWIN__)
296  const char *minver = "456.71";
297 # else
298  const char *minver = "455.28";
299 # endif
300 #elif NVENCAPI_CHECK_VERSION(10, 0)
301 # if defined(_WIN32) || defined(__CYGWIN__)
302  const char *minver = "450.51";
303 # else
304  const char *minver = "445.87";
305 # endif
306 #elif NVENCAPI_CHECK_VERSION(9, 1)
307 # if defined(_WIN32) || defined(__CYGWIN__)
308  const char *minver = "436.15";
309 # else
310  const char *minver = "435.21";
311 # endif
312 #elif NVENCAPI_CHECK_VERSION(9, 0)
313 # if defined(_WIN32) || defined(__CYGWIN__)
314  const char *minver = "418.81";
315 # else
316  const char *minver = "418.30";
317 # endif
318 #elif NVENCAPI_CHECK_VERSION(8, 2)
319 # if defined(_WIN32) || defined(__CYGWIN__)
320  const char *minver = "397.93";
321 # else
322  const char *minver = "396.24";
323 #endif
324 #elif NVENCAPI_CHECK_VERSION(8, 1)
325 # if defined(_WIN32) || defined(__CYGWIN__)
326  const char *minver = "390.77";
327 # else
328  const char *minver = "390.25";
329 # endif
330 #else
331 # if defined(_WIN32) || defined(__CYGWIN__)
332  const char *minver = "378.66";
333 # else
334  const char *minver = "378.13";
335 # endif
336 #endif
337  av_log(avctx, level, "The minimum required Nvidia driver for nvenc is %s or newer\n", minver);
338 }
339 
340 #if NVENCAPI_CHECK_VERSION(12, 0)
341 #define to_nv_color_matrix(n) (NV_ENC_VUI_MATRIX_COEFFS)(n)
342 #define to_nv_color_pri(n) (NV_ENC_VUI_COLOR_PRIMARIES)(n)
343 #define to_nv_color_trc(n) (NV_ENC_VUI_TRANSFER_CHARACTERISTIC)(n)
344 #else
345 #define to_nv_color_matrix(n) (uint32_t)(n)
346 #define to_nv_color_pri(n) (uint32_t)(n)
347 #define to_nv_color_trc(n) (uint32_t)(n)
348 #endif
349 
350 static av_cold int nvenc_load_libraries(AVCodecContext *avctx)
351 {
352  NvencContext *ctx = avctx->priv_data;
353  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
354  NVENCSTATUS err;
355  uint32_t nvenc_max_ver;
356  int ret;
357 
358  ret = cuda_load_functions(&dl_fn->cuda_dl, avctx);
359  if (ret < 0)
360  return ret;
361 
362  ret = nvenc_load_functions(&dl_fn->nvenc_dl, avctx);
363  if (ret < 0) {
364  nvenc_print_driver_requirement(avctx, AV_LOG_ERROR);
365  return ret;
366  }
367 
368  err = dl_fn->nvenc_dl->NvEncodeAPIGetMaxSupportedVersion(&nvenc_max_ver);
369  if (err != NV_ENC_SUCCESS)
370  return nvenc_print_error(avctx, err, "Failed to query nvenc max version");
371 
372  av_log(avctx, AV_LOG_VERBOSE, "Loaded Nvenc version %d.%d\n", nvenc_max_ver >> 4, nvenc_max_ver & 0xf);
373 
374  if ((NVENCAPI_MAJOR_VERSION << 4 | NVENCAPI_MINOR_VERSION) > nvenc_max_ver) {
375  av_log(avctx, AV_LOG_ERROR, "Driver does not support the required nvenc API version. "
376  "Required: %d.%d Found: %d.%d\n",
377  NVENCAPI_MAJOR_VERSION, NVENCAPI_MINOR_VERSION,
378  nvenc_max_ver >> 4, nvenc_max_ver & 0xf);
379  nvenc_print_driver_requirement(avctx, AV_LOG_ERROR);
380  return AVERROR(ENOSYS);
381  }
382 
383  dl_fn->nvenc_funcs.version = NV_ENCODE_API_FUNCTION_LIST_VER;
384 
385  err = dl_fn->nvenc_dl->NvEncodeAPICreateInstance(&dl_fn->nvenc_funcs);
386  if (err != NV_ENC_SUCCESS)
387  return nvenc_print_error(avctx, err, "Failed to create nvenc instance");
388 
389  av_log(avctx, AV_LOG_VERBOSE, "Nvenc initialized successfully\n");
390 
391  return 0;
392 }
393 
394 static int nvenc_push_context(AVCodecContext *avctx)
395 {
396  NvencContext *ctx = avctx->priv_data;
397  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
398 
399  if (ctx->d3d11_device)
400  return 0;
401 
402  return CHECK_CU(dl_fn->cuda_dl->cuCtxPushCurrent(ctx->cu_context));
403 }
404 
405 static int nvenc_pop_context(AVCodecContext *avctx)
406 {
407  NvencContext *ctx = avctx->priv_data;
408  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
409  CUcontext dummy;
410 
411  if (ctx->d3d11_device)
412  return 0;
413 
414  return CHECK_CU(dl_fn->cuda_dl->cuCtxPopCurrent(&dummy));
415 }
416 
417 static av_cold int nvenc_open_session(AVCodecContext *avctx)
418 {
419  NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS params = { 0 };
420  NvencContext *ctx = avctx->priv_data;
421  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
422  NVENCSTATUS ret;
423 
424  params.version = NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS_VER;
425  params.apiVersion = NVENCAPI_VERSION;
426  if (ctx->d3d11_device) {
427  params.device = ctx->d3d11_device;
428  params.deviceType = NV_ENC_DEVICE_TYPE_DIRECTX;
429  } else {
430  params.device = ctx->cu_context;
431  params.deviceType = NV_ENC_DEVICE_TYPE_CUDA;
432  }
433 
434  ret = p_nvenc->nvEncOpenEncodeSessionEx(&params, &ctx->nvencoder);
435  if (ret != NV_ENC_SUCCESS) {
436  ctx->nvencoder = NULL;
437  return nvenc_print_error(avctx, ret, "OpenEncodeSessionEx failed");
438  }
439 
440  return 0;
441 }
442 
443 static int nvenc_check_codec_support(AVCodecContext *avctx)
444 {
445  NvencContext *ctx = avctx->priv_data;
446  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
447  int i, ret, count = 0;
448  GUID *guids = NULL;
449 
450  ret = p_nvenc->nvEncGetEncodeGUIDCount(ctx->nvencoder, &count);
451 
452  if (ret != NV_ENC_SUCCESS || !count)
453  return AVERROR(ENOSYS);
454 
455  guids = av_malloc(count * sizeof(GUID));
456  if (!guids)
457  return AVERROR(ENOMEM);
458 
459  ret = p_nvenc->nvEncGetEncodeGUIDs(ctx->nvencoder, guids, count, &count);
460  if (ret != NV_ENC_SUCCESS) {
461  ret = AVERROR(ENOSYS);
462  goto fail;
463  }
464 
465  ret = AVERROR(ENOSYS);
466  for (i = 0; i < count; i++) {
467  if (!memcmp(&guids[i], &ctx->init_encode_params.encodeGUID, sizeof(*guids))) {
468  ret = 0;
469  break;
470  }
471  }
472 
473 fail:
474  av_free(guids);
475 
476  return ret;
477 }
478 
479 static int nvenc_check_cap(AVCodecContext *avctx, NV_ENC_CAPS cap)
480 {
481  NvencContext *ctx = avctx->priv_data;
482  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
483  NV_ENC_CAPS_PARAM params = { 0 };
484  int ret, val = 0;
485 
486  params.version = NV_ENC_CAPS_PARAM_VER;
487  params.capsToQuery = cap;
488 
489  ret = p_nvenc->nvEncGetEncodeCaps(ctx->nvencoder, ctx->init_encode_params.encodeGUID, &params, &val);
490 
491  if (ret == NV_ENC_SUCCESS)
492  return val;
493  return 0;
494 }
495 
496 static int nvenc_check_capabilities(AVCodecContext *avctx)
497 {
498  NvencContext *ctx = avctx->priv_data;
499  int tmp, ret;
500 
501  ret = nvenc_check_codec_support(avctx);
502  if (ret < 0) {
503  av_log(avctx, AV_LOG_WARNING, "Codec not supported\n");
504  return ret;
505  }
506 
507  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_YUV444_ENCODE);
508  if (IS_YUV444(ctx->data_pix_fmt) && ret <= 0) {
509  av_log(avctx, AV_LOG_WARNING, "YUV444P not supported\n");
510  return AVERROR(ENOSYS);
511  }
512 
513 #ifdef NVENC_HAVE_422_SUPPORT
514  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_YUV422_ENCODE);
515 #else
516  ret = 0;
517 #endif
518  if (IS_YUV422(ctx->data_pix_fmt) && ret <= 0) {
519  av_log(avctx, AV_LOG_WARNING, "YUV422P not supported\n");
520  return AVERROR(ENOSYS);
521  }
522 
523  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOSSLESS_ENCODE);
524  if (ctx->flags & NVENC_LOSSLESS && ret <= 0) {
525  av_log(avctx, AV_LOG_WARNING, "Lossless encoding not supported\n");
526  return AVERROR(ENOSYS);
527  }
528 
529  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_WIDTH_MAX);
530  if (ret < avctx->width) {
531  av_log(avctx, AV_LOG_WARNING, "Width %d exceeds %d\n",
532  avctx->width, ret);
533  return AVERROR(ENOSYS);
534  }
535 
536  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_HEIGHT_MAX);
537  if (ret < avctx->height) {
538  av_log(avctx, AV_LOG_WARNING, "Height %d exceeds %d\n",
539  avctx->height, ret);
540  return AVERROR(ENOSYS);
541  }
542 
543  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_NUM_MAX_BFRAMES);
544  if (ret < avctx->max_b_frames) {
545  av_log(avctx, AV_LOG_WARNING, "Max B-frames %d exceed %d\n",
546  avctx->max_b_frames, ret);
547 
548  return AVERROR(ENOSYS);
549  }
550 
551  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_FIELD_ENCODING);
552  if (ret < 1 && avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
553  av_log(avctx, AV_LOG_WARNING,
554  "Interlaced encoding is not supported. Supported level: %d\n",
555  ret);
556  return AVERROR(ENOSYS);
557  }
558 
559  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_10BIT_ENCODE);
560  if ((IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) && ret <= 0) {
561  av_log(avctx, AV_LOG_WARNING, "10 bit encode not supported\n");
562  return AVERROR(ENOSYS);
563  }
564 
565  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOOKAHEAD);
566  if (ctx->rc_lookahead > 0 && ret <= 0) {
567  av_log(avctx, AV_LOG_WARNING, "RC lookahead not supported\n");
568  return AVERROR(ENOSYS);
569  }
570 
571  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_TEMPORAL_AQ);
572  if (ctx->temporal_aq > 0 && ret <= 0) {
573  av_log(avctx, AV_LOG_WARNING, "Temporal AQ not supported\n");
574  return AVERROR(ENOSYS);
575  }
576 
577  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_WEIGHTED_PREDICTION);
578  if (ctx->weighted_pred > 0 && ret <= 0) {
579  av_log (avctx, AV_LOG_WARNING, "Weighted Prediction not supported\n");
580  return AVERROR(ENOSYS);
581  }
582 
583  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_CABAC);
584  if (ctx->coder == NV_ENC_H264_ENTROPY_CODING_MODE_CABAC && ret <= 0) {
585  av_log(avctx, AV_LOG_WARNING, "CABAC entropy coding not supported\n");
586  return AVERROR(ENOSYS);
587  }
588 
589 #ifdef NVENC_HAVE_BFRAME_REF_MODE
590  tmp = (ctx->b_ref_mode >= 0) ? ctx->b_ref_mode : NV_ENC_BFRAME_REF_MODE_DISABLED;
591  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_BFRAME_REF_MODE);
592  if (tmp == NV_ENC_BFRAME_REF_MODE_EACH && ret != 1 && ret != 3) {
593  av_log(avctx, AV_LOG_WARNING, "Each B frame as reference is not supported\n");
594  return AVERROR(ENOSYS);
595  } else if (tmp != NV_ENC_BFRAME_REF_MODE_DISABLED && ret == 0) {
596  av_log(avctx, AV_LOG_WARNING, "B frames as references are not supported\n");
597  return AVERROR(ENOSYS);
598  }
599 #else
600  tmp = (ctx->b_ref_mode >= 0) ? ctx->b_ref_mode : 0;
601  if (tmp > 0) {
602  av_log(avctx, AV_LOG_WARNING, "B frames as references need SDK 8.1 at build time\n");
603  return AVERROR(ENOSYS);
604  }
605 #endif
606 
607 #ifdef NVENC_HAVE_MULTIPLE_REF_FRAMES
608  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_MULTIPLE_REF_FRAMES);
609  if(avctx->refs != NV_ENC_NUM_REF_FRAMES_AUTOSELECT && ret <= 0) {
610  av_log(avctx, AV_LOG_WARNING, "Multiple reference frames are not supported by the device\n");
611  return AVERROR(ENOSYS);
612  }
613 #else
614  if(avctx->refs != 0) {
615  av_log(avctx, AV_LOG_WARNING, "Multiple reference frames need SDK 9.1 at build time\n");
616  return AVERROR(ENOSYS);
617  }
618 #endif
619 
620 #ifdef NVENC_HAVE_SINGLE_SLICE_INTRA_REFRESH
621  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SINGLE_SLICE_INTRA_REFRESH);
622  if(ctx->single_slice_intra_refresh && ret <= 0) {
623  av_log(avctx, AV_LOG_WARNING, "Single slice intra refresh not supported by the device\n");
624  return AVERROR(ENOSYS);
625  }
626 #else
627  if(ctx->single_slice_intra_refresh) {
628  av_log(avctx, AV_LOG_WARNING, "Single slice intra refresh needs SDK 11.1 at build time\n");
629  return AVERROR(ENOSYS);
630  }
631 #endif
632 
633  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_INTRA_REFRESH);
634  if((ctx->intra_refresh || ctx->single_slice_intra_refresh) && ret <= 0) {
635  av_log(avctx, AV_LOG_WARNING, "Intra refresh not supported by the device\n");
636  return AVERROR(ENOSYS);
637  }
638 
639 #ifndef NVENC_HAVE_HEVC_CONSTRAINED_ENCODING
640  if (ctx->constrained_encoding && avctx->codec->id == AV_CODEC_ID_HEVC) {
641  av_log(avctx, AV_LOG_WARNING, "HEVC constrained encoding needs SDK 10.0 at build time\n");
642  return AVERROR(ENOSYS);
643  }
644 #endif
645 
646  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_CONSTRAINED_ENCODING);
647  if(ctx->constrained_encoding && ret <= 0) {
648  av_log(avctx, AV_LOG_WARNING, "Constrained encoding not supported by the device\n");
649  return AVERROR(ENOSYS);
650  }
651 
652 #if defined(NVENC_HAVE_TEMPORAL_FILTER) || defined(NVENC_HAVE_H264_AND_AV1_TEMPORAL_FILTER)
653  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_TEMPORAL_FILTER);
654  if(ctx->tf_level > 0 && ret <= 0) {
655  av_log(avctx, AV_LOG_WARNING, "Temporal filtering not supported by the device\n");
656  return AVERROR(ENOSYS);
657  }
658 #endif
659 
660 #ifdef NVENC_HAVE_LOOKAHEAD_LEVEL
661  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOOKAHEAD_LEVEL);
662  if(ctx->rc_lookahead > 0 && ctx->lookahead_level > 0 &&
663  ctx->lookahead_level != NV_ENC_LOOKAHEAD_LEVEL_AUTOSELECT &&
664  ctx->lookahead_level > ret)
665  {
666  av_log(avctx, AV_LOG_WARNING, "Lookahead level not supported. Maximum level: %d\n", ret);
667  return AVERROR(ENOSYS);
668  }
669 #endif
670 
671 #ifdef NVENC_HAVE_UNIDIR_B
672  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_UNIDIRECTIONAL_B);
673  if(ctx->unidir_b && ret <= 0) {
674  av_log(avctx, AV_LOG_WARNING, "Unidirectional B-Frames not supported by the device\n");
675  return AVERROR(ENOSYS);
676  }
677 #endif
678 
679  ctx->support_dyn_bitrate = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_DYN_BITRATE_CHANGE);
680 
681 #ifdef NVENC_HAVE_MVHEVC
682  ctx->multiview_supported = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_MVHEVC_ENCODE) > 0;
683  if (avctx->codec_id == AV_CODEC_ID_HEVC &&
684  ctx->profile == NV_ENC_HEVC_PROFILE_MULTIVIEW_MAIN &&
685  !ctx->multiview_supported) {
686  av_log(avctx, AV_LOG_WARNING, "Multiview not supported by the device\n");
687  return AVERROR(ENOSYS);
688  }
689 #endif
690 
691  return 0;
692 }
693 
694 static av_cold int nvenc_check_device(AVCodecContext *avctx, int idx)
695 {
696  NvencContext *ctx = avctx->priv_data;
697  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
698  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
699  char name[128] = { 0};
700  int major, minor, ret;
701  CUdevice cu_device;
702  int loglevel = AV_LOG_VERBOSE;
703 
704  if (ctx->device == LIST_DEVICES)
705  loglevel = AV_LOG_INFO;
706 
707  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceGet(&cu_device, idx));
708  if (ret < 0)
709  return ret;
710 
711  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceGetName(name, sizeof(name), cu_device));
712  if (ret < 0)
713  return ret;
714 
715  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceComputeCapability(&major, &minor, cu_device));
716  if (ret < 0)
717  return ret;
718 
719  av_log(avctx, loglevel, "[ GPU #%d - < %s > has Compute SM %d.%d ]\n", idx, name, major, minor);
720  if (((major << 4) | minor) < NVENC_CAP) {
721  av_log(avctx, loglevel, "does not support NVENC\n");
722  goto fail;
723  }
724 
725  if (ctx->device != idx && ctx->device != ANY_DEVICE)
726  return -1;
727 
728  ret = CHECK_CU(dl_fn->cuda_dl->cuCtxCreate(&ctx->cu_context_internal, 0, cu_device));
729  if (ret < 0)
730  goto fail;
731 
732  ctx->cu_context = ctx->cu_context_internal;
733  ctx->cu_stream = NULL;
734 
735  if ((ret = nvenc_pop_context(avctx)) < 0)
736  goto fail2;
737 
738  if ((ret = nvenc_open_session(avctx)) < 0)
739  goto fail2;
740 
741  if ((ret = nvenc_check_capabilities(avctx)) < 0)
742  goto fail3;
743 
744  av_log(avctx, loglevel, "supports NVENC\n");
745 
746  dl_fn->nvenc_device_count++;
747 
748  if (ctx->device == idx || ctx->device == ANY_DEVICE)
749  return 0;
750 
751 fail3:
752  if ((ret = nvenc_push_context(avctx)) < 0)
753  return ret;
754 
755  p_nvenc->nvEncDestroyEncoder(ctx->nvencoder);
756  ctx->nvencoder = NULL;
757 
758  if ((ret = nvenc_pop_context(avctx)) < 0)
759  return ret;
760 
761 fail2:
762  CHECK_CU(dl_fn->cuda_dl->cuCtxDestroy(ctx->cu_context_internal));
763  ctx->cu_context_internal = NULL;
764 
765 fail:
766  return AVERROR(ENOSYS);
767 }
768 
769 static av_cold int nvenc_setup_device(AVCodecContext *avctx)
770 {
771  NvencContext *ctx = avctx->priv_data;
772  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
773 
774  switch (avctx->codec->id) {
775  case AV_CODEC_ID_H264:
776  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_H264_GUID;
777  break;
778  case AV_CODEC_ID_HEVC:
779  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_HEVC_GUID;
780  break;
781 #if CONFIG_AV1_NVENC_ENCODER
782  case AV_CODEC_ID_AV1:
783  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_AV1_GUID;
784  break;
785 #endif
786  default:
787  return AVERROR_BUG;
788  }
789 
790  nvenc_map_preset(ctx);
791 
792  if (ctx->flags & NVENC_DEPRECATED_PRESET)
793  av_log(avctx, AV_LOG_WARNING, "The selected preset is deprecated. Use p1 to p7 + -tune or fast/medium/slow.\n");
794 
795  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11 || avctx->hw_frames_ctx || avctx->hw_device_ctx) {
796  AVHWFramesContext *frames_ctx;
797  AVHWDeviceContext *hwdev_ctx;
798  AVCUDADeviceContext *cuda_device_hwctx = NULL;
799 #if CONFIG_D3D11VA
800  AVD3D11VADeviceContext *d3d11_device_hwctx = NULL;
801 #endif
802  int ret;
803 
804  if (avctx->hw_frames_ctx) {
805  frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
806  if (frames_ctx->format == AV_PIX_FMT_CUDA)
807  cuda_device_hwctx = frames_ctx->device_ctx->hwctx;
808 #if CONFIG_D3D11VA
809  else if (frames_ctx->format == AV_PIX_FMT_D3D11)
810  d3d11_device_hwctx = frames_ctx->device_ctx->hwctx;
811 #endif
812  else
813  return AVERROR(EINVAL);
814  } else if (avctx->hw_device_ctx) {
815  hwdev_ctx = (AVHWDeviceContext*)avctx->hw_device_ctx->data;
816  if (hwdev_ctx->type == AV_HWDEVICE_TYPE_CUDA)
817  cuda_device_hwctx = hwdev_ctx->hwctx;
818 #if CONFIG_D3D11VA
819  else if (hwdev_ctx->type == AV_HWDEVICE_TYPE_D3D11VA)
820  d3d11_device_hwctx = hwdev_ctx->hwctx;
821 #endif
822  else
823  return AVERROR(EINVAL);
824  } else {
825  return AVERROR(EINVAL);
826  }
827 
828  if (cuda_device_hwctx) {
829  ctx->cu_context = cuda_device_hwctx->cuda_ctx;
830  ctx->cu_stream = cuda_device_hwctx->stream;
831  }
832 #if CONFIG_D3D11VA
833  else if (d3d11_device_hwctx) {
834  ctx->d3d11_device = d3d11_device_hwctx->device;
835  ID3D11Device_AddRef(ctx->d3d11_device);
836  }
837 #endif
838 
839  ret = nvenc_open_session(avctx);
840  if (ret < 0)
841  return ret;
842 
843  ret = nvenc_check_capabilities(avctx);
844  if (ret < 0) {
845  av_log(avctx, AV_LOG_FATAL, "Provided device doesn't support required NVENC features\n");
846  return ret;
847  }
848  } else {
849  int i, nb_devices = 0;
850 
851  if (CHECK_CU(dl_fn->cuda_dl->cuInit(0)) < 0)
852  return AVERROR_UNKNOWN;
853 
854  if (CHECK_CU(dl_fn->cuda_dl->cuDeviceGetCount(&nb_devices)) < 0)
855  return AVERROR_UNKNOWN;
856 
857  if (!nb_devices) {
858  av_log(avctx, AV_LOG_FATAL, "No CUDA capable devices found\n");
859  return AVERROR_EXTERNAL;
860  }
861 
862  av_log(avctx, AV_LOG_VERBOSE, "%d CUDA capable devices found\n", nb_devices);
863 
864  dl_fn->nvenc_device_count = 0;
865  for (i = 0; i < nb_devices; ++i) {
866  if ((nvenc_check_device(avctx, i)) >= 0 && ctx->device != LIST_DEVICES)
867  return 0;
868  }
869 
870  if (ctx->device == LIST_DEVICES)
871  return AVERROR_EXIT;
872 
873  if (!dl_fn->nvenc_device_count) {
874  av_log(avctx, AV_LOG_FATAL, "No capable devices found\n");
875  return AVERROR_EXTERNAL;
876  }
877 
878  av_log(avctx, AV_LOG_FATAL, "Requested GPU %d, but only %d GPUs are available!\n", ctx->device, nb_devices);
879  return AVERROR(EINVAL);
880  }
881 
882  return 0;
883 }
884 
885 static av_cold void set_constqp(AVCodecContext *avctx)
886 {
887  NvencContext *ctx = avctx->priv_data;
888  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
889 #if CONFIG_AV1_NVENC_ENCODER
890  int qmax = avctx->codec->id == AV_CODEC_ID_AV1 ? 255 : 51;
891 #else
892  int qmax = 51;
893 #endif
894 
895  rc->rateControlMode = NV_ENC_PARAMS_RC_CONSTQP;
896 
897  if (ctx->init_qp_p >= 0) {
898  rc->constQP.qpInterP = ctx->init_qp_p;
899  if (ctx->init_qp_i >= 0 && ctx->init_qp_b >= 0) {
900  rc->constQP.qpIntra = ctx->init_qp_i;
901  rc->constQP.qpInterB = ctx->init_qp_b;
902  } else if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
903  rc->constQP.qpIntra = av_clip(
904  rc->constQP.qpInterP * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, qmax);
905  rc->constQP.qpInterB = av_clip(
906  rc->constQP.qpInterP * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, qmax);
907  } else {
908  rc->constQP.qpIntra = rc->constQP.qpInterP;
909  rc->constQP.qpInterB = rc->constQP.qpInterP;
910  }
911  } else if (ctx->cqp >= 0) {
912  rc->constQP.qpInterP = rc->constQP.qpInterB = rc->constQP.qpIntra = ctx->cqp;
913  if (avctx->b_quant_factor != 0.0)
914  rc->constQP.qpInterB = av_clip(ctx->cqp * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, qmax);
915  if (avctx->i_quant_factor != 0.0)
916  rc->constQP.qpIntra = av_clip(ctx->cqp * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, qmax);
917  }
918 
919  avctx->qmin = ctx->qmin = -1;
920  avctx->qmax = ctx->qmax = -1;
921 }
922 
923 static av_cold void set_vbr(AVCodecContext *avctx)
924 {
925  NvencContext *ctx = avctx->priv_data;
926  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
927  int qp_inter_p;
928 #if CONFIG_AV1_NVENC_ENCODER
929  int qmax = avctx->codec->id == AV_CODEC_ID_AV1 ? 255 : 51;
930 #else
931  int qmax = 51;
932 #endif
933 
934  if (avctx->qmin >= 0 || avctx->qmax >= 0)
935  av_log(avctx, AV_LOG_WARNING, "Passing qmin/qmax via global AVCodecContext options. Use encoder options instead.\n");
936 
937  if (avctx->qmin >= 0 && ctx->qmin < 0)
938  ctx->qmin = avctx->qmin;
939  if (avctx->qmax >= 0 && ctx->qmax < 0)
940  ctx->qmax = avctx->qmax;
941  avctx->qmin = ctx->qmin;
942  avctx->qmax = ctx->qmax;
943 
944  if (ctx->qmin >= 0 && ctx->qmax >= 0) {
945  rc->enableMinQP = 1;
946  rc->enableMaxQP = 1;
947 
948  rc->minQP.qpInterB = ctx->qmin;
949  rc->minQP.qpInterP = ctx->qmin;
950  rc->minQP.qpIntra = ctx->qmin;
951 
952  rc->maxQP.qpInterB = ctx->qmax;
953  rc->maxQP.qpInterP = ctx->qmax;
954  rc->maxQP.qpIntra = ctx->qmax;
955 
956  qp_inter_p = (ctx->qmax + 3 * ctx->qmin) / 4; // biased towards Qmin
957  } else if (ctx->qmin >= 0) {
958  rc->enableMinQP = 1;
959 
960  rc->minQP.qpInterB = ctx->qmin;
961  rc->minQP.qpInterP = ctx->qmin;
962  rc->minQP.qpIntra = ctx->qmin;
963 
964  qp_inter_p = ctx->qmin;
965  } else {
966  qp_inter_p = 26; // default to 26
967  }
968 
969  rc->enableInitialRCQP = 1;
970 
971  if (ctx->init_qp_p < 0) {
972  rc->initialRCQP.qpInterP = qp_inter_p;
973  } else {
974  rc->initialRCQP.qpInterP = ctx->init_qp_p;
975  }
976 
977  if (ctx->init_qp_i < 0) {
978  if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
979  rc->initialRCQP.qpIntra = av_clip(
980  rc->initialRCQP.qpInterP * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, qmax);
981  } else {
982  rc->initialRCQP.qpIntra = rc->initialRCQP.qpInterP;
983  }
984  } else {
985  rc->initialRCQP.qpIntra = ctx->init_qp_i;
986  }
987 
988  if (ctx->init_qp_b < 0) {
989  if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
990  rc->initialRCQP.qpInterB = av_clip(
991  rc->initialRCQP.qpInterP * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, qmax);
992  } else {
993  rc->initialRCQP.qpInterB = rc->initialRCQP.qpInterP;
994  }
995  } else {
996  rc->initialRCQP.qpInterB = ctx->init_qp_b;
997  }
998 }
999 
1000 static av_cold void set_lossless(AVCodecContext *avctx)
1001 {
1002  NvencContext *ctx = avctx->priv_data;
1003  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
1004 
1005  rc->rateControlMode = NV_ENC_PARAMS_RC_CONSTQP;
1006  rc->constQP.qpInterB = 0;
1007  rc->constQP.qpInterP = 0;
1008  rc->constQP.qpIntra = 0;
1009 
1010  avctx->qmin = ctx->qmin = -1;
1011  avctx->qmax = ctx->qmax = -1;
1012 }
1013 
1014 static void nvenc_override_rate_control(AVCodecContext *avctx)
1015 {
1016  NvencContext *ctx = avctx->priv_data;
1017  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
1018 
1019  switch (ctx->rc) {
1020  case NV_ENC_PARAMS_RC_CONSTQP:
1021  set_constqp(avctx);
1022  return;
1023 #ifndef NVENC_NO_DEPRECATED_RC
1024  case NV_ENC_PARAMS_RC_VBR_MINQP:
1025  if (avctx->qmin < 0 && ctx->qmin < 0) {
1026  av_log(avctx, AV_LOG_WARNING,
1027  "The variable bitrate rate-control requires "
1028  "the 'qmin' option set.\n");
1029  set_vbr(avctx);
1030  return;
1031  }
1032  /* fall through */
1033  case NV_ENC_PARAMS_RC_VBR_HQ:
1034 #endif
1035  case NV_ENC_PARAMS_RC_VBR:
1036  set_vbr(avctx);
1037  break;
1038  case NV_ENC_PARAMS_RC_CBR:
1039 #ifndef NVENC_NO_DEPRECATED_RC
1040  case NV_ENC_PARAMS_RC_CBR_HQ:
1041  case NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ:
1042 #endif
1043  break;
1044  }
1045 
1046  rc->rateControlMode = ctx->rc;
1047 }
1048 
1049 static av_cold int nvenc_recalc_surfaces(AVCodecContext *avctx)
1050 {
1051  NvencContext *ctx = avctx->priv_data;
1052  // default minimum of 4 surfaces
1053  // multiply by 2 for number of NVENCs on gpu (hardcode to 2)
1054  // another multiply by 2 to avoid blocking next PBB group
1055  int nb_surfaces = FFMAX(4, ctx->encode_config.frameIntervalP * 2 * 2);
1056 
1057  // lookahead enabled
1058  if (ctx->rc_lookahead > 0) {
1059  // +1 is to account for lkd_bound calculation later
1060  // +4 is to allow sufficient pipelining with lookahead
1061  nb_surfaces = FFMAX(1, FFMAX(nb_surfaces, ctx->rc_lookahead + ctx->encode_config.frameIntervalP + 1 + 4));
1062  if (nb_surfaces > ctx->nb_surfaces && ctx->nb_surfaces > 0)
1063  {
1064  av_log(avctx, AV_LOG_WARNING,
1065  "Defined rc_lookahead requires more surfaces, "
1066  "increasing used surfaces %d -> %d\n", ctx->nb_surfaces, nb_surfaces);
1067  }
1068  ctx->nb_surfaces = FFMAX(nb_surfaces, ctx->nb_surfaces);
1069  } else {
1070  if (ctx->encode_config.frameIntervalP > 1 && ctx->nb_surfaces < nb_surfaces && ctx->nb_surfaces > 0)
1071  {
1072  av_log(avctx, AV_LOG_WARNING,
1073  "Defined b-frame requires more surfaces, "
1074  "increasing used surfaces %d -> %d\n", ctx->nb_surfaces, nb_surfaces);
1075  ctx->nb_surfaces = FFMAX(ctx->nb_surfaces, nb_surfaces);
1076  }
1077  else if (ctx->nb_surfaces <= 0)
1078  ctx->nb_surfaces = nb_surfaces;
1079  // otherwise use user specified value
1080  }
1081 
1082  ctx->nb_surfaces = FFMAX(1, FFMIN(MAX_REGISTERED_FRAMES, ctx->nb_surfaces));
1083  ctx->async_depth = FFMIN(ctx->async_depth, ctx->nb_surfaces - 1);
1084 
1085  // Output in the worst case will only start when the surface buffer is completely full.
1086  // Hence we need to keep at least the max amount of surfaces plus the max reorder delay around.
1087  ctx->frame_data_array_nb = FFMAX(ctx->nb_surfaces, ctx->nb_surfaces + ctx->encode_config.frameIntervalP - 1);
1088 
1089  return 0;
1090 }
1091 
1092 static av_cold int nvenc_setup_rate_control(AVCodecContext *avctx)
1093 {
1094  NvencContext *ctx = avctx->priv_data;
1095 
1096  if (avctx->global_quality > 0)
1097  av_log(avctx, AV_LOG_WARNING, "Using global_quality with nvenc is deprecated. Use qp instead.\n");
1098 
1099  if (ctx->cqp < 0 && avctx->global_quality > 0)
1100  ctx->cqp = avctx->global_quality;
1101 
1102  if (avctx->bit_rate > 0) {
1103  ctx->encode_config.rcParams.averageBitRate = avctx->bit_rate;
1104  } else if (ctx->encode_config.rcParams.averageBitRate > 0) {
1105  ctx->encode_config.rcParams.maxBitRate = ctx->encode_config.rcParams.averageBitRate;
1106  }
1107 
1108  if (avctx->rc_max_rate > 0)
1109  ctx->encode_config.rcParams.maxBitRate = avctx->rc_max_rate;
1110 
1111 #ifdef NVENC_HAVE_MULTIPASS
1112  ctx->encode_config.rcParams.multiPass = ctx->multipass;
1113 
1114  if (ctx->flags & NVENC_ONE_PASS)
1115  ctx->encode_config.rcParams.multiPass = NV_ENC_MULTI_PASS_DISABLED;
1116  if (ctx->flags & NVENC_TWO_PASSES || ctx->twopass > 0)
1117  ctx->encode_config.rcParams.multiPass = NV_ENC_TWO_PASS_FULL_RESOLUTION;
1118 
1119  if (ctx->rc < 0) {
1120  if (ctx->cbr) {
1121  ctx->rc = NV_ENC_PARAMS_RC_CBR;
1122  } else if (ctx->cqp >= 0) {
1123  ctx->rc = NV_ENC_PARAMS_RC_CONSTQP;
1124  } else if (ctx->quality >= 0.0f) {
1125  ctx->rc = NV_ENC_PARAMS_RC_VBR;
1126  }
1127  }
1128 #else
1129  if (ctx->rc < 0) {
1130  if (ctx->flags & NVENC_ONE_PASS)
1131  ctx->twopass = 0;
1132  if (ctx->flags & NVENC_TWO_PASSES)
1133  ctx->twopass = 1;
1134 
1135  if (ctx->twopass < 0)
1136  ctx->twopass = (ctx->flags & NVENC_LOWLATENCY) != 0;
1137 
1138  if (ctx->cbr) {
1139  if (ctx->twopass) {
1140  ctx->rc = NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ;
1141  } else {
1142  ctx->rc = NV_ENC_PARAMS_RC_CBR;
1143  }
1144  } else if (ctx->cqp >= 0) {
1145  ctx->rc = NV_ENC_PARAMS_RC_CONSTQP;
1146  } else if (ctx->twopass) {
1147  ctx->rc = NV_ENC_PARAMS_RC_VBR_HQ;
1148  } else if ((avctx->qmin >= 0 && avctx->qmax >= 0) ||
1149  (ctx->qmin >= 0 && ctx->qmax >= 0)) {
1150  ctx->rc = NV_ENC_PARAMS_RC_VBR_MINQP;
1151  }
1152  }
1153 #endif
1154 
1155  if (ctx->rc >= 0 && ctx->rc & RC_MODE_DEPRECATED) {
1156  av_log(avctx, AV_LOG_WARNING, "Specified rc mode is deprecated.\n");
1157  av_log(avctx, AV_LOG_WARNING, "Use -rc constqp/cbr/vbr, -tune and -multipass instead.\n");
1158 
1159  ctx->rc &= ~RC_MODE_DEPRECATED;
1160  }
1161 
1162 #ifdef NVENC_HAVE_QP_CHROMA_OFFSETS
1163  ctx->encode_config.rcParams.cbQPIndexOffset = ctx->qp_cb_offset;
1164  ctx->encode_config.rcParams.crQPIndexOffset = ctx->qp_cr_offset;
1165 #else
1166  if (ctx->qp_cb_offset || ctx->qp_cr_offset)
1167  av_log(avctx, AV_LOG_WARNING, "Failed setting QP CB/CR offsets, SDK 11.1 or greater required at compile time.\n");
1168 #endif
1169 
1170 #ifdef NVENC_HAVE_LDKFS
1171  if (ctx->ldkfs)
1172  ctx->encode_config.rcParams.lowDelayKeyFrameScale = ctx->ldkfs;
1173 #endif
1174 
1175  if (ctx->flags & NVENC_LOSSLESS) {
1176  set_lossless(avctx);
1177  } else if (ctx->rc >= 0) {
1178  nvenc_override_rate_control(avctx);
1179  } else {
1180  ctx->encode_config.rcParams.rateControlMode = NV_ENC_PARAMS_RC_VBR;
1181  set_vbr(avctx);
1182  }
1183 
1184  if (avctx->rc_buffer_size > 0) {
1185  ctx->encode_config.rcParams.vbvBufferSize = avctx->rc_buffer_size;
1186  } else if (ctx->encode_config.rcParams.averageBitRate > 0) {
1187  avctx->rc_buffer_size = ctx->encode_config.rcParams.vbvBufferSize = 2 * ctx->encode_config.rcParams.averageBitRate;
1188  }
1189 
1190  if (ctx->aq) {
1191  ctx->encode_config.rcParams.enableAQ = 1;
1192  ctx->encode_config.rcParams.aqStrength = ctx->aq_strength;
1193  av_log(avctx, AV_LOG_VERBOSE, "AQ enabled.\n");
1194  }
1195 
1196  if (ctx->temporal_aq) {
1197  ctx->encode_config.rcParams.enableTemporalAQ = 1;
1198  av_log(avctx, AV_LOG_VERBOSE, "Temporal AQ enabled.\n");
1199  }
1200 
1201  if (ctx->rc_lookahead > 0) {
1202  int lkd_bound = FFMIN(ctx->nb_surfaces, ctx->async_depth) -
1203  ctx->encode_config.frameIntervalP - 4;
1204 
1205  if (lkd_bound < 0) {
1206  ctx->encode_config.rcParams.enableLookahead = 0;
1207  av_log(avctx, AV_LOG_WARNING,
1208  "Lookahead not enabled. Increase buffer delay (-delay).\n");
1209  } else {
1210  ctx->encode_config.rcParams.enableLookahead = 1;
1211  ctx->encode_config.rcParams.lookaheadDepth = av_clip(ctx->rc_lookahead, 0, lkd_bound);
1212  ctx->encode_config.rcParams.disableIadapt = ctx->no_scenecut;
1213  ctx->encode_config.rcParams.disableBadapt = !ctx->b_adapt;
1214  av_log(avctx, AV_LOG_VERBOSE,
1215  "Lookahead enabled: depth %d, scenecut %s, B-adapt %s.\n",
1216  ctx->encode_config.rcParams.lookaheadDepth,
1217  ctx->encode_config.rcParams.disableIadapt ? "disabled" : "enabled",
1218  ctx->encode_config.rcParams.disableBadapt ? "disabled" : "enabled");
1219  if (ctx->encode_config.rcParams.lookaheadDepth < ctx->rc_lookahead)
1220  av_log(avctx, AV_LOG_WARNING, "Clipping lookahead depth to %d (from %d) due to lack of surfaces/delay",
1221  ctx->encode_config.rcParams.lookaheadDepth, ctx->rc_lookahead);
1222 
1223 #ifdef NVENC_HAVE_LOOKAHEAD_LEVEL
1224  if (ctx->lookahead_level >= 0) {
1225  switch (ctx->lookahead_level) {
1226  case NV_ENC_LOOKAHEAD_LEVEL_0:
1227  case NV_ENC_LOOKAHEAD_LEVEL_1:
1228  case NV_ENC_LOOKAHEAD_LEVEL_2:
1229  case NV_ENC_LOOKAHEAD_LEVEL_3:
1230  case NV_ENC_LOOKAHEAD_LEVEL_AUTOSELECT:
1231  break;
1232  default:
1233  av_log(avctx, AV_LOG_ERROR, "Invalid lookahead level.\n");
1234  return AVERROR(EINVAL);
1235  }
1236 
1237  ctx->encode_config.rcParams.lookaheadLevel = ctx->lookahead_level;
1238  }
1239 #endif
1240  }
1241  }
1242 
1243  if (ctx->strict_gop) {
1244  ctx->encode_config.rcParams.strictGOPTarget = 1;
1245  av_log(avctx, AV_LOG_VERBOSE, "Strict GOP target enabled.\n");
1246  }
1247 
1248  if (ctx->nonref_p)
1249  ctx->encode_config.rcParams.enableNonRefP = 1;
1250 
1251  if (ctx->zerolatency)
1252  ctx->encode_config.rcParams.zeroReorderDelay = 1;
1253 
1254  if (ctx->quality) {
1255  //convert from float to fixed point 8.8
1256  int tmp_quality = (int)(ctx->quality * 256.0f);
1257  ctx->encode_config.rcParams.targetQuality = (uint8_t)(tmp_quality >> 8);
1258  ctx->encode_config.rcParams.targetQualityLSB = (uint8_t)(tmp_quality & 0xff);
1259 
1260  av_log(avctx, AV_LOG_VERBOSE, "CQ(%d) mode enabled.\n", tmp_quality);
1261 
1262  // CQ mode shall discard avg bitrate/vbv buffer size and honor only max bitrate
1263  ctx->encode_config.rcParams.averageBitRate = avctx->bit_rate = 0;
1264  ctx->encode_config.rcParams.vbvBufferSize = avctx->rc_buffer_size = 0;
1265  ctx->encode_config.rcParams.maxBitRate = avctx->rc_max_rate;
1266  }
1267 
1268  return 0;
1269 }
1270 
1271 static av_cold int nvenc_setup_h264_config(AVCodecContext *avctx)
1272 {
1273  NvencContext *ctx = avctx->priv_data;
1274  NV_ENC_CONFIG *cc = &ctx->encode_config;
1275  NV_ENC_CONFIG_H264 *h264 = &cc->encodeCodecConfig.h264Config;
1276  NV_ENC_CONFIG_H264_VUI_PARAMETERS *vui = &h264->h264VUIParameters;
1277 
1278  const AVPixFmtDescriptor *pixdesc = av_pix_fmt_desc_get(ctx->data_pix_fmt);
1279 
1280  if ((pixdesc->flags & AV_PIX_FMT_FLAG_RGB) && !IS_GBRP(ctx->data_pix_fmt)) {
1281  vui->colourMatrix = to_nv_color_matrix(AVCOL_SPC_BT470BG);
1282  vui->colourPrimaries = to_nv_color_pri(avctx->color_primaries);
1283  vui->transferCharacteristics = to_nv_color_trc(avctx->color_trc);
1284  vui->videoFullRangeFlag = 0;
1285  } else {
1286  vui->colourMatrix = to_nv_color_matrix(IS_GBRP(ctx->data_pix_fmt) ? AVCOL_SPC_RGB : avctx->colorspace);
1287  vui->colourPrimaries = to_nv_color_pri(avctx->color_primaries);
1288  vui->transferCharacteristics = to_nv_color_trc(avctx->color_trc);
1289  vui->videoFullRangeFlag = (avctx->color_range == AVCOL_RANGE_JPEG
1290  || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
1291  }
1292 
1293  vui->colourDescriptionPresentFlag =
1294  (vui->colourMatrix != 2 || vui->colourPrimaries != 2 || vui->transferCharacteristics != 2);
1295 
1296  vui->videoSignalTypePresentFlag =
1297  (vui->colourDescriptionPresentFlag
1298  || vui->videoFormat != 5
1299  || vui->videoFullRangeFlag != 0);
1300 
1301  if (ctx->max_slice_size > 0) {
1302  h264->sliceMode = 1;
1303  h264->sliceModeData = ctx->max_slice_size;
1304  } else {
1305  h264->sliceMode = 3;
1306  h264->sliceModeData = avctx->slices > 0 ? avctx->slices : 1;
1307  }
1308 
1309  if (ctx->intra_refresh) {
1310  h264->enableIntraRefresh = 1;
1311  h264->intraRefreshPeriod = cc->gopLength;
1312  h264->intraRefreshCnt = cc->gopLength - 1;
1313  cc->gopLength = NVENC_INFINITE_GOPLENGTH;
1314  h264->outputRecoveryPointSEI = 1;
1315 #ifdef NVENC_HAVE_SINGLE_SLICE_INTRA_REFRESH
1316  h264->singleSliceIntraRefresh = ctx->single_slice_intra_refresh;
1317 #endif
1318  }
1319 
1320  if (ctx->constrained_encoding)
1321  h264->enableConstrainedEncoding = 1;
1322 
1323  h264->disableSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 1 : 0;
1324  h264->repeatSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 0 : 1;
1325  h264->outputAUD = ctx->aud;
1326 
1327  if (ctx->dpb_size >= 0) {
1328  /* 0 means "let the hardware decide" */
1329  h264->maxNumRefFrames = ctx->dpb_size;
1330  }
1331 
1332  h264->idrPeriod = cc->gopLength;
1333 
1334  if (IS_CBR(cc->rcParams.rateControlMode)) {
1335  /* Older SDKs use outputBufferingPeriodSEI to control filler data */
1336  h264->outputBufferingPeriodSEI = ctx->cbr_padding;
1337 
1338 #ifdef NVENC_HAVE_FILLER_DATA
1339  h264->enableFillerDataInsertion = ctx->cbr_padding;
1340 #endif
1341  }
1342 
1343  h264->outputPictureTimingSEI = 1;
1344 
1345 #ifndef NVENC_NO_DEPRECATED_RC
1346  if (cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ ||
1347  cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_CBR_HQ ||
1348  cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_VBR_HQ) {
1349  h264->adaptiveTransformMode = NV_ENC_H264_ADAPTIVE_TRANSFORM_ENABLE;
1350  h264->fmoMode = NV_ENC_H264_FMO_DISABLE;
1351  }
1352 #endif
1353 
1354  if (ctx->flags & NVENC_LOSSLESS) {
1355  h264->qpPrimeYZeroTransformBypassFlag = 1;
1356  } else {
1357  switch(ctx->profile) {
1358  case NV_ENC_H264_PROFILE_BASELINE:
1359  cc->profileGUID = NV_ENC_H264_PROFILE_BASELINE_GUID;
1360  avctx->profile = AV_PROFILE_H264_BASELINE;
1361  break;
1362  case NV_ENC_H264_PROFILE_MAIN:
1363  cc->profileGUID = NV_ENC_H264_PROFILE_MAIN_GUID;
1364  avctx->profile = AV_PROFILE_H264_MAIN;
1365  break;
1366  case NV_ENC_H264_PROFILE_HIGH:
1367  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_GUID;
1368  avctx->profile = AV_PROFILE_H264_HIGH;
1369  break;
1370 #ifdef NVENC_HAVE_H264_10BIT_SUPPORT
1371  case NV_ENC_H264_PROFILE_HIGH_10:
1372  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_10_GUID;
1373  avctx->profile = AV_PROFILE_H264_HIGH_10;
1374  break;
1375 #endif
1376 #ifdef NVENC_HAVE_422_SUPPORT
1377  case NV_ENC_H264_PROFILE_HIGH_422:
1378  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_422_GUID;
1379  avctx->profile = AV_PROFILE_H264_HIGH_422;
1380  break;
1381 #endif
1382  case NV_ENC_H264_PROFILE_HIGH_444P:
1383  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_444_GUID;
1384  avctx->profile = AV_PROFILE_H264_HIGH_444_PREDICTIVE;
1385  break;
1386  }
1387  }
1388 
1389 #ifdef NVENC_HAVE_H264_10BIT_SUPPORT
1390  // force setting profile as high10 if input is 10 bit or if it should be encoded as 10 bit
1391  if (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) {
1392  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_10_GUID;
1393  avctx->profile = AV_PROFILE_H264_HIGH_10;
1394  }
1395 #endif
1396 
1397  // force setting profile as high444p if input is AV_PIX_FMT_YUV444P
1398  if (IS_YUV444(ctx->data_pix_fmt)) {
1399  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_444_GUID;
1400  avctx->profile = AV_PROFILE_H264_HIGH_444_PREDICTIVE;
1401  }
1402 
1403 #ifdef NVENC_HAVE_422_SUPPORT
1404  // force setting profile as high422p if input is AV_PIX_FMT_YUV422P
1405  if (IS_YUV422(ctx->data_pix_fmt)) {
1406  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_422_GUID;
1407  avctx->profile = AV_PROFILE_H264_HIGH_422;
1408  }
1409 #endif
1410 
1411  vui->bitstreamRestrictionFlag = cc->gopLength != 1 || avctx->profile < AV_PROFILE_H264_HIGH;
1412 
1413  h264->chromaFormatIDC = IS_YUV444(ctx->data_pix_fmt) ? 3 : IS_YUV422(ctx->data_pix_fmt) ? 2 : 1;
1414 
1415  h264->level = ctx->level;
1416 
1417 #ifdef NVENC_HAVE_NEW_BIT_DEPTH_API
1418  h264->inputBitDepth = IS_10BIT(ctx->data_pix_fmt) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1419  h264->outputBitDepth = (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1420 #endif
1421 
1422  if (ctx->coder >= 0)
1423  h264->entropyCodingMode = ctx->coder;
1424 
1425 #ifdef NVENC_HAVE_BFRAME_REF_MODE
1426  if (ctx->b_ref_mode >= 0)
1427  h264->useBFramesAsRef = ctx->b_ref_mode;
1428 #endif
1429 
1430 #ifdef NVENC_HAVE_MULTIPLE_REF_FRAMES
1431  h264->numRefL0 = avctx->refs;
1432  h264->numRefL1 = avctx->refs;
1433 #endif
1434 
1435 #ifdef NVENC_HAVE_H264_AND_AV1_TEMPORAL_FILTER
1436  if (ctx->tf_level >= 0) {
1437  h264->tfLevel = ctx->tf_level;
1438 
1439  switch (ctx->tf_level)
1440  {
1441  case NV_ENC_TEMPORAL_FILTER_LEVEL_0:
1442  case NV_ENC_TEMPORAL_FILTER_LEVEL_4:
1443  break;
1444  default:
1445  av_log(avctx, AV_LOG_ERROR, "Invalid temporal filtering level.\n");
1446  return AVERROR(EINVAL);
1447  }
1448 
1449  if (ctx->encode_config.frameIntervalP < 5)
1450  av_log(avctx, AV_LOG_WARNING, "Temporal filtering needs at least 4 B-Frames (-bf 4).\n");
1451  }
1452 #endif
1453 
1454 #ifdef NVENC_HAVE_TIME_CODE
1455  if (ctx->s12m_tc)
1456  h264->enableTimeCode = 1;
1457 #endif
1458 
1459  return 0;
1460 }
1461 
1462 static av_cold int nvenc_setup_hevc_config(AVCodecContext *avctx)
1463 {
1464  NvencContext *ctx = avctx->priv_data;
1465  NV_ENC_CONFIG *cc = &ctx->encode_config;
1466  NV_ENC_CONFIG_HEVC *hevc = &cc->encodeCodecConfig.hevcConfig;
1467  NV_ENC_CONFIG_HEVC_VUI_PARAMETERS *vui = &hevc->hevcVUIParameters;
1468 
1469  const AVPixFmtDescriptor *pixdesc = av_pix_fmt_desc_get(ctx->data_pix_fmt);
1470 
1471  if ((pixdesc->flags & AV_PIX_FMT_FLAG_RGB) && !IS_GBRP(ctx->data_pix_fmt)) {
1472  vui->colourMatrix = to_nv_color_matrix(AVCOL_SPC_BT470BG);
1473  vui->colourPrimaries = to_nv_color_pri(avctx->color_primaries);
1474  vui->transferCharacteristics = to_nv_color_trc(avctx->color_trc);
1475  vui->videoFullRangeFlag = 0;
1476  } else {
1477  vui->colourMatrix = to_nv_color_matrix(IS_GBRP(ctx->data_pix_fmt) ? AVCOL_SPC_RGB : avctx->colorspace);
1478  vui->colourPrimaries = to_nv_color_pri(avctx->color_primaries);
1479  vui->transferCharacteristics = to_nv_color_trc(avctx->color_trc);
1480  vui->videoFullRangeFlag = (avctx->color_range == AVCOL_RANGE_JPEG
1481  || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
1482  }
1483 
1484  vui->colourDescriptionPresentFlag =
1485  (vui->colourMatrix != 2 || vui->colourPrimaries != 2 || vui->transferCharacteristics != 2);
1486 
1487  vui->videoSignalTypePresentFlag =
1488  (vui->colourDescriptionPresentFlag
1489  || vui->videoFormat != 5
1490  || vui->videoFullRangeFlag != 0);
1491 
1492  if (ctx->max_slice_size > 0) {
1493  hevc->sliceMode = 1;
1494  hevc->sliceModeData = ctx->max_slice_size;
1495  } else {
1496  hevc->sliceMode = 3;
1497  hevc->sliceModeData = avctx->slices > 0 ? avctx->slices : 1;
1498  }
1499 
1500  if (ctx->intra_refresh) {
1501  hevc->enableIntraRefresh = 1;
1502  hevc->intraRefreshPeriod = cc->gopLength;
1503  hevc->intraRefreshCnt = cc->gopLength - 1;
1504  cc->gopLength = NVENC_INFINITE_GOPLENGTH;
1505 #ifdef NVENC_HAVE_HEVC_OUTPUT_RECOVERY_POINT_SEI
1506  hevc->outputRecoveryPointSEI = 1;
1507 #endif
1508 #ifdef NVENC_HAVE_SINGLE_SLICE_INTRA_REFRESH
1509  hevc->singleSliceIntraRefresh = ctx->single_slice_intra_refresh;
1510 #endif
1511  }
1512 
1513 #ifdef NVENC_HAVE_HEVC_AND_AV1_MASTERING_METADATA
1514  ctx->mdm = hevc->outputMasteringDisplay = !!av_frame_side_data_get(avctx->decoded_side_data,
1515  avctx->nb_decoded_side_data,
1516  AV_FRAME_DATA_MASTERING_DISPLAY_METADATA);
1517  ctx->cll = hevc->outputMaxCll = !!av_frame_side_data_get(avctx->decoded_side_data,
1518  avctx->nb_decoded_side_data,
1519  AV_FRAME_DATA_CONTENT_LIGHT_LEVEL);
1520 #endif
1521 
1522 #ifdef NVENC_HAVE_HEVC_CONSTRAINED_ENCODING
1523  if (ctx->constrained_encoding)
1524  hevc->enableConstrainedEncoding = 1;
1525 #endif
1526 
1527  hevc->disableSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 1 : 0;
1528  hevc->repeatSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 0 : 1;
1529  hevc->outputAUD = ctx->aud;
1530 
1531  if (ctx->dpb_size >= 0) {
1532  /* 0 means "let the hardware decide" */
1533  hevc->maxNumRefFramesInDPB = ctx->dpb_size;
1534  }
1535 
1536  hevc->idrPeriod = cc->gopLength;
1537 
1538  if (IS_CBR(cc->rcParams.rateControlMode)) {
1539  /* Older SDKs use outputBufferingPeriodSEI to control filler data */
1540  hevc->outputBufferingPeriodSEI = ctx->cbr_padding;
1541 
1542 #ifdef NVENC_HAVE_FILLER_DATA
1543  hevc->enableFillerDataInsertion = ctx->cbr_padding;
1544 #endif
1545  }
1546 
1547  hevc->outputPictureTimingSEI = 1;
1548 
1549 #ifdef NVENC_HAVE_MVHEVC
1550  if (ctx->multiview_supported && (ctx->profile == NV_ENC_HEVC_PROFILE_MAIN || ctx->profile == NV_ENC_HEVC_PROFILE_MULTIVIEW_MAIN)) {
1551  const AVFrameSideData *sd_stereo3d = av_frame_side_data_get(avctx->decoded_side_data, avctx->nb_decoded_side_data, AV_FRAME_DATA_STEREO3D);
1552  const AVFrameSideData *sd_tdrdi = av_frame_side_data_get(avctx->decoded_side_data, avctx->nb_decoded_side_data, AV_FRAME_DATA_3D_REFERENCE_DISPLAYS);
1553  const AVStereo3D *stereo3d = sd_stereo3d ? (const AVStereo3D*)sd_stereo3d->data : NULL;
1554 
1555  if (sd_tdrdi && stereo3d && stereo3d->type == AV_STEREO3D_FRAMESEQUENCE)
1556  ctx->profile = NV_ENC_HEVC_PROFILE_MULTIVIEW_MAIN;
1557 
1558  if (ctx->profile == NV_ENC_HEVC_PROFILE_MULTIVIEW_MAIN && stereo3d &&
1559  stereo3d->type != AV_STEREO3D_2D &&
1560  stereo3d->type != AV_STEREO3D_UNSPEC &&
1561  stereo3d->type != AV_STEREO3D_FRAMESEQUENCE)
1562  {
1563  av_log(avctx, AV_LOG_WARNING, "Unsupported multiview input, disabling multiview encoding.\n");
1564  ctx->profile = NV_ENC_HEVC_PROFILE_MAIN;
1565  }
1566  }
1567 #endif
1568 
1569  switch (ctx->profile) {
1570  case NV_ENC_HEVC_PROFILE_MAIN:
1571  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN_GUID;
1572  avctx->profile = AV_PROFILE_HEVC_MAIN;
1573  break;
1574  case NV_ENC_HEVC_PROFILE_MAIN_10:
1575  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN10_GUID;
1576  avctx->profile = AV_PROFILE_HEVC_MAIN_10;
1577  break;
1578  case NV_ENC_HEVC_PROFILE_REXT:
1579  cc->profileGUID = NV_ENC_HEVC_PROFILE_FREXT_GUID;
1580  avctx->profile = AV_PROFILE_HEVC_REXT;
1581  break;
1582 #ifdef NVENC_HAVE_MVHEVC
1583  case NV_ENC_HEVC_PROFILE_MULTIVIEW_MAIN:
1584  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN_GUID;
1585  avctx->profile = AV_PROFILE_HEVC_MULTIVIEW_MAIN;
1586  ctx->multiview = 1;
1587 
1588  hevc->enableMVHEVC = 1;
1589  hevc->outputHevc3DReferenceDisplayInfo = 1;
1590 
1591  av_log(avctx, AV_LOG_VERBOSE, "Enabling MV HEVC encoding.\n");
1592  break;
1593 #endif
1594  }
1595 
1596  // force setting profile as main10 if input is 10 bit or if it should be encoded as 10 bit
1597  if (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) {
1598  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN10_GUID;
1599  avctx->profile = AV_PROFILE_HEVC_MAIN_10;
1600  }
1601 
1602  // force setting profile as rext if input is yuv444 or yuv422
1603  if (IS_YUV444(ctx->data_pix_fmt) || IS_YUV422(ctx->data_pix_fmt)) {
1604  cc->profileGUID = NV_ENC_HEVC_PROFILE_FREXT_GUID;
1605  avctx->profile = AV_PROFILE_HEVC_REXT;
1606  }
1607 
1608 #ifdef NVENC_HAVE_MVHEVC
1609  if (ctx->multiview && avctx->profile != AV_PROFILE_HEVC_MULTIVIEW_MAIN) {
1610  av_log(avctx, AV_LOG_ERROR, "Multiview encoding only works for Main profile content.\n");
1611  return AVERROR(EINVAL);
1612  }
1613 #endif
1614 
1615  hevc->chromaFormatIDC = IS_YUV444(ctx->data_pix_fmt) ? 3 : IS_YUV422(ctx->data_pix_fmt) ? 2 : 1;
1616 
1617 #ifdef NVENC_HAVE_NEW_BIT_DEPTH_API
1618  hevc->inputBitDepth = IS_10BIT(ctx->data_pix_fmt) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1619  hevc->outputBitDepth = (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1620 #else
1621  hevc->pixelBitDepthMinus8 = IS_10BIT(ctx->data_pix_fmt) ? 2 : 0;
1622 #endif
1623 
1624  hevc->level = ctx->level;
1625 
1626  hevc->tier = ctx->tier;
1627 
1628 #ifdef NVENC_HAVE_HEVC_BFRAME_REF_MODE
1629  if (ctx->b_ref_mode >= 0)
1630  hevc->useBFramesAsRef = ctx->b_ref_mode;
1631 #endif
1632 
1633 #ifdef NVENC_HAVE_MULTIPLE_REF_FRAMES
1634  hevc->numRefL0 = avctx->refs;
1635  hevc->numRefL1 = avctx->refs;
1636 #endif
1637 
1638 #ifdef NVENC_HAVE_TEMPORAL_FILTER
1639  if (ctx->tf_level >= 0) {
1640  hevc->tfLevel = ctx->tf_level;
1641 
1642  switch (ctx->tf_level)
1643  {
1644  case NV_ENC_TEMPORAL_FILTER_LEVEL_0:
1645  case NV_ENC_TEMPORAL_FILTER_LEVEL_4:
1646  break;
1647  default:
1648  av_log(avctx, AV_LOG_ERROR, "Invalid temporal filtering level.\n");
1649  return AVERROR(EINVAL);
1650  }
1651 
1652  if (ctx->encode_config.frameIntervalP < 5)
1653  av_log(avctx, AV_LOG_WARNING, "Temporal filtering needs at least 4 B-Frames (-bf 4).\n");
1654  }
1655 #endif
1656 
1657  return 0;
1658 }
1659 
1660 #if CONFIG_AV1_NVENC_ENCODER
1661 static av_cold int nvenc_setup_av1_config(AVCodecContext *avctx)
1662 {
1663  NvencContext *ctx = avctx->priv_data;
1664  NV_ENC_CONFIG *cc = &ctx->encode_config;
1665  NV_ENC_CONFIG_AV1 *av1 = &cc->encodeCodecConfig.av1Config;
1666 
1667  const AVPixFmtDescriptor *pixdesc = av_pix_fmt_desc_get(ctx->data_pix_fmt);
1668 
1669  if ((pixdesc->flags & AV_PIX_FMT_FLAG_RGB) && !IS_GBRP(ctx->data_pix_fmt)) {
1670  av1->matrixCoefficients = to_nv_color_matrix(AVCOL_SPC_BT470BG);
1671  av1->colorPrimaries = to_nv_color_pri(avctx->color_primaries);
1672  av1->transferCharacteristics = to_nv_color_trc(avctx->color_trc);
1673  av1->colorRange = 0;
1674  } else {
1675  av1->matrixCoefficients = to_nv_color_matrix(IS_GBRP(ctx->data_pix_fmt) ? AVCOL_SPC_RGB : avctx->colorspace);
1676  av1->colorPrimaries = to_nv_color_pri(avctx->color_primaries);
1677  av1->transferCharacteristics = to_nv_color_trc(avctx->color_trc);
1678  av1->colorRange = (avctx->color_range == AVCOL_RANGE_JPEG
1679  || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
1680  }
1681 
1682  if (IS_YUV444(ctx->data_pix_fmt)) {
1683  av_log(avctx, AV_LOG_ERROR, "AV1 High Profile not supported, required for 4:4:4 encoding\n");
1684  return AVERROR(ENOTSUP);
1685  } else {
1686  cc->profileGUID = NV_ENC_AV1_PROFILE_MAIN_GUID;
1687  avctx->profile = AV_PROFILE_AV1_MAIN;
1688  }
1689 
1690  if (ctx->dpb_size >= 0) {
1691  /* 0 means "let the hardware decide" */
1692  av1->maxNumRefFramesInDPB = ctx->dpb_size;
1693  }
1694 
1695  if (ctx->intra_refresh) {
1696  av1->enableIntraRefresh = 1;
1697  av1->intraRefreshPeriod = cc->gopLength;
1698  av1->intraRefreshCnt = cc->gopLength - 1;
1699  cc->gopLength = NVENC_INFINITE_GOPLENGTH;
1700  }
1701 
1702  av1->idrPeriod = cc->gopLength;
1703 
1704  if (IS_CBR(cc->rcParams.rateControlMode)) {
1705  av1->enableBitstreamPadding = ctx->cbr_padding;
1706  }
1707 
1708  if (ctx->tile_cols >= 0)
1709  av1->numTileColumns = ctx->tile_cols;
1710  if (ctx->tile_rows >= 0)
1711  av1->numTileRows = ctx->tile_rows;
1712 
1713  av1->outputAnnexBFormat = 0;
1714 
1715  av1->level = ctx->level;
1716  av1->tier = ctx->tier;
1717 
1718  av1->enableTimingInfo = ctx->timing_info;
1719 
1720  /* mp4 encapsulation requires sequence headers to be present on all keyframes for AV1 */
1721  av1->disableSeqHdr = 0;
1722  av1->repeatSeqHdr = 1;
1723 
1724  av1->chromaFormatIDC = IS_YUV444(ctx->data_pix_fmt) ? 3 : 1;
1725 
1726 #ifdef NVENC_HAVE_NEW_BIT_DEPTH_API
1727  av1->inputBitDepth = IS_10BIT(ctx->data_pix_fmt) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1728  av1->outputBitDepth = (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1729 #else
1730  av1->inputPixelBitDepthMinus8 = IS_10BIT(ctx->data_pix_fmt) ? 2 : 0;
1731  av1->pixelBitDepthMinus8 = (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) ? 2 : 0;
1732 #endif
1733 
1734 #ifdef NVENC_HAVE_HEVC_AND_AV1_MASTERING_METADATA
1735  ctx->mdm = av1->outputMasteringDisplay = !!av_frame_side_data_get(avctx->decoded_side_data,
1736  avctx->nb_decoded_side_data,
1737  AV_FRAME_DATA_MASTERING_DISPLAY_METADATA);
1738  ctx->cll = av1->outputMaxCll = !!av_frame_side_data_get(avctx->decoded_side_data,
1739  avctx->nb_decoded_side_data,
1740  AV_FRAME_DATA_CONTENT_LIGHT_LEVEL);
1741 #endif
1742 
1743  if (ctx->b_ref_mode >= 0)
1744  av1->useBFramesAsRef = ctx->b_ref_mode;
1745 
1746  av1->numFwdRefs = avctx->refs;
1747  av1->numBwdRefs = avctx->refs;
1748 
1749 #ifdef NVENC_HAVE_H264_AND_AV1_TEMPORAL_FILTER
1750  if (ctx->tf_level >= 0) {
1751  av1->tfLevel = ctx->tf_level;
1752 
1753  switch (ctx->tf_level)
1754  {
1755  case NV_ENC_TEMPORAL_FILTER_LEVEL_0:
1756  case NV_ENC_TEMPORAL_FILTER_LEVEL_4:
1757  break;
1758  default:
1759  av_log(avctx, AV_LOG_ERROR, "Invalid temporal filtering level.\n");
1760  return AVERROR(EINVAL);
1761  }
1762 
1763  if (ctx->encode_config.frameIntervalP < 5)
1764  av_log(avctx, AV_LOG_WARNING, "Temporal filtering needs at least 4 B-Frames (-bf 4).\n");
1765  }
1766 #endif
1767 
1768  return 0;
1769 }
1770 #endif
1771 
1772 static av_cold int nvenc_setup_codec_config(AVCodecContext *avctx)
1773 {
1774  switch (avctx->codec->id) {
1775  case AV_CODEC_ID_H264:
1776  return nvenc_setup_h264_config(avctx);
1777  case AV_CODEC_ID_HEVC:
1778  return nvenc_setup_hevc_config(avctx);
1779 #if CONFIG_AV1_NVENC_ENCODER
1780  case AV_CODEC_ID_AV1:
1781  return nvenc_setup_av1_config(avctx);
1782 #endif
1783  /* Earlier switch/case will return if unknown codec is passed. */
1784  }
1785 
1786  return 0;
1787 }
1788 
1789 static void compute_dar(AVCodecContext *avctx, int *dw, int *dh) {
1790  int sw, sh;
1791 
1792  sw = avctx->width;
1793  sh = avctx->height;
1794 
1795 #if CONFIG_AV1_NVENC_ENCODER
1796  if (avctx->codec->id == AV_CODEC_ID_AV1) {
1797  /* For AV1 we actually need to calculate the render width/height, not the dar */
1798  if (avctx->sample_aspect_ratio.num > 0 && avctx->sample_aspect_ratio.den > 0
1799  && avctx->sample_aspect_ratio.num != avctx->sample_aspect_ratio.den)
1800  {
1801  if (avctx->sample_aspect_ratio.num > avctx->sample_aspect_ratio.den) {
1802  sw = av_rescale(sw, avctx->sample_aspect_ratio.num, avctx->sample_aspect_ratio.den);
1803  } else {
1804  sh = av_rescale(sh, avctx->sample_aspect_ratio.den, avctx->sample_aspect_ratio.num);
1805  }
1806  }
1807 
1808  *dw = sw;
1809  *dh = sh;
1810  return;
1811  }
1812 #endif
1813 
1814  if (avctx->sample_aspect_ratio.num > 0 && avctx->sample_aspect_ratio.den > 0) {
1815  sw *= avctx->sample_aspect_ratio.num;
1816  sh *= avctx->sample_aspect_ratio.den;
1817  }
1818 
1819  av_reduce(dw, dh, sw, sh, 1024 * 1024);
1820 }
1821 
1822 static av_cold int nvenc_setup_encoder(AVCodecContext *avctx)
1823 {
1824  NvencContext *ctx = avctx->priv_data;
1825  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1826  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1827 
1828  NV_ENC_PRESET_CONFIG preset_config = { 0 };
1829  NVENCSTATUS nv_status = NV_ENC_SUCCESS;
1830  AVCPBProperties *cpb_props;
1831  int res = 0;
1832  int dw, dh;
1833 
1834  ctx->encode_config.version = NV_ENC_CONFIG_VER;
1835  ctx->init_encode_params.version = NV_ENC_INITIALIZE_PARAMS_VER;
1836 
1837  ctx->init_encode_params.encodeHeight = avctx->height;
1838  ctx->init_encode_params.encodeWidth = avctx->width;
1839 
1840  ctx->init_encode_params.encodeConfig = &ctx->encode_config;
1841 
1842  preset_config.version = NV_ENC_PRESET_CONFIG_VER;
1843  preset_config.presetCfg.version = NV_ENC_CONFIG_VER;
1844 
1845 #ifdef NVENC_HAVE_NEW_PRESETS
1846  ctx->init_encode_params.tuningInfo = ctx->tuning_info;
1847 
1848  if (ctx->flags & NVENC_LOSSLESS)
1849  ctx->init_encode_params.tuningInfo = NV_ENC_TUNING_INFO_LOSSLESS;
1850  else if (ctx->flags & NVENC_LOWLATENCY)
1851  ctx->init_encode_params.tuningInfo = NV_ENC_TUNING_INFO_LOW_LATENCY;
1852 
1853  nv_status = p_nvenc->nvEncGetEncodePresetConfigEx(ctx->nvencoder,
1854  ctx->init_encode_params.encodeGUID,
1855  ctx->init_encode_params.presetGUID,
1856  ctx->init_encode_params.tuningInfo,
1857  &preset_config);
1858 #else
1859  nv_status = p_nvenc->nvEncGetEncodePresetConfig(ctx->nvencoder,
1860  ctx->init_encode_params.encodeGUID,
1861  ctx->init_encode_params.presetGUID,
1862  &preset_config);
1863 #endif
1864  if (nv_status != NV_ENC_SUCCESS)
1865  return nvenc_print_error(avctx, nv_status, "Cannot get the preset configuration");
1866 
1867  memcpy(&ctx->encode_config, &preset_config.presetCfg, sizeof(ctx->encode_config));
1868 
1869  ctx->encode_config.version = NV_ENC_CONFIG_VER;
1870 
1871  compute_dar(avctx, &dw, &dh);
1872  ctx->init_encode_params.darHeight = dh;
1873  ctx->init_encode_params.darWidth = dw;
1874 
1875  if (avctx->framerate.num > 0 && avctx->framerate.den > 0) {
1876  ctx->init_encode_params.frameRateNum = avctx->framerate.num;
1877  ctx->init_encode_params.frameRateDen = avctx->framerate.den;
1878  } else {
1879  ctx->init_encode_params.frameRateNum = avctx->time_base.den;
1880  ctx->init_encode_params.frameRateDen = avctx->time_base.num;
1881  }
1882 
1883 #ifdef NVENC_HAVE_UNIDIR_B
1884  ctx->init_encode_params.enableUniDirectionalB = ctx->unidir_b;
1885 #endif
1886 
1887  ctx->init_encode_params.enableEncodeAsync = 0;
1888  ctx->init_encode_params.enablePTD = 1;
1889 
1890 #ifdef NVENC_HAVE_NEW_PRESETS
1891  /* If lookahead isn't set from CLI, use value from preset.
1892  * P6 & P7 presets may enable lookahead for better quality.
1893  * */
1894  if (ctx->rc_lookahead == 0 && ctx->encode_config.rcParams.enableLookahead)
1895  ctx->rc_lookahead = ctx->encode_config.rcParams.lookaheadDepth;
1896 #endif
1897 
1898  if (ctx->weighted_pred == 1)
1899  ctx->init_encode_params.enableWeightedPrediction = 1;
1900 
1901 #ifdef NVENC_HAVE_SPLIT_FRAME_ENCODING
1902  ctx->init_encode_params.splitEncodeMode = ctx->split_encode_mode;
1903 
1904  if (ctx->split_encode_mode != NV_ENC_SPLIT_DISABLE_MODE) {
1905  if (avctx->codec->id == AV_CODEC_ID_HEVC && ctx->weighted_pred == 1)
1906  av_log(avctx, AV_LOG_WARNING, "Split encoding not supported with weighted prediction enabled.\n");
1907  }
1908 #endif
1909 
1910  if (ctx->bluray_compat) {
1911  ctx->aud = 1;
1912  ctx->dpb_size = FFMIN(FFMAX(avctx->refs, 0), 6);
1913  avctx->max_b_frames = FFMIN(avctx->max_b_frames, 3);
1914  switch (avctx->codec->id) {
1915  case AV_CODEC_ID_H264:
1916  /* maximum level depends on used resolution */
1917  break;
1918  case AV_CODEC_ID_HEVC:
1919  ctx->level = NV_ENC_LEVEL_HEVC_51;
1920  ctx->tier = NV_ENC_TIER_HEVC_HIGH;
1921  break;
1922  }
1923  }
1924 
1925  if (avctx->gop_size > 0) {
1926  // only overwrite preset if a GOP size was selected as input
1927  ctx->encode_config.gopLength = avctx->gop_size;
1928  } else if (avctx->gop_size == 0) {
1929  ctx->encode_config.frameIntervalP = 0;
1930  ctx->encode_config.gopLength = 1;
1931  }
1932 
1933  if (avctx->max_b_frames >= 0 && ctx->encode_config.gopLength > 1) {
1934  /* 0 is intra-only, 1 is I/P only, 2 is one B-Frame, 3 two B-frames, and so on. */
1935  ctx->encode_config.frameIntervalP = avctx->max_b_frames + 1;
1936  }
1937 
1938  /* force to enable intra refresh */
1939  if(ctx->single_slice_intra_refresh)
1940  ctx->intra_refresh = 1;
1941 
1942  nvenc_recalc_surfaces(avctx);
1943 
1944  res = nvenc_setup_rate_control(avctx);
1945  if (res < 0)
1946  return res;
1947 
1948  if (avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
1949  ctx->encode_config.frameFieldMode = NV_ENC_PARAMS_FRAME_FIELD_MODE_FIELD;
1950  } else {
1951  ctx->encode_config.frameFieldMode = NV_ENC_PARAMS_FRAME_FIELD_MODE_FRAME;
1952  }
1953 
1954  res = nvenc_setup_codec_config(avctx);
1955  if (res)
1956  return res;
1957 
1958  res = nvenc_push_context(avctx);
1959  if (res < 0)
1960  return res;
1961 
1962  nv_status = p_nvenc->nvEncInitializeEncoder(ctx->nvencoder, &ctx->init_encode_params);
1963  if (nv_status != NV_ENC_SUCCESS) {
1964  nvenc_pop_context(avctx);
1965  return nvenc_print_error(avctx, nv_status, "InitializeEncoder failed");
1966  }
1967 
1968 #ifdef NVENC_HAVE_CUSTREAM_PTR
1969  if (ctx->cu_context) {
1970  nv_status = p_nvenc->nvEncSetIOCudaStreams(ctx->nvencoder, &ctx->cu_stream, &ctx->cu_stream);
1971  if (nv_status != NV_ENC_SUCCESS) {
1972  nvenc_pop_context(avctx);
1973  return nvenc_print_error(avctx, nv_status, "SetIOCudaStreams failed");
1974  }
1975  }
1976 #endif
1977 
1978  res = nvenc_pop_context(avctx);
1979  if (res < 0)
1980  return res;
1981 
1982  if (ctx->encode_config.frameIntervalP > 1)
1983  avctx->has_b_frames = 2;
1984 
1985  if (ctx->encode_config.rcParams.averageBitRate > 0)
1986  avctx->bit_rate = ctx->encode_config.rcParams.averageBitRate;
1987 
1988  cpb_props = ff_encode_add_cpb_side_data(avctx);
1989  if (!cpb_props)
1990  return AVERROR(ENOMEM);
1991  cpb_props->max_bitrate = ctx->encode_config.rcParams.maxBitRate;
1992  cpb_props->avg_bitrate = avctx->bit_rate;
1993  cpb_props->buffer_size = ctx->encode_config.rcParams.vbvBufferSize;
1994 
1995  return 0;
1996 }
1997 
1998 static NV_ENC_BUFFER_FORMAT nvenc_map_buffer_format(enum AVPixelFormat pix_fmt)
1999 {
2000  switch (pix_fmt) {
2001  case AV_PIX_FMT_YUV420P:
2002  return NV_ENC_BUFFER_FORMAT_YV12;
2003  case AV_PIX_FMT_NV12:
2004  return NV_ENC_BUFFER_FORMAT_NV12;
2005  case AV_PIX_FMT_P010:
2006  case AV_PIX_FMT_P016:
2007  return NV_ENC_BUFFER_FORMAT_YUV420_10BIT;
2008  case AV_PIX_FMT_GBRP:
2009  case AV_PIX_FMT_YUV444P:
2010  return NV_ENC_BUFFER_FORMAT_YUV444;
2011  case AV_PIX_FMT_GBRP16:
2012  case AV_PIX_FMT_GBRP10MSB:
2013  case AV_PIX_FMT_YUV444P16:
2014  case AV_PIX_FMT_YUV444P10MSB:
2015  return NV_ENC_BUFFER_FORMAT_YUV444_10BIT;
2016  case AV_PIX_FMT_0RGB32:
2017  case AV_PIX_FMT_RGB32:
2018  return NV_ENC_BUFFER_FORMAT_ARGB;
2019  case AV_PIX_FMT_0BGR32:
2020  case AV_PIX_FMT_BGR32:
2021  return NV_ENC_BUFFER_FORMAT_ABGR;
2022  case AV_PIX_FMT_X2RGB10:
2023  return NV_ENC_BUFFER_FORMAT_ARGB10;
2024  case AV_PIX_FMT_X2BGR10:
2025  return NV_ENC_BUFFER_FORMAT_ABGR10;
2026 #ifdef NVENC_HAVE_422_SUPPORT
2027  case AV_PIX_FMT_NV16:
2028  return NV_ENC_BUFFER_FORMAT_NV16;
2029  case AV_PIX_FMT_P210:
2030  case AV_PIX_FMT_P216:
2031  return NV_ENC_BUFFER_FORMAT_P210;
2032 #endif
2033  default:
2034  return NV_ENC_BUFFER_FORMAT_UNDEFINED;
2035  }
2036 }
2037 
2038 static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
2039 {
2040  NvencContext *ctx = avctx->priv_data;
2041  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2042  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2043  NvencSurface* tmp_surface = &ctx->surfaces[idx];
2044 
2045  NVENCSTATUS nv_status;
2046  NV_ENC_CREATE_BITSTREAM_BUFFER allocOut = { 0 };
2047  allocOut.version = NV_ENC_CREATE_BITSTREAM_BUFFER_VER;
2048 
2049  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2050  ctx->surfaces[idx].in_ref = av_frame_alloc();
2051  if (!ctx->surfaces[idx].in_ref)
2052  return AVERROR(ENOMEM);
2053  } else {
2054  NV_ENC_CREATE_INPUT_BUFFER allocSurf = { 0 };
2055 
2056  ctx->surfaces[idx].format = nvenc_map_buffer_format(ctx->data_pix_fmt);
2057  if (ctx->surfaces[idx].format == NV_ENC_BUFFER_FORMAT_UNDEFINED) {
2058  av_log(avctx, AV_LOG_FATAL, "Invalid input pixel format: %s\n",
2059  av_get_pix_fmt_name(ctx->data_pix_fmt));
2060  return AVERROR(EINVAL);
2061  }
2062 
2063  allocSurf.version = NV_ENC_CREATE_INPUT_BUFFER_VER;
2064  allocSurf.width = avctx->width;
2065  allocSurf.height = avctx->height;
2066  allocSurf.bufferFmt = ctx->surfaces[idx].format;
2067 
2068  nv_status = p_nvenc->nvEncCreateInputBuffer(ctx->nvencoder, &allocSurf);
2069  if (nv_status != NV_ENC_SUCCESS) {
2070  return nvenc_print_error(avctx, nv_status, "CreateInputBuffer failed");
2071  }
2072 
2073  ctx->surfaces[idx].input_surface = allocSurf.inputBuffer;
2074  ctx->surfaces[idx].width = allocSurf.width;
2075  ctx->surfaces[idx].height = allocSurf.height;
2076  }
2077 
2078  nv_status = p_nvenc->nvEncCreateBitstreamBuffer(ctx->nvencoder, &allocOut);
2079  if (nv_status != NV_ENC_SUCCESS) {
2080  int err = nvenc_print_error(avctx, nv_status, "CreateBitstreamBuffer failed");
2081  if (avctx->pix_fmt != AV_PIX_FMT_CUDA && avctx->pix_fmt != AV_PIX_FMT_D3D11)
2082  p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[idx].input_surface);
2083  av_frame_free(&ctx->surfaces[idx].in_ref);
2084  return err;
2085  }
2086 
2087  ctx->surfaces[idx].output_surface = allocOut.bitstreamBuffer;
2088 
2089  av_fifo_write(ctx->unused_surface_queue, &tmp_surface, 1);
2090 
2091  return 0;
2092 }
2093 
2094 static av_cold int nvenc_setup_surfaces(AVCodecContext *avctx)
2095 {
2096  NvencContext *ctx = avctx->priv_data;
2097  int i, res = 0, res2;
2098 
2099  ctx->surfaces = av_calloc(ctx->nb_surfaces, sizeof(*ctx->surfaces));
2100  if (!ctx->surfaces)
2101  return AVERROR(ENOMEM);
2102 
2103  ctx->frame_data_array = av_calloc(ctx->frame_data_array_nb, sizeof(*ctx->frame_data_array));
2104  if (!ctx->frame_data_array)
2105  return AVERROR(ENOMEM);
2106 
2107  ctx->timestamp_list = av_fifo_alloc2(ctx->nb_surfaces + ctx->encode_config.frameIntervalP,
2108  sizeof(int64_t), 0);
2109  if (!ctx->timestamp_list)
2110  return AVERROR(ENOMEM);
2111 
2112  ctx->unused_surface_queue = av_fifo_alloc2(ctx->nb_surfaces, sizeof(NvencSurface*), 0);
2113  if (!ctx->unused_surface_queue)
2114  return AVERROR(ENOMEM);
2115 
2116  ctx->output_surface_queue = av_fifo_alloc2(ctx->nb_surfaces, sizeof(NvencSurface*), 0);
2117  if (!ctx->output_surface_queue)
2118  return AVERROR(ENOMEM);
2119  ctx->output_surface_ready_queue = av_fifo_alloc2(ctx->nb_surfaces, sizeof(NvencSurface*), 0);
2120  if (!ctx->output_surface_ready_queue)
2121  return AVERROR(ENOMEM);
2122 
2123  res = nvenc_push_context(avctx);
2124  if (res < 0)
2125  return res;
2126 
2127  for (i = 0; i < ctx->nb_surfaces; i++) {
2128  if ((res = nvenc_alloc_surface(avctx, i)) < 0)
2129  goto fail;
2130  }
2131 
2132 fail:
2133  res2 = nvenc_pop_context(avctx);
2134  if (res2 < 0)
2135  return res2;
2136 
2137  return res;
2138 }
2139 
2140 static av_cold int nvenc_setup_extradata(AVCodecContext *avctx)
2141 {
2142  NvencContext *ctx = avctx->priv_data;
2143  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2144  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2145 
2146  NVENCSTATUS nv_status;
2147  uint32_t outSize = 0;
2148  char tmpHeader[NV_MAX_SEQ_HDR_LEN];
2149 
2150  NV_ENC_SEQUENCE_PARAM_PAYLOAD payload = { 0 };
2151  payload.version = NV_ENC_SEQUENCE_PARAM_PAYLOAD_VER;
2152 
2153  payload.spsppsBuffer = tmpHeader;
2154  payload.inBufferSize = sizeof(tmpHeader);
2155  payload.outSPSPPSPayloadSize = &outSize;
2156 
2157  nv_status = p_nvenc->nvEncGetSequenceParams(ctx->nvencoder, &payload);
2158  if (nv_status != NV_ENC_SUCCESS) {
2159  return nvenc_print_error(avctx, nv_status, "GetSequenceParams failed");
2160  }
2161 
2162  avctx->extradata_size = outSize;
2163  avctx->extradata = av_mallocz(outSize + AV_INPUT_BUFFER_PADDING_SIZE);
2164 
2165  if (!avctx->extradata) {
2166  return AVERROR(ENOMEM);
2167  }
2168 
2169  memcpy(avctx->extradata, tmpHeader, outSize);
2170 
2171  return 0;
2172 }
2173 
2174 av_cold int ff_nvenc_encode_close(AVCodecContext *avctx)
2175 {
2176  NvencContext *ctx = avctx->priv_data;
2177  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2178  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2179  int i, res;
2180 
2181  /* the encoder has to be flushed before it can be closed */
2182  if (ctx->nvencoder) {
2183  NV_ENC_PIC_PARAMS params = { .version = NV_ENC_PIC_PARAMS_VER,
2184  .encodePicFlags = NV_ENC_PIC_FLAG_EOS };
2185 
2186  res = nvenc_push_context(avctx);
2187  if (res < 0)
2188  return res;
2189 
2190  p_nvenc->nvEncEncodePicture(ctx->nvencoder, &params);
2191  }
2192 
2193  av_fifo_freep2(&ctx->timestamp_list);
2194  av_fifo_freep2(&ctx->output_surface_ready_queue);
2195  av_fifo_freep2(&ctx->output_surface_queue);
2196  av_fifo_freep2(&ctx->unused_surface_queue);
2197 
2198  if (ctx->frame_data_array) {
2199  for (i = 0; i < ctx->frame_data_array_nb; i++)
2200  av_buffer_unref(&ctx->frame_data_array[i].frame_opaque_ref);
2201  av_freep(&ctx->frame_data_array);
2202  }
2203 
2204  if (ctx->surfaces && (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11)) {
2205  for (i = 0; i < ctx->nb_registered_frames; i++) {
2206  if (ctx->registered_frames[i].mapped)
2207  p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, ctx->registered_frames[i].in_map.mappedResource);
2208  if (ctx->registered_frames[i].regptr)
2209  p_nvenc->nvEncUnregisterResource(ctx->nvencoder, ctx->registered_frames[i].regptr);
2210  }
2211  ctx->nb_registered_frames = 0;
2212  }
2213 
2214  if (ctx->surfaces) {
2215  for (i = 0; i < ctx->nb_surfaces; ++i) {
2216  if (avctx->pix_fmt != AV_PIX_FMT_CUDA && avctx->pix_fmt != AV_PIX_FMT_D3D11)
2217  p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[i].input_surface);
2218  av_frame_free(&ctx->surfaces[i].in_ref);
2219  p_nvenc->nvEncDestroyBitstreamBuffer(ctx->nvencoder, ctx->surfaces[i].output_surface);
2220  }
2221  }
2222  av_freep(&ctx->surfaces);
2223  ctx->nb_surfaces = 0;
2224 
2225  av_frame_free(&ctx->frame);
2226 
2227  av_freep(&ctx->sei_data);
2228 
2229  if (ctx->nvencoder) {
2230  p_nvenc->nvEncDestroyEncoder(ctx->nvencoder);
2231 
2232  res = nvenc_pop_context(avctx);
2233  if (res < 0)
2234  return res;
2235  }
2236  ctx->nvencoder = NULL;
2237 
2238  if (ctx->cu_context_internal)
2239  CHECK_CU(dl_fn->cuda_dl->cuCtxDestroy(ctx->cu_context_internal));
2240  ctx->cu_context = ctx->cu_context_internal = NULL;
2241 
2242 #if CONFIG_D3D11VA
2243  if (ctx->d3d11_device) {
2244  ID3D11Device_Release(ctx->d3d11_device);
2245  ctx->d3d11_device = NULL;
2246  }
2247 #endif
2248 
2249  nvenc_free_functions(&dl_fn->nvenc_dl);
2250  cuda_free_functions(&dl_fn->cuda_dl);
2251 
2252  dl_fn->nvenc_device_count = 0;
2253 
2254  av_log(avctx, AV_LOG_VERBOSE, "Nvenc unloaded\n");
2255 
2256  return 0;
2257 }
2258 
2259 av_cold int ff_nvenc_encode_init(AVCodecContext *avctx)
2260 {
2261  NvencContext *ctx = avctx->priv_data;
2262  int ret;
2263 
2264  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2265  AVHWFramesContext *frames_ctx;
2266  if (!avctx->hw_frames_ctx) {
2267  av_log(avctx, AV_LOG_ERROR,
2268  "hw_frames_ctx must be set when using GPU frames as input\n");
2269  return AVERROR(EINVAL);
2270  }
2271  frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
2272  if (frames_ctx->format != avctx->pix_fmt) {
2273  av_log(avctx, AV_LOG_ERROR,
2274  "hw_frames_ctx must match the GPU frame type\n");
2275  return AVERROR(EINVAL);
2276  }
2277  ctx->data_pix_fmt = frames_ctx->sw_format;
2278  } else {
2279  ctx->data_pix_fmt = avctx->pix_fmt;
2280  }
2281 
2282  if (ctx->rgb_mode == NVENC_RGB_MODE_DISABLED && IS_RGB(ctx->data_pix_fmt)) {
2283  av_log(avctx, AV_LOG_ERROR, "Packed RGB input, but RGB support is disabled.\n");
2284  return AVERROR(EINVAL);
2285  }
2286 
2287  ctx->frame = av_frame_alloc();
2288  if (!ctx->frame)
2289  return AVERROR(ENOMEM);
2290 
2291  if ((ret = nvenc_load_libraries(avctx)) < 0)
2292  return ret;
2293 
2294  if ((ret = nvenc_setup_device(avctx)) < 0)
2295  return ret;
2296 
2297  if ((ret = nvenc_setup_encoder(avctx)) < 0)
2298  return ret;
2299 
2300  if ((ret = nvenc_setup_surfaces(avctx)) < 0)
2301  return ret;
2302 
2303  if (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) {
2304  if ((ret = nvenc_setup_extradata(avctx)) < 0)
2305  return ret;
2306  }
2307 
2308  return 0;
2309 }
2310 
2311 static NvencSurface *get_free_frame(NvencContext *ctx)
2312 {
2313  NvencSurface *tmp_surf;
2314 
2315  if (av_fifo_read(ctx->unused_surface_queue, &tmp_surf, 1) < 0)
2316  // queue empty
2317  return NULL;
2318 
2319  return tmp_surf;
2320 }
2321 
2322 static int nvenc_copy_frame(AVCodecContext *avctx, NvencSurface *nv_surface,
2323  NV_ENC_LOCK_INPUT_BUFFER *lock_buffer_params, const AVFrame *frame)
2324 {
2325  int dst_linesize[4] = {
2326  lock_buffer_params->pitch,
2327  lock_buffer_params->pitch,
2328  lock_buffer_params->pitch,
2329  lock_buffer_params->pitch
2330  };
2331  uint8_t *dst_data[4];
2332  int ret;
2333 
2334  if (frame->format == AV_PIX_FMT_YUV420P)
2335  dst_linesize[1] = dst_linesize[2] >>= 1;
2336 
2337  ret = av_image_fill_pointers(dst_data, frame->format, nv_surface->height,
2338  lock_buffer_params->bufferDataPtr, dst_linesize);
2339  if (ret < 0)
2340  return ret;
2341 
2342  if (frame->format == AV_PIX_FMT_YUV420P)
2343  FFSWAP(uint8_t*, dst_data[1], dst_data[2]);
2344 
2345  av_image_copy2(dst_data, dst_linesize,
2346  frame->data, frame->linesize, frame->format,
2347  avctx->width, avctx->height);
2348 
2349  return 0;
2350 }
2351 
2352 static int nvenc_find_free_reg_resource(AVCodecContext *avctx)
2353 {
2354  NvencContext *ctx = avctx->priv_data;
2355  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2356  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2357  NVENCSTATUS nv_status;
2358 
2359  int i, first_round;
2360 
2361  if (ctx->nb_registered_frames == FF_ARRAY_ELEMS(ctx->registered_frames)) {
2362  for (first_round = 1; first_round >= 0; first_round--) {
2363  for (i = 0; i < ctx->nb_registered_frames; i++) {
2364  if (!ctx->registered_frames[i].mapped) {
2365  if (ctx->registered_frames[i].regptr) {
2366  if (first_round)
2367  continue;
2368  nv_status = p_nvenc->nvEncUnregisterResource(ctx->nvencoder, ctx->registered_frames[i].regptr);
2369  if (nv_status != NV_ENC_SUCCESS)
2370  return nvenc_print_error(avctx, nv_status, "Failed unregistering unused input resource");
2371  ctx->registered_frames[i].ptr = NULL;
2372  ctx->registered_frames[i].regptr = NULL;
2373  }
2374  return i;
2375  }
2376  }
2377  }
2378  } else {
2379  return ctx->nb_registered_frames++;
2380  }
2381 
2382  av_log(avctx, AV_LOG_ERROR, "Too many registered CUDA frames\n");
2383  return AVERROR(ENOMEM);
2384 }
2385 
2386 static int nvenc_register_frame(AVCodecContext *avctx, const AVFrame *frame)
2387 {
2388  NvencContext *ctx = avctx->priv_data;
2389  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2390  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2391 
2392  AVHWFramesContext *frames_ctx = (AVHWFramesContext*)frame->hw_frames_ctx->data;
2393  NV_ENC_REGISTER_RESOURCE reg = { 0 };
2394  int i, idx, ret;
2395 
2396  for (i = 0; i < ctx->nb_registered_frames; i++) {
2397  if (avctx->pix_fmt == AV_PIX_FMT_CUDA && ctx->registered_frames[i].ptr == frame->data[0])
2398  return i;
2399  else if (avctx->pix_fmt == AV_PIX_FMT_D3D11 && ctx->registered_frames[i].ptr == frame->data[0] && ctx->registered_frames[i].ptr_index == (intptr_t)frame->data[1])
2400  return i;
2401  }
2402 
2403  idx = nvenc_find_free_reg_resource(avctx);
2404  if (idx < 0)
2405  return idx;
2406 
2407  reg.version = NV_ENC_REGISTER_RESOURCE_VER;
2408  reg.width = frames_ctx->width;
2409  reg.height = frames_ctx->height;
2410  reg.pitch = frame->linesize[0];
2411  reg.resourceToRegister = frame->data[0];
2412 
2413  if (avctx->pix_fmt == AV_PIX_FMT_CUDA) {
2414  reg.resourceType = NV_ENC_INPUT_RESOURCE_TYPE_CUDADEVICEPTR;
2415  }
2416  else if (avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2417  reg.resourceType = NV_ENC_INPUT_RESOURCE_TYPE_DIRECTX;
2418  reg.subResourceIndex = (intptr_t)frame->data[1];
2419  }
2420 
2421  reg.bufferFormat = nvenc_map_buffer_format(frames_ctx->sw_format);
2422  if (reg.bufferFormat == NV_ENC_BUFFER_FORMAT_UNDEFINED) {
2423  av_log(avctx, AV_LOG_FATAL, "Invalid input pixel format: %s\n",
2424  av_get_pix_fmt_name(frames_ctx->sw_format));
2425  return AVERROR(EINVAL);
2426  }
2427 
2428  ret = p_nvenc->nvEncRegisterResource(ctx->nvencoder, &reg);
2429  if (ret != NV_ENC_SUCCESS) {
2430  nvenc_print_error(avctx, ret, "Error registering an input resource");
2431  return AVERROR_UNKNOWN;
2432  }
2433 
2434  ctx->registered_frames[idx].ptr = frame->data[0];
2435  ctx->registered_frames[idx].ptr_index = reg.subResourceIndex;
2436  ctx->registered_frames[idx].regptr = reg.registeredResource;
2437  return idx;
2438 }
2439 
2440 static int nvenc_upload_frame(AVCodecContext *avctx, const AVFrame *frame,
2441  NvencSurface *nvenc_frame)
2442 {
2443  NvencContext *ctx = avctx->priv_data;
2444  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2445  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2446 
2447  int res;
2448  NVENCSTATUS nv_status;
2449 
2450  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2451  int reg_idx = nvenc_register_frame(avctx, frame);
2452  if (reg_idx < 0) {
2453  av_log(avctx, AV_LOG_ERROR, "Could not register an input HW frame\n");
2454  return reg_idx;
2455  }
2456 
2457  res = av_frame_ref(nvenc_frame->in_ref, frame);
2458  if (res < 0)
2459  return res;
2460 
2461  if (!ctx->registered_frames[reg_idx].mapped) {
2462  ctx->registered_frames[reg_idx].in_map.version = NV_ENC_MAP_INPUT_RESOURCE_VER;
2463  ctx->registered_frames[reg_idx].in_map.registeredResource = ctx->registered_frames[reg_idx].regptr;
2464  nv_status = p_nvenc->nvEncMapInputResource(ctx->nvencoder, &ctx->registered_frames[reg_idx].in_map);
2465  if (nv_status != NV_ENC_SUCCESS) {
2466  av_frame_unref(nvenc_frame->in_ref);
2467  return nvenc_print_error(avctx, nv_status, "Error mapping an input resource");
2468  }
2469  }
2470 
2471  ctx->registered_frames[reg_idx].mapped += 1;
2472 
2473  nvenc_frame->reg_idx = reg_idx;
2474  nvenc_frame->input_surface = ctx->registered_frames[reg_idx].in_map.mappedResource;
2475  nvenc_frame->format = ctx->registered_frames[reg_idx].in_map.mappedBufferFmt;
2476  nvenc_frame->pitch = frame->linesize[0];
2477 
2478  return 0;
2479  } else {
2480  NV_ENC_LOCK_INPUT_BUFFER lockBufferParams = { 0 };
2481 
2482  lockBufferParams.version = NV_ENC_LOCK_INPUT_BUFFER_VER;
2483  lockBufferParams.inputBuffer = nvenc_frame->input_surface;
2484 
2485  nv_status = p_nvenc->nvEncLockInputBuffer(ctx->nvencoder, &lockBufferParams);
2486  if (nv_status != NV_ENC_SUCCESS) {
2487  return nvenc_print_error(avctx, nv_status, "Failed locking nvenc input buffer");
2488  }
2489 
2490  nvenc_frame->pitch = lockBufferParams.pitch;
2491  res = nvenc_copy_frame(avctx, nvenc_frame, &lockBufferParams, frame);
2492 
2493  nv_status = p_nvenc->nvEncUnlockInputBuffer(ctx->nvencoder, nvenc_frame->input_surface);
2494  if (nv_status != NV_ENC_SUCCESS) {
2495  return nvenc_print_error(avctx, nv_status, "Failed unlocking input buffer!");
2496  }
2497 
2498  return res;
2499  }
2500 }
2501 
2502 #ifdef NVENC_HAVE_TIME_CODE
2503 static void nvenc_fill_time_code(AVCodecContext *avctx, const AVFrame *frame, NV_ENC_TIME_CODE *time_code)
2504 {
2505  AVFrameSideData *sd = av_frame_get_side_data(frame, AV_FRAME_DATA_S12M_TIMECODE);
2506 
2507  if (sd) {
2508  uint32_t *tc = (uint32_t*)sd->data;
2509  int cnt = FFMIN(tc[0], FF_ARRAY_ELEMS(time_code->clockTimestamp));
2510 
2511  switch (cnt) {
2512  case 0:
2513  time_code->displayPicStruct = NV_ENC_PIC_STRUCT_DISPLAY_FRAME;
2514  time_code->skipClockTimestampInsertion = 1;
2515  break;
2516  case 2:
2517  time_code->displayPicStruct = NV_ENC_PIC_STRUCT_DISPLAY_FRAME_DOUBLING;
2518  break;
2519  case 3:
2520  time_code->displayPicStruct = NV_ENC_PIC_STRUCT_DISPLAY_FRAME_TRIPLING;
2521  break;
2522  default:
2523  time_code->displayPicStruct = NV_ENC_PIC_STRUCT_DISPLAY_FRAME;
2524  break;
2525  }
2526 
2527  for (int i = 0; i < cnt; i++) {
2528  unsigned hh, mm, ss, ff, drop;
2529  ff_timecode_set_smpte(&drop, &hh, &mm, &ss, &ff, avctx->framerate, tc[i + 1], 0, 0);
2530 
2531  time_code->clockTimestamp[i].countingType = 0;
2532  time_code->clockTimestamp[i].discontinuityFlag = 0;
2533  time_code->clockTimestamp[i].cntDroppedFrames = drop;
2534  time_code->clockTimestamp[i].nFrames = ff;
2535  time_code->clockTimestamp[i].secondsValue = ss;
2536  time_code->clockTimestamp[i].minutesValue = mm;
2537  time_code->clockTimestamp[i].hoursValue = hh;
2538  time_code->clockTimestamp[i].timeOffset = 0;
2539  }
2540  } else {
2541  time_code->displayPicStruct = NV_ENC_PIC_STRUCT_DISPLAY_FRAME;
2542  time_code->skipClockTimestampInsertion = 1;
2543  }
2544 }
2545 #endif
2546 
2547 static void nvenc_codec_specific_pic_params(AVCodecContext *avctx, const AVFrame *frame,
2548  NV_ENC_PIC_PARAMS *params,
2549  NV_ENC_SEI_PAYLOAD *sei_data,
2550  int sei_count)
2551 {
2552  NvencContext *ctx = avctx->priv_data;
2553 
2554  switch (avctx->codec->id) {
2555  case AV_CODEC_ID_H264:
2556  params->codecPicParams.h264PicParams.sliceMode =
2557  ctx->encode_config.encodeCodecConfig.h264Config.sliceMode;
2558  params->codecPicParams.h264PicParams.sliceModeData =
2559  ctx->encode_config.encodeCodecConfig.h264Config.sliceModeData;
2560  if (sei_count > 0) {
2561  params->codecPicParams.h264PicParams.seiPayloadArray = sei_data;
2562  params->codecPicParams.h264PicParams.seiPayloadArrayCnt = sei_count;
2563  }
2564 
2565 #ifdef NVENC_HAVE_TIME_CODE
2566  if (ctx->s12m_tc)
2567  nvenc_fill_time_code(avctx, frame, &params->codecPicParams.h264PicParams.timeCode);
2568 #endif
2569 
2570  break;
2571  case AV_CODEC_ID_HEVC:
2572  params->codecPicParams.hevcPicParams.sliceMode =
2573  ctx->encode_config.encodeCodecConfig.hevcConfig.sliceMode;
2574  params->codecPicParams.hevcPicParams.sliceModeData =
2575  ctx->encode_config.encodeCodecConfig.hevcConfig.sliceModeData;
2576  if (sei_count > 0) {
2577  params->codecPicParams.hevcPicParams.seiPayloadArray = sei_data;
2578  params->codecPicParams.hevcPicParams.seiPayloadArrayCnt = sei_count;
2579  }
2580 
2581  break;
2582 #if CONFIG_AV1_NVENC_ENCODER
2583  case AV_CODEC_ID_AV1:
2584  params->codecPicParams.av1PicParams.numTileColumns =
2585  ctx->encode_config.encodeCodecConfig.av1Config.numTileColumns;
2586  params->codecPicParams.av1PicParams.numTileRows =
2587  ctx->encode_config.encodeCodecConfig.av1Config.numTileRows;
2588  if (sei_count > 0) {
2589  params->codecPicParams.av1PicParams.obuPayloadArray = sei_data;
2590  params->codecPicParams.av1PicParams.obuPayloadArrayCnt = sei_count;
2591  }
2592 
2593  break;
2594 #endif
2595  }
2596 }
2597 
2598 static inline void timestamp_queue_enqueue(AVFifo *queue, int64_t timestamp)
2599 {
2600  av_fifo_write(queue, &timestamp, 1);
2601 }
2602 
2603 static inline int64_t timestamp_queue_dequeue(AVFifo *queue)
2604 {
2605  int64_t timestamp = AV_NOPTS_VALUE;
2606  // The following call might fail if the queue is empty.
2607  av_fifo_read(queue, &timestamp, 1);
2608 
2609  return timestamp;
2610 }
2611 
2612 static inline int64_t timestamp_queue_peek(AVFifo *queue, size_t index)
2613 {
2614  int64_t timestamp = AV_NOPTS_VALUE;
2615  av_fifo_peek(queue, &timestamp, 1, index);
2616 
2617  return timestamp;
2618 }
2619 
2620 static int nvenc_set_timestamp(AVCodecContext *avctx,
2621  NV_ENC_LOCK_BITSTREAM *params,
2622  AVPacket *pkt)
2623 {
2624  NvencContext *ctx = avctx->priv_data;
2625  unsigned int delay;
2626  int64_t delay_time;
2627 
2628  pkt->pts = params->outputTimeStamp;
2629 
2630  if (!(avctx->codec_descriptor->props & AV_CODEC_PROP_REORDER)) {
2631  pkt->dts = pkt->pts;
2632  return 0;
2633  }
2634 
2635  // This can be more than necessary, but we don't know the real reorder delay.
2636  delay = FFMAX(ctx->encode_config.frameIntervalP - 1, 0);
2637 #ifdef NVENC_HAVE_MVHEVC
2638  delay *= ctx->multiview ? 2 : 1;
2639 #endif
2640  if (ctx->output_frame_num >= delay) {
2641  pkt->dts = timestamp_queue_dequeue(ctx->timestamp_list);
2642  ctx->output_frame_num++;
2643  return 0;
2644  }
2645 
2646  delay_time = ctx->initial_delay_time;
2647  if (!delay_time) {
2648  int64_t t1, t2, t3;
2649  t1 = timestamp_queue_peek(ctx->timestamp_list, delay);
2650  t2 = timestamp_queue_peek(ctx->timestamp_list, 0);
2651  t3 = (delay > 1) ? timestamp_queue_peek(ctx->timestamp_list, 1) : t1;
2652 
2653  if (t1 != AV_NOPTS_VALUE) {
2654  delay_time = t1 - t2;
2655  } else if (avctx->framerate.num > 0 && avctx->framerate.den > 0) {
2656  delay_time = av_rescale_q(delay, (AVRational) {avctx->framerate.den, avctx->framerate.num},
2657  avctx->time_base);
2658  } else if (t3 != AV_NOPTS_VALUE) {
2659  delay_time = delay * (t3 - t2);
2660  } else {
2661  delay_time = delay;
2662  }
2663  ctx->initial_delay_time = delay_time;
2664  }
2665 
2666  /* The following method is simple, but doesn't guarantee monotonic with VFR
2667  * when delay_time isn't accurate (that is, t1 == AV_NOPTS_VALUE)
2668  *
2669  * dts = timestamp_queue_peek(ctx->timestamp_list, ctx->output_frame_num) - delay_time
2670  */
2671  pkt->dts = timestamp_queue_peek(ctx->timestamp_list, 0) - delay_time * (delay - ctx->output_frame_num) / delay;
2672  ctx->output_frame_num++;
2673 
2674  return 0;
2675 }
2676 
2677 static int nvenc_store_frame_data(AVCodecContext *avctx, NV_ENC_PIC_PARAMS *pic_params, const AVFrame *frame)
2678 {
2679  NvencContext *ctx = avctx->priv_data;
2680  int res = 0;
2681 
2682  int idx = ctx->frame_data_array_pos;
2683  NvencFrameData *frame_data = &ctx->frame_data_array[idx];
2684 
2685  // in case the encoder got reconfigured, there might be leftovers
2686  av_buffer_unref(&frame_data->frame_opaque_ref);
2687 
2688  if (frame->opaque_ref && avctx->flags & AV_CODEC_FLAG_COPY_OPAQUE) {
2689  frame_data->frame_opaque_ref = av_buffer_ref(frame->opaque_ref);
2690  if (!frame_data->frame_opaque_ref)
2691  return AVERROR(ENOMEM);
2692  }
2693 
2694  frame_data->duration = frame->duration;
2695  frame_data->frame_opaque = frame->opaque;
2696 
2697  ctx->frame_data_array_pos = (ctx->frame_data_array_pos + 1) % ctx->frame_data_array_nb;
2698  pic_params->inputDuration = idx;
2699 
2700  return res;
2701 }
2702 
2703 static int nvenc_retrieve_frame_data(AVCodecContext *avctx, NV_ENC_LOCK_BITSTREAM *lock_params, AVPacket *pkt)
2704 {
2705  NvencContext *ctx = avctx->priv_data;
2706  int res = 0;
2707 
2708  int idx = lock_params->outputDuration;
2709  NvencFrameData *frame_data = &ctx->frame_data_array[idx];
2710 
2711  pkt->duration = frame_data->duration;
2712 
2713  if (avctx->flags & AV_CODEC_FLAG_COPY_OPAQUE) {
2714  pkt->opaque = frame_data->frame_opaque;
2715  pkt->opaque_ref = frame_data->frame_opaque_ref;
2716  frame_data->frame_opaque_ref = NULL;
2717  }
2718 
2719  av_buffer_unref(&frame_data->frame_opaque_ref);
2720 
2721  return res;
2722 }
2723 
2724 static int process_output_surface(AVCodecContext *avctx, AVPacket *pkt, NvencSurface *tmpoutsurf)
2725 {
2726  NvencContext *ctx = avctx->priv_data;
2727  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2728  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2729 
2730  NV_ENC_LOCK_BITSTREAM lock_params = { 0 };
2731  NVENCSTATUS nv_status;
2732  int res = 0;
2733 
2734  enum AVPictureType pict_type;
2735 
2736  lock_params.version = NV_ENC_LOCK_BITSTREAM_VER;
2737 
2738  lock_params.doNotWait = 0;
2739  lock_params.outputBitstream = tmpoutsurf->output_surface;
2740 
2741  nv_status = p_nvenc->nvEncLockBitstream(ctx->nvencoder, &lock_params);
2742  if (nv_status != NV_ENC_SUCCESS) {
2743  res = nvenc_print_error(avctx, nv_status, "Failed locking bitstream buffer");
2744  goto error;
2745  }
2746 
2747  res = ff_get_encode_buffer(avctx, pkt, lock_params.bitstreamSizeInBytes, 0);
2748 
2749  if (res < 0) {
2750  p_nvenc->nvEncUnlockBitstream(ctx->nvencoder, tmpoutsurf->output_surface);
2751  goto error;
2752  }
2753 
2754  memcpy(pkt->data, lock_params.bitstreamBufferPtr, lock_params.bitstreamSizeInBytes);
2755 
2756  nv_status = p_nvenc->nvEncUnlockBitstream(ctx->nvencoder, tmpoutsurf->output_surface);
2757  if (nv_status != NV_ENC_SUCCESS) {
2758  res = nvenc_print_error(avctx, nv_status, "Failed unlocking bitstream buffer, expect the gates of mordor to open");
2759  goto error;
2760  }
2761 
2762 
2763  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2764  ctx->registered_frames[tmpoutsurf->reg_idx].mapped -= 1;
2765  if (ctx->registered_frames[tmpoutsurf->reg_idx].mapped == 0) {
2766  nv_status = p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, ctx->registered_frames[tmpoutsurf->reg_idx].in_map.mappedResource);
2767  if (nv_status != NV_ENC_SUCCESS) {
2768  res = nvenc_print_error(avctx, nv_status, "Failed unmapping input resource");
2769  goto error;
2770  }
2771  } else if (ctx->registered_frames[tmpoutsurf->reg_idx].mapped < 0) {
2772  res = AVERROR_BUG;
2773  goto error;
2774  }
2775 
2776  av_frame_unref(tmpoutsurf->in_ref);
2777 
2778  tmpoutsurf->input_surface = NULL;
2779  }
2780 
2781  switch (lock_params.pictureType) {
2782  case NV_ENC_PIC_TYPE_IDR:
2783  pkt->flags |= AV_PKT_FLAG_KEY;
2784  case NV_ENC_PIC_TYPE_I:
2785  pict_type = AV_PICTURE_TYPE_I;
2786  break;
2787  case NV_ENC_PIC_TYPE_P:
2788  pict_type = AV_PICTURE_TYPE_P;
2789  break;
2790  case NV_ENC_PIC_TYPE_B:
2791  pict_type = AV_PICTURE_TYPE_B;
2792  break;
2793  case NV_ENC_PIC_TYPE_BI:
2794  pict_type = AV_PICTURE_TYPE_BI;
2795  break;
2796  default:
2797  av_log(avctx, AV_LOG_ERROR, "Unknown picture type encountered, expect the output to be broken.\n");
2798  av_log(avctx, AV_LOG_ERROR, "Please report this error and include as much information on how to reproduce it as possible.\n");
2799  res = AVERROR_EXTERNAL;
2800  goto error;
2801  }
2802 
2803  ff_encode_add_stats_side_data(pkt,
2804  (lock_params.frameAvgQP - 1) * FF_QP2LAMBDA, NULL, 0, pict_type);
2805 
2806  res = nvenc_set_timestamp(avctx, &lock_params, pkt);
2807  if (res < 0)
2808  goto error2;
2809 
2810  res = nvenc_retrieve_frame_data(avctx, &lock_params, pkt);
2811  if (res < 0)
2812  goto error2;
2813 
2814  return 0;
2815 
2816 error:
2817  timestamp_queue_dequeue(ctx->timestamp_list);
2818 
2819 error2:
2820  return res;
2821 }
2822 
2823 static int output_ready(AVCodecContext *avctx, int flush)
2824 {
2825  NvencContext *ctx = avctx->priv_data;
2826  int nb_ready, nb_pending;
2827 
2828  nb_ready = av_fifo_can_read(ctx->output_surface_ready_queue);
2829  nb_pending = av_fifo_can_read(ctx->output_surface_queue);
2830  if (flush)
2831  return nb_ready > 0;
2832  return (nb_ready > 0) && (nb_ready + nb_pending >= ctx->async_depth);
2833 }
2834 
2835 static int prepare_sei_data_array(AVCodecContext *avctx, const AVFrame *frame)
2836 {
2837  NvencContext *ctx = avctx->priv_data;
2838  int sei_count = 0;
2839  int i, res;
2840 
2841  if (ctx->a53_cc && av_frame_get_side_data(frame, AV_FRAME_DATA_A53_CC)) {
2842  void *a53_data = NULL;
2843  size_t a53_size = 0;
2844 
2845  if (ff_alloc_a53_sei(frame, 0, &a53_data, &a53_size) < 0) {
2846  av_log(ctx, AV_LOG_ERROR, "Not enough memory for closed captions, skipping\n");
2847  }
2848 
2849  if (a53_data) {
2850  void *tmp = av_fast_realloc(ctx->sei_data,
2851  &ctx->sei_data_size,
2852  (sei_count + 1) * sizeof(*ctx->sei_data));
2853  if (!tmp) {
2854  av_free(a53_data);
2855  res = AVERROR(ENOMEM);
2856  goto error;
2857  } else {
2858  ctx->sei_data = tmp;
2859  ctx->sei_data[sei_count].payloadSize = (uint32_t)a53_size;
2860  ctx->sei_data[sei_count].payload = (uint8_t*)a53_data;
2861 
2862 #if CONFIG_AV1_NVENC_ENCODER
2863  if (avctx->codec->id == AV_CODEC_ID_AV1)
2864  ctx->sei_data[sei_count].payloadType = AV1_METADATA_TYPE_ITUT_T35;
2865  else
2866 #endif
2867  ctx->sei_data[sei_count].payloadType = SEI_TYPE_USER_DATA_REGISTERED_ITU_T_T35;
2868 
2869  sei_count++;
2870  }
2871  }
2872  }
2873 
2874  if (ctx->s12m_tc && avctx->codec->id != AV_CODEC_ID_H264 && av_frame_get_side_data(frame, AV_FRAME_DATA_S12M_TIMECODE)) {
2875  void *tc_data = NULL;
2876  size_t tc_size = 0;
2877 
2878  if (ff_alloc_timecode_sei(frame, avctx->framerate, 0, &tc_data, &tc_size) < 0) {
2879  av_log(ctx, AV_LOG_ERROR, "Not enough memory for timecode sei, skipping\n");
2880  }
2881 
2882  if (tc_data) {
2883  void *tmp = av_fast_realloc(ctx->sei_data,
2884  &ctx->sei_data_size,
2885  (sei_count + 1) * sizeof(*ctx->sei_data));
2886  if (!tmp) {
2887  av_free(tc_data);
2888  res = AVERROR(ENOMEM);
2889  goto error;
2890  } else {
2891  ctx->sei_data = tmp;
2892  ctx->sei_data[sei_count].payloadSize = (uint32_t)tc_size;
2893  ctx->sei_data[sei_count].payload = (uint8_t*)tc_data;
2894 
2895 #if CONFIG_AV1_NVENC_ENCODER
2896  if (avctx->codec->id == AV_CODEC_ID_AV1)
2897  ctx->sei_data[sei_count].payloadType = AV1_METADATA_TYPE_TIMECODE;
2898  else
2899 #endif
2900  ctx->sei_data[sei_count].payloadType = SEI_TYPE_TIME_CODE;
2901 
2902  sei_count++;
2903  }
2904  }
2905  }
2906 
2907  if (!ctx->udu_sei)
2908  return sei_count;
2909 
2910  for (i = 0; i < frame->nb_side_data; i++) {
2911  AVFrameSideData *side_data = frame->side_data[i];
2912  void *tmp;
2913 
2914  if (side_data->type != AV_FRAME_DATA_SEI_UNREGISTERED)
2915  continue;
2916 
2917  tmp = av_fast_realloc(ctx->sei_data,
2918  &ctx->sei_data_size,
2919  (sei_count + 1) * sizeof(*ctx->sei_data));
2920  if (!tmp) {
2921  res = AVERROR(ENOMEM);
2922  goto error;
2923  } else {
2924  ctx->sei_data = tmp;
2925  ctx->sei_data[sei_count].payloadSize = side_data->size;
2926  ctx->sei_data[sei_count].payloadType = SEI_TYPE_USER_DATA_UNREGISTERED;
2927  ctx->sei_data[sei_count].payload = av_memdup(side_data->data, side_data->size);
2928 
2929  if (!ctx->sei_data[sei_count].payload) {
2930  res = AVERROR(ENOMEM);
2931  goto error;
2932  }
2933 
2934  sei_count++;
2935  }
2936  }
2937 
2938  return sei_count;
2939 
2940 error:
2941  for (i = 0; i < sei_count; i++)
2942  av_freep(&(ctx->sei_data[i].payload));
2943 
2944  return res;
2945 }
2946 
2947 static void reconfig_encoder(AVCodecContext *avctx, const AVFrame *frame)
2948 {
2949  NvencContext *ctx = avctx->priv_data;
2950  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
2951  NVENCSTATUS ret;
2952 
2953  NV_ENC_RECONFIGURE_PARAMS params = { 0 };
2954  int needs_reconfig = 0;
2955  int needs_encode_config = 0;
2956  int reconfig_bitrate = 0, reconfig_dar = 0;
2957  int dw, dh;
2958 
2959  params.version = NV_ENC_RECONFIGURE_PARAMS_VER;
2960  params.reInitEncodeParams = ctx->init_encode_params;
2961 
2962  compute_dar(avctx, &dw, &dh);
2963  if (dw != ctx->init_encode_params.darWidth || dh != ctx->init_encode_params.darHeight) {
2964  av_log(avctx, AV_LOG_VERBOSE,
2965  "aspect ratio change (DAR): %d:%d -> %d:%d\n",
2966  ctx->init_encode_params.darWidth,
2967  ctx->init_encode_params.darHeight, dw, dh);
2968 
2969  params.reInitEncodeParams.darHeight = dh;
2970  params.reInitEncodeParams.darWidth = dw;
2971 
2972  needs_reconfig = 1;
2973  reconfig_dar = 1;
2974  }
2975 
2976  if (ctx->rc != NV_ENC_PARAMS_RC_CONSTQP && ctx->support_dyn_bitrate) {
2977  if (avctx->bit_rate > 0 && params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate != avctx->bit_rate) {
2978  av_log(avctx, AV_LOG_VERBOSE,
2979  "avg bitrate change: %d -> %d\n",
2980  params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate,
2981  (uint32_t)avctx->bit_rate);
2982 
2983  params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate = avctx->bit_rate;
2984  reconfig_bitrate = 1;
2985  }
2986 
2987  if (avctx->rc_max_rate > 0 && ctx->encode_config.rcParams.maxBitRate != avctx->rc_max_rate) {
2988  av_log(avctx, AV_LOG_VERBOSE,
2989  "max bitrate change: %d -> %d\n",
2990  params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate,
2991  (uint32_t)avctx->rc_max_rate);
2992 
2993  params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate = avctx->rc_max_rate;
2994  reconfig_bitrate = 1;
2995  }
2996 
2997  if (avctx->rc_buffer_size > 0 && ctx->encode_config.rcParams.vbvBufferSize != avctx->rc_buffer_size) {
2998  av_log(avctx, AV_LOG_VERBOSE,
2999  "vbv buffer size change: %d -> %d\n",
3000  params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize,
3001  avctx->rc_buffer_size);
3002 
3003  params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize = avctx->rc_buffer_size;
3004  reconfig_bitrate = 1;
3005  }
3006 
3007  if (reconfig_bitrate) {
3008  params.resetEncoder = 1;
3009  params.forceIDR = 1;
3010 
3011  needs_encode_config = 1;
3012  needs_reconfig = 1;
3013  }
3014  }
3015 
3016  if (!needs_encode_config)
3017  params.reInitEncodeParams.encodeConfig = NULL;
3018 
3019  if (needs_reconfig) {
3020  ret = p_nvenc->nvEncReconfigureEncoder(ctx->nvencoder, &params);
3021  if (ret != NV_ENC_SUCCESS) {
3022  nvenc_print_error(avctx, ret, "failed to reconfigure nvenc");
3023  } else {
3024  if (reconfig_dar) {
3025  ctx->init_encode_params.darHeight = dh;
3026  ctx->init_encode_params.darWidth = dw;
3027  }
3028 
3029  if (reconfig_bitrate) {
3030  ctx->encode_config.rcParams.averageBitRate = params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate;
3031  ctx->encode_config.rcParams.maxBitRate = params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate;
3032  ctx->encode_config.rcParams.vbvBufferSize = params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize;
3033  }
3034 
3035  }
3036  }
3037 }
3038 
3039 #ifdef NVENC_HAVE_HEVC_AND_AV1_MASTERING_METADATA
3040 static int nvenc_set_mastering_display_data(AVCodecContext *avctx, const AVFrame *frame, NV_ENC_PIC_PARAMS *pic_params,
3041  MASTERING_DISPLAY_INFO *mastering_disp_info, CONTENT_LIGHT_LEVEL *content_light_level)
3042 {
3043  NvencContext *ctx = avctx->priv_data;
3044 
3045  if (ctx->mdm || ctx->cll) {
3046  const AVFrameSideData *sd_mdm = av_frame_get_side_data(frame, AV_FRAME_DATA_MASTERING_DISPLAY_METADATA);
3047  const AVFrameSideData *sd_cll = av_frame_get_side_data(frame, AV_FRAME_DATA_CONTENT_LIGHT_LEVEL);
3048  const int chroma_den = (avctx->codec->id == AV_CODEC_ID_AV1) ? 1 << 16 : 50000;
3049  const int max_luma_den = (avctx->codec->id == AV_CODEC_ID_AV1) ? 1 << 8 : 10000;
3050  const int min_luma_den = (avctx->codec->id == AV_CODEC_ID_AV1) ? 1 << 14 : 10000;
3051 
3052  if (!sd_mdm)
3053  sd_mdm = av_frame_side_data_get(avctx->decoded_side_data,
3054  avctx->nb_decoded_side_data,
3055  AV_FRAME_DATA_MASTERING_DISPLAY_METADATA);
3056  if (!sd_cll)
3057  sd_cll = av_frame_side_data_get(avctx->decoded_side_data,
3058  avctx->nb_decoded_side_data,
3059  AV_FRAME_DATA_CONTENT_LIGHT_LEVEL);
3060 
3061  if (sd_mdm) {
3062  const AVMasteringDisplayMetadata *mdm = (AVMasteringDisplayMetadata *)sd_mdm->data;
3063 
3064  mastering_disp_info->r.x = av_rescale(mdm->display_primaries[0][0].num, chroma_den,
3065  mdm->display_primaries[0][0].den);
3066  mastering_disp_info->r.y = av_rescale(mdm->display_primaries[0][1].num, chroma_den,
3067  mdm->display_primaries[0][1].den);
3068  mastering_disp_info->g.x = av_rescale(mdm->display_primaries[1][0].num, chroma_den,
3069  mdm->display_primaries[1][0].den);
3070  mastering_disp_info->g.y = av_rescale(mdm->display_primaries[1][1].num, chroma_den,
3071  mdm->display_primaries[1][1].den);
3072  mastering_disp_info->b.x = av_rescale(mdm->display_primaries[2][0].num, chroma_den,
3073  mdm->display_primaries[2][0].den);
3074  mastering_disp_info->b.y = av_rescale(mdm->display_primaries[2][1].num, chroma_den,
3075  mdm->display_primaries[2][1].den);
3076  mastering_disp_info->whitePoint.x = av_rescale(mdm->white_point[0].num, chroma_den,
3077  mdm->white_point[0].den);
3078  mastering_disp_info->whitePoint.y = av_rescale(mdm->white_point[1].num, chroma_den,
3079  mdm->white_point[1].den);
3080  mastering_disp_info->maxLuma = av_rescale(mdm->max_luminance.num, max_luma_den,
3081  mdm->max_luminance.den);
3082  mastering_disp_info->minLuma = av_rescale(mdm->min_luminance.num, min_luma_den,
3083  mdm->min_luminance.den);
3084 
3085  if (avctx->codec->id == AV_CODEC_ID_HEVC)
3086  pic_params->codecPicParams.hevcPicParams.pMasteringDisplay = mastering_disp_info;
3087  else if (avctx->codec->id == AV_CODEC_ID_AV1)
3088  pic_params->codecPicParams.av1PicParams.pMasteringDisplay = mastering_disp_info;
3089  else
3090  return AVERROR_BUG;
3091  }
3092  if (sd_cll) {
3093  const AVContentLightMetadata *cll = (AVContentLightMetadata *)sd_cll->data;
3094 
3095  content_light_level->maxContentLightLevel = cll->MaxCLL;
3096  content_light_level->maxPicAverageLightLevel = cll->MaxFALL;
3097 
3098  if (avctx->codec->id == AV_CODEC_ID_HEVC)
3099  pic_params->codecPicParams.hevcPicParams.pMaxCll = content_light_level;
3100  else if (avctx->codec->id == AV_CODEC_ID_AV1)
3101  pic_params->codecPicParams.av1PicParams.pMaxCll = content_light_level;
3102  else
3103  return AVERROR_BUG;
3104  }
3105  }
3106 
3107  return 0;
3108 }
3109 #endif
3110 
3111 static int nvenc_send_frame(AVCodecContext *avctx, const AVFrame *frame)
3112 {
3113  NVENCSTATUS nv_status;
3114  NvencSurface *tmp_out_surf, *in_surf;
3115  int res, res2;
3116  int sei_count = 0;
3117  int i;
3118 #ifdef NVENC_HAVE_HEVC_AND_AV1_MASTERING_METADATA
3119  MASTERING_DISPLAY_INFO mastering_disp_info = { 0 };
3120  CONTENT_LIGHT_LEVEL content_light_level = { 0 };
3121 #endif
3122 #ifdef NVENC_HAVE_MVHEVC
3123  HEVC_3D_REFERENCE_DISPLAY_INFO ref_disp_info = { 0 };
3124 #endif
3125 
3126  NvencContext *ctx = avctx->priv_data;
3127  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
3128  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
3129 
3130  NV_ENC_PIC_PARAMS pic_params = { 0 };
3131  pic_params.version = NV_ENC_PIC_PARAMS_VER;
3132 
3133  if ((!ctx->cu_context && !ctx->d3d11_device) || !ctx->nvencoder)
3134  return AVERROR(EINVAL);
3135 
3136  if (frame && frame->buf[0]) {
3137  in_surf = get_free_frame(ctx);
3138  if (!in_surf)
3139  return AVERROR(EAGAIN);
3140 
3141  res = nvenc_push_context(avctx);
3142  if (res < 0)
3143  return res;
3144 
3145  reconfig_encoder(avctx, frame);
3146 
3147  res = nvenc_upload_frame(avctx, frame, in_surf);
3148 
3149  res2 = nvenc_pop_context(avctx);
3150  if (res2 < 0)
3151  return res2;
3152 
3153  if (res)
3154  return res;
3155 
3156  pic_params.inputBuffer = in_surf->input_surface;
3157  pic_params.bufferFmt = in_surf->format;
3158  pic_params.inputWidth = in_surf->width;
3159  pic_params.inputHeight = in_surf->height;
3160  pic_params.inputPitch = in_surf->pitch;
3161  pic_params.outputBitstream = in_surf->output_surface;
3162 
3163  if (avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
3164  if (frame->flags & AV_FRAME_FLAG_TOP_FIELD_FIRST)
3165  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FIELD_TOP_BOTTOM;
3166  else
3167  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FIELD_BOTTOM_TOP;
3168  } else {
3169  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FRAME;
3170  }
3171 
3172  if (ctx->forced_idr >= 0 && frame->pict_type == AV_PICTURE_TYPE_I) {
3173  pic_params.encodePicFlags =
3174  ctx->forced_idr ? NV_ENC_PIC_FLAG_FORCEIDR : NV_ENC_PIC_FLAG_FORCEINTRA;
3175  } else {
3176  pic_params.encodePicFlags = 0;
3177  }
3178 
3179  pic_params.frameIdx = ctx->frame_idx_counter++;
3180  pic_params.inputTimeStamp = frame->pts;
3181 
3182  if (ctx->extra_sei) {
3183  res = prepare_sei_data_array(avctx, frame);
3184  if (res < 0)
3185  return res;
3186  sei_count = res;
3187  }
3188 
3189 #ifdef NVENC_HAVE_HEVC_AND_AV1_MASTERING_METADATA
3190  res = nvenc_set_mastering_display_data(avctx, frame, &pic_params, &mastering_disp_info, &content_light_level);
3191  if (res < 0)
3192  return res;
3193 #endif
3194 
3195 #ifdef NVENC_HAVE_MVHEVC
3196  if (ctx->multiview) {
3197  const AVFrameSideData *sd_tdrdi = av_frame_get_side_data(frame, AV_FRAME_DATA_3D_REFERENCE_DISPLAYS);
3198  const AVFrameSideData *sd_view_id = av_frame_get_side_data(frame, AV_FRAME_DATA_VIEW_ID);
3199 
3200  if (sd_view_id)
3201  ctx->next_view_id = *(int*)sd_view_id->data;
3202 
3203  pic_params.codecPicParams.hevcPicParams.viewId = ctx->next_view_id;
3204 
3205  if (sd_tdrdi) {
3206  AV3DReferenceDisplaysInfo *tdrdi = (AV3DReferenceDisplaysInfo*)sd_tdrdi->data;
3207 
3208  ref_disp_info.refViewingDistanceFlag = tdrdi->ref_viewing_distance_flag;
3209  ref_disp_info.precRefViewingDist = tdrdi->prec_ref_viewing_dist;
3210  ref_disp_info.precRefDisplayWidth = tdrdi->prec_ref_display_width;
3211 
3212  ref_disp_info.numRefDisplaysMinus1 = tdrdi->num_ref_displays - 1;
3213 
3214  for (i = 0; i < tdrdi->num_ref_displays &&
3215  i < FF_ARRAY_ELEMS(ref_disp_info.leftViewId); i++) {
3216  const AV3DReferenceDisplay *display = av_tdrdi_get_display(tdrdi, i);
3217  ref_disp_info.leftViewId[i] = display->left_view_id;
3218  ref_disp_info.rightViewId[i] = display->right_view_id;
3219  ref_disp_info.exponentRefDisplayWidth[i] = display->exponent_ref_display_width;
3220  ref_disp_info.mantissaRefDisplayWidth[i] = display->mantissa_ref_display_width;
3221  ref_disp_info.exponentRefViewingDistance[i] = display->exponent_ref_viewing_distance;
3222  ref_disp_info.mantissaRefViewingDistance[i] = display->mantissa_ref_viewing_distance;
3223  ref_disp_info.additionalShiftPresentFlag[i] = display->additional_shift_present_flag;
3224  ref_disp_info.numSampleShiftPlus512[i] = display->num_sample_shift + 512;
3225  }
3226 
3227  pic_params.codecPicParams.hevcPicParams.p3DReferenceDisplayInfo = &ref_disp_info;
3228  ctx->display_sei_sent = 1;
3229  } else if (!ctx->display_sei_sent) {
3230  ref_disp_info.precRefDisplayWidth = 31;
3231  ref_disp_info.leftViewId[0] = 0;
3232  ref_disp_info.rightViewId[0] = 1;
3233 
3234  pic_params.codecPicParams.hevcPicParams.p3DReferenceDisplayInfo = &ref_disp_info;
3235  ctx->display_sei_sent = 1;
3236  }
3237 
3238  ctx->next_view_id = !ctx->next_view_id;
3239  }
3240 #endif
3241 
3242  res = nvenc_store_frame_data(avctx, &pic_params, frame);
3243  if (res < 0)
3244  return res;
3245 
3246  nvenc_codec_specific_pic_params(avctx, frame, &pic_params, ctx->sei_data, sei_count);
3247  } else {
3248  pic_params.encodePicFlags = NV_ENC_PIC_FLAG_EOS;
3249  }
3250 
3251  res = nvenc_push_context(avctx);
3252  if (res < 0)
3253  return res;
3254 
3255  nv_status = p_nvenc->nvEncEncodePicture(ctx->nvencoder, &pic_params);
3256 
3257  for (i = 0; i < sei_count; i++)
3258  av_freep(&(ctx->sei_data[i].payload));
3259 
3260  res = nvenc_pop_context(avctx);
3261  if (res < 0)
3262  return res;
3263 
3264  if (nv_status != NV_ENC_SUCCESS &&
3265  nv_status != NV_ENC_ERR_NEED_MORE_INPUT)
3266  return nvenc_print_error(avctx, nv_status, "EncodePicture failed!");
3267 
3268  if (frame && frame->buf[0]) {
3269  av_fifo_write(ctx->output_surface_queue, &in_surf, 1);
3270 
3271  if (avctx->codec_descriptor->props & AV_CODEC_PROP_REORDER)
3272  timestamp_queue_enqueue(ctx->timestamp_list, frame->pts);
3273  }
3274 
3275  /* all the pending buffers are now ready for output */
3276  if (nv_status == NV_ENC_SUCCESS) {
3277  while (av_fifo_read(ctx->output_surface_queue, &tmp_out_surf, 1) >= 0)
3278  av_fifo_write(ctx->output_surface_ready_queue, &tmp_out_surf, 1);
3279  }
3280 
3281  return 0;
3282 }
3283 
3284 int ff_nvenc_receive_packet(AVCodecContext *avctx, AVPacket *pkt)
3285 {
3286  NvencSurface *tmp_out_surf;
3287  int res, res2;
3288 
3289  NvencContext *ctx = avctx->priv_data;
3290 
3291  AVFrame *frame = ctx->frame;
3292 
3293  if ((!ctx->cu_context && !ctx->d3d11_device) || !ctx->nvencoder)
3294  return AVERROR(EINVAL);
3295 
3296  if (!frame->buf[0]) {
3297  res = ff_encode_get_frame(avctx, frame);
3298  if (res < 0 && res != AVERROR_EOF)
3299  return res;
3300  }
3301 
3302  res = nvenc_send_frame(avctx, frame);
3303  if (res < 0) {
3304  if (res != AVERROR(EAGAIN))
3305  return res;
3306  } else
3307  av_frame_unref(frame);
3308 
3309  if (output_ready(avctx, avctx->internal->draining)) {
3310  av_fifo_read(ctx->output_surface_ready_queue, &tmp_out_surf, 1);
3311 
3312  res = nvenc_push_context(avctx);
3313  if (res < 0)
3314  return res;
3315 
3316  res = process_output_surface(avctx, pkt, tmp_out_surf);
3317 
3318  res2 = nvenc_pop_context(avctx);
3319  if (res2 < 0)
3320  return res2;
3321 
3322  if (res)
3323  return res;
3324 
3325  av_fifo_write(ctx->unused_surface_queue, &tmp_out_surf, 1);
3326  } else if (avctx->internal->draining) {
3327  return AVERROR_EOF;
3328  } else {
3329  return AVERROR(EAGAIN);
3330  }
3331 
3332  return 0;
3333 }
3334 
3335 av_cold void ff_nvenc_encode_flush(AVCodecContext *avctx)
3336 {
3337  NvencContext *ctx = avctx->priv_data;
3338 
3339  nvenc_send_frame(avctx, NULL);
3340  av_fifo_reset2(ctx->timestamp_list);
3341  ctx->output_frame_num = 0;
3342  ctx->initial_delay_time = 0;
3343 }
error
static void error(const char *err)
Definition: target_bsf_fuzzer.c:32
flags
const SwsFlags flags[]
Definition: swscale.c:72
NVENC_LOSSLESS
@ NVENC_LOSSLESS
Definition: nvenc.h:194
AVHWDeviceContext::hwctx
void * hwctx
The format-specific data, allocated and freed by libavutil along with this context.
Definition: hwcontext.h:88
ff_alloc_a53_sei
int ff_alloc_a53_sei(const AVFrame *frame, size_t prefix_len, void **data, size_t *sei_size)
Check AVFrame for A53 side data and allocate and fill SEI message with A53 info.
Definition: atsc_a53.c:26
AV_LOG_WARNING
#define AV_LOG_WARNING
Something somehow does not look correct.
Definition: log.h:216
PRESET_ALIAS
#define PRESET_ALIAS(alias, name,...)
Definition: nvenc.c:205
AV_PIX_FMT_CUDA
@ AV_PIX_FMT_CUDA
HW acceleration through CUDA.
Definition: pixfmt.h:260
AV3DReferenceDisplay::num_sample_shift
int16_t num_sample_shift
The recommended additional horizontal shift for a stereo pair corresponding to the n-th reference bas...
Definition: tdrdi.h:141
AVMasteringDisplayMetadata::max_luminance
AVRational max_luminance
Max luminance of mastering display (cd/m^2).
Definition: mastering_display_metadata.h:57
AVPixelFormat
AVPixelFormat
Pixel format.
Definition: pixfmt.h:71
name
it s the only field you need to keep assuming you have a context There is some magic you don t need to care about around this just let it vf default minimum maximum flags name is the option name
Definition: writing_filters.txt:88
GUIDTuple::guid
const GUID guid
Definition: nvenc.c:201
level
uint8_t level
Definition: svq3.c:208
av_clip
#define av_clip
Definition: common.h:100
AVERROR
Filter the word “frame” indicates either a video frame or a group of audio as stored in an AVFrame structure Format for each input and each output the list of supported formats For video that means pixel format For audio that means channel sample they are references to shared objects When the negotiation mechanism computes the intersection of the formats supported at each end of a all references to both lists are replaced with a reference to the intersection And when a single format is eventually chosen for a link amongst the remaining all references to the list are updated That means that if a filter requires that its input and output have the same format amongst a supported all it has to do is use a reference to the same list of formats query_formats can leave some formats unset and return AVERROR(EAGAIN) to cause the negotiation mechanism toagain later. That can be used by filters with complex requirements to use the format negotiated on one link to set the formats supported on another. Frame references ownership and permissions
AVCodecContext::colorspace
enum AVColorSpace colorspace
YUV colorspace type.
Definition: avcodec.h:667
NVENC_RGB_MODE_DISABLED
@ NVENC_RGB_MODE_DISABLED
Definition: nvenc.h:207
AVCodecContext::decoded_side_data
AVFrameSideData ** decoded_side_data
Array containing static side data, such as HDR10 CLL / MDCV structures.
Definition: avcodec.h:1936
av_frame_get_side_data
AVFrameSideData * av_frame_get_side_data(const AVFrame *frame, enum AVFrameSideDataType type)
Definition: frame.c:659
AV_PIX_FMT_BGR32
#define AV_PIX_FMT_BGR32
Definition: pixfmt.h:513
GUIDTuple
Definition: nvenc.c:200
GUIDTuple::flags
int flags
Definition: nvenc.c:202
av_pix_fmt_desc_get
const AVPixFmtDescriptor * av_pix_fmt_desc_get(enum AVPixelFormat pix_fmt)
Definition: pixdesc.c:3456
AVERROR_EOF
#define AVERROR_EOF
End of file.
Definition: error.h:57
AVBufferRef::data
uint8_t * data
The data buffer.
Definition: buffer.h:90
timecode_internal.h
AV_FRAME_DATA_A53_CC
@ AV_FRAME_DATA_A53_CC
ATSC A53 Part 4 Closed Captions.
Definition: frame.h:59
AV_PROFILE_H264_MAIN
#define AV_PROFILE_H264_MAIN
Definition: defs.h:112
nvenc_push_context
static int nvenc_push_context(AVCodecContext *avctx)
Definition: nvenc.c:394
AVMasteringDisplayMetadata::display_primaries
AVRational display_primaries[3][2]
CIE 1931 xy chromaticity coords of color primaries (r, g, b order).
Definition: mastering_display_metadata.h:42
AVHWFramesContext::format
enum AVPixelFormat format
The pixel format identifying the underlying HW surface type.
Definition: hwcontext.h:200
AVPictureType
AVPictureType
Definition: avutil.h:276
output_ready
static int output_ready(AVCodecContext *avctx, int flush)
Definition: nvenc.c:2823
NvencContext
Definition: nvenc.h:212
AV3DReferenceDisplaysInfo::prec_ref_viewing_dist
uint8_t prec_ref_viewing_dist
The exponent of the maximum allowable truncation error for {exponent,mantissa}_ref_viewing_distance a...
Definition: tdrdi.h:72
AVCodecContext::codec_descriptor
const struct AVCodecDescriptor * codec_descriptor
AVCodecDescriptor.
Definition: avcodec.h:1716
int64_t
long long int64_t
Definition: coverity.c:34
av_tdrdi_get_display
static av_always_inline AV3DReferenceDisplay * av_tdrdi_get_display(AV3DReferenceDisplaysInfo *tdrdi, unsigned int idx)
Definition: tdrdi.h:145
AV_PIX_FMT_YUV444P10MSB
#define AV_PIX_FMT_YUV444P10MSB
Definition: pixfmt.h:554
AV_FRAME_DATA_S12M_TIMECODE
@ AV_FRAME_DATA_S12M_TIMECODE
Timecode which conforms to SMPTE ST 12-1.
Definition: frame.h:152
AV_PROFILE_HEVC_MAIN
#define AV_PROFILE_HEVC_MAIN
Definition: defs.h:159
NvencSurface::in_ref
AVFrame * in_ref
Definition: nvenc.h:117
av_frame_free
void av_frame_free(AVFrame **frame)
Free the frame and any dynamically allocated objects in it, e.g.
Definition: frame.c:64
AVContentLightMetadata::MaxCLL
unsigned MaxCLL
Max content light level (cd/m^2).
Definition: mastering_display_metadata.h:111
nvenc_store_frame_data
static int nvenc_store_frame_data(AVCodecContext *avctx, NV_ENC_PIC_PARAMS *pic_params, const AVFrame *frame)
Definition: nvenc.c:2677
av_fifo_peek
int av_fifo_peek(const AVFifo *f, void *buf, size_t nb_elems, size_t offset)
Read data from a FIFO without modifying FIFO state.
Definition: fifo.c:255
AV3DReferenceDisplay
Data structure for single deference display information.
Definition: tdrdi.h:100
AVFrame
This structure describes decoded (raw) audio or video data.
Definition: frame.h:434
pixdesc.h
AVCodecContext::color_trc
enum AVColorTransferCharacteristic color_trc
Color Transfer Characteristic.
Definition: avcodec.h:660
nvenc_set_timestamp
static int nvenc_set_timestamp(AVCodecContext *avctx, NV_ENC_LOCK_BITSTREAM *params, AVPacket *pkt)
Definition: nvenc.c:2620
AVCOL_RANGE_JPEG
@ AVCOL_RANGE_JPEG
Full range content.
Definition: pixfmt.h:777
internal.h
AVPacket::data
uint8_t * data
Definition: packet.h:595
encode.h
AVCodecContext::b_quant_offset
float b_quant_offset
qscale offset between IP and B-frames
Definition: avcodec.h:793
NvencFrameData
Definition: nvenc.h:127
reconfig_encoder
static void reconfig_encoder(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2947
AV_LOG_VERBOSE
#define AV_LOG_VERBOSE
Detailed information.
Definition: log.h:226
AVCOL_SPC_RGB
@ AVCOL_SPC_RGB
order of coefficients is actually GBR, also IEC 61966-2-1 (sRGB), YZX and ST 428-1
Definition: pixfmt.h:701
timestamp_queue_peek
static int64_t timestamp_queue_peek(AVFifo *queue, size_t index)
Definition: nvenc.c:2612
ff_nvenc_pix_fmts
enum AVPixelFormat ff_nvenc_pix_fmts[]
Definition: nvenc.c:59
set_constqp
static av_cold void set_constqp(AVCodecContext *avctx)
Definition: nvenc.c:885
NvencSurface
Definition: nvenc.h:114
AVPacket::duration
int64_t duration
Duration of this packet in AVStream->time_base units, 0 if unknown.
Definition: packet.h:613
mathematics.h
FFMAX
#define FFMAX(a, b)
Definition: macros.h:47
av_buffer_ref
AVBufferRef * av_buffer_ref(const AVBufferRef *buf)
Create a new reference to an AVBuffer.
Definition: buffer.c:103
nvenc_print_error
static int nvenc_print_error(AVCodecContext *avctx, NVENCSTATUS err, const char *error_string)
Definition: nvenc.c:180
BD
#define BD
AVERROR_UNKNOWN
#define AVERROR_UNKNOWN
Unknown error, typically from an external library.
Definition: error.h:73
AVCodecContext::qmax
int qmax
maximum quantizer
Definition: avcodec.h:1253
nverr
NVENCSTATUS nverr
Definition: nvenc.c:133
NONE
#define NONE
Definition: vf_drawvg.c:261
set_lossless
static av_cold void set_lossless(AVCodecContext *avctx)
Definition: nvenc.c:1000
PRESET
#define PRESET(name,...)
Definition: nvenc.c:208
AV_PKT_FLAG_KEY
#define AV_PKT_FLAG_KEY
The packet contains a keyframe.
Definition: packet.h:650
dummy
static int dummy
Definition: ffplay.c:3751
ff_nvenc_encode_flush
av_cold void ff_nvenc_encode_flush(AVCodecContext *avctx)
Definition: nvenc.c:3335
AV_STEREO3D_UNSPEC
@ AV_STEREO3D_UNSPEC
Video is stereoscopic but the packing is unspecified.
Definition: stereo3d.h:143
AV_CODEC_FLAG_GLOBAL_HEADER
#define AV_CODEC_FLAG_GLOBAL_HEADER
Place global headers in extradata instead of every keyframe.
Definition: avcodec.h:318
ff_timecode_set_smpte
void ff_timecode_set_smpte(unsigned *drop, unsigned *hh, unsigned *mm, unsigned *ss, unsigned *ff, AVRational rate, uint32_t tcsmpte, int prevent_df, int skip_field)
Convert SMPTE 12M binary representation to sei info.
Definition: timecode_internal.c:33
nvenc.h
AV_FRAME_FLAG_TOP_FIELD_FIRST
#define AV_FRAME_FLAG_TOP_FIELD_FIRST
A flag to mark frames where the top field is displayed first if the content is interlaced.
Definition: frame.h:662
av_memdup
void * av_memdup(const void *p, size_t size)
Duplicate a buffer with av_malloc().
Definition: mem.c:304
AV_HWDEVICE_TYPE_CUDA
@ AV_HWDEVICE_TYPE_CUDA
Definition: hwcontext.h:30
AVContentLightMetadata
Content light level needed by to transmit HDR over HDMI (CTA-861.3).
Definition: mastering_display_metadata.h:107
compute_dar
static void compute_dar(AVCodecContext *avctx, int *dw, int *dh)
Definition: nvenc.c:1789
AV3DReferenceDisplaysInfo
This structure describes information about the reference display width(s) and reference viewing dista...
Definition: tdrdi.h:53
AVCodecContext::framerate
AVRational framerate
Definition: avcodec.h:559
AVCOL_SPC_BT470BG
@ AVCOL_SPC_BT470BG
also ITU-R BT601-6 625 / ITU-R BT1358 625 / ITU-R BT1700 625 PAL & SECAM / IEC 61966-2-4 xvYCC601
Definition: pixfmt.h:706
nvenc_upload_frame
static int nvenc_upload_frame(AVCodecContext *avctx, const AVFrame *frame, NvencSurface *nvenc_frame)
Definition: nvenc.c:2440
NVENC_TWO_PASSES
@ NVENC_TWO_PASSES
Definition: nvenc.h:196
NvencDynLoadFunctions::nvenc_device_count
int nvenc_device_count
Definition: nvenc.h:141
AV_CODEC_FLAG_COPY_OPAQUE
#define AV_CODEC_FLAG_COPY_OPAQUE
Definition: avcodec.h:279
AVCodecContext::i_quant_factor
float i_quant_factor
qscale factor between P- and I-frames If > 0 then the last P-frame quantizer will be used (q = lastp_...
Definition: avcodec.h:802
set_vbr
static av_cold void set_vbr(AVCodecContext *avctx)
Definition: nvenc.c:923
nvenc_map_error
static int nvenc_map_error(NVENCSTATUS err, const char **desc)
Definition: nvenc.c:165
AVCodecContext::codec
const struct AVCodec * codec
Definition: avcodec.h:448
AVPacket::opaque_ref
AVBufferRef * opaque_ref
AVBufferRef for free use by the API user.
Definition: packet.h:631
nvenc_check_cap
static int nvenc_check_cap(AVCodecContext *avctx, NV_ENC_CAPS cap)
Definition: nvenc.c:479
presets
static const Preset presets[]
Definition: vf_pseudocolor.c:286
fail
#define fail()
Definition: checkasm.h:224
av_fifo_write
int av_fifo_write(AVFifo *f, const void *buf, size_t nb_elems)
Write data into a FIFO.
Definition: fifo.c:188
AV_STEREO3D_2D
@ AV_STEREO3D_2D
Video is not stereoscopic (and metadata has to be there).
Definition: stereo3d.h:52
NVENC_LOWLATENCY
@ NVENC_LOWLATENCY
Definition: nvenc.h:193
NvencSurface::format
NV_ENC_BUFFER_FORMAT format
Definition: nvenc.h:124
nvenc_setup_rate_control
static av_cold int nvenc_setup_rate_control(AVCodecContext *avctx)
Definition: nvenc.c:1092
sei.h
AVCodecContext::refs
int refs
number of reference frames
Definition: avcodec.h:697
AV_HWDEVICE_TYPE_D3D11VA
@ AV_HWDEVICE_TYPE_D3D11VA
Definition: hwcontext.h:35
nvenc_map_preset
static void nvenc_map_preset(NvencContext *ctx)
Definition: nvenc.c:210
AVCodecContext::flags
int flags
AV_CODEC_FLAG_*.
Definition: avcodec.h:496
val
static double val(void *priv, double ch)
Definition: aeval.c:77
nvenc_copy_frame
static int nvenc_copy_frame(AVCodecContext *avctx, NvencSurface *nv_surface, NV_ENC_LOCK_INPUT_BUFFER *lock_buffer_params, const AVFrame *frame)
Definition: nvenc.c:2322
AVERROR_BUFFER_TOO_SMALL
#define AVERROR_BUFFER_TOO_SMALL
Buffer too small.
Definition: error.h:53
hwcontext_cuda.h
av_image_fill_pointers
int av_image_fill_pointers(uint8_t *data[4], enum AVPixelFormat pix_fmt, int height, uint8_t *ptr, const int linesizes[4])
Fill plane data pointers for an image with pixel format pix_fmt and height height.
Definition: imgutils.c:145
ss
#define ss(width, name, subs,...)
Definition: cbs_vp9.c:202
IS_GBRP
#define IS_GBRP(pix_fmt)
Definition: nvenc.c:128
ff_encode_add_stats_side_data
int ff_encode_add_stats_side_data(AVPacket *pkt, int quality, const int64_t error[], int error_count, enum AVPictureType pict_type)
Definition: encode.c:919
AVCUDADeviceContext::cuda_ctx
CUcontext cuda_ctx
Definition: hwcontext_cuda.h:43
av_reduce
int av_reduce(int *dst_num, int *dst_den, int64_t num, int64_t den, int64_t max)
Reduce a fraction.
Definition: rational.c:35
nvenc_print_driver_requirement
static void nvenc_print_driver_requirement(AVCodecContext *avctx, int level)
Definition: nvenc.c:264
AVRational::num
int num
Numerator.
Definition: rational.h:59
AV_CODEC_FLAG_INTERLACED_DCT
#define AV_CODEC_FLAG_INTERLACED_DCT
Use interlaced DCT.
Definition: avcodec.h:310
nvenc_check_capabilities
static int nvenc_check_capabilities(AVCodecContext *avctx)
Definition: nvenc.c:496
AVHWDeviceContext
This struct aggregates all the (hardware/vendor-specific) "high-level" state, i.e.
Definition: hwcontext.h:63
av_frame_alloc
AVFrame * av_frame_alloc(void)
Allocate an AVFrame and set its fields to default values.
Definition: frame.c:52
AVCodecContext::color_primaries
enum AVColorPrimaries color_primaries
Chromaticity coordinates of the source primaries.
Definition: avcodec.h:653
AV_STEREO3D_FRAMESEQUENCE
@ AV_STEREO3D_FRAMESEQUENCE
Views are alternated temporally.
Definition: stereo3d.h:89
AV_LOG_ERROR
#define AV_LOG_ERROR
Something went wrong and cannot losslessly be recovered.
Definition: log.h:210
AVFrameSideData::size
size_t size
Definition: frame.h:292
FF_ARRAY_ELEMS
#define FF_ARRAY_ELEMS(a)
Definition: sinewin_tablegen.c:29
av_cold
#define av_cold
Definition: attributes.h:111
to_nv_color_pri
#define to_nv_color_pri(n)
Definition: nvenc.c:346
av_fifo_read
int av_fifo_read(AVFifo *f, void *buf, size_t nb_elems)
Read data from a FIFO.
Definition: fifo.c:240
P2
#define P2
Definition: cavsdsp.c:36
AV_PIX_FMT_YUVJ422P
@ AV_PIX_FMT_YUVJ422P
planar YUV 4:2:2, 16bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV422P and setting col...
Definition: pixfmt.h:86
AVCodecContext::extradata_size
int extradata_size
Definition: avcodec.h:523
AVCodecContext::has_b_frames
int has_b_frames
Size of the frame reordering buffer in the decoder.
Definition: avcodec.h:705
ff_nvenc_encode_init
av_cold int ff_nvenc_encode_init(AVCodecContext *avctx)
Definition: nvenc.c:2259
av_fast_realloc
void * av_fast_realloc(void *ptr, unsigned int *size, size_t min_size)
Reallocate the given buffer if it is not large enough, otherwise do nothing.
Definition: mem.c:497
stereo3d.h
AVMasteringDisplayMetadata::white_point
AVRational white_point[2]
CIE 1931 xy chromaticity coords of white point.
Definition: mastering_display_metadata.h:47
AVCodecContext::global_quality
int global_quality
Global quality for codecs which cannot change it per frame.
Definition: avcodec.h:1229
AVD3D11VADeviceContext::device
ID3D11Device * device
Device used for texture creation and access.
Definition: hwcontext_d3d11va.h:56
AV_PIX_FMT_YUV444P16
#define AV_PIX_FMT_YUV444P16
Definition: pixfmt.h:552
AVFormatContext::flags
int flags
Flags modifying the (de)muxer behaviour.
Definition: avformat.h:1414
AVCodecContext::nb_decoded_side_data
int nb_decoded_side_data
Definition: avcodec.h:1937
AV_PIX_FMT_0BGR32
#define AV_PIX_FMT_0BGR32
Definition: pixfmt.h:516
pix_fmt
static enum AVPixelFormat pix_fmt
Definition: demux_decode.c:41
NvencDynLoadFunctions
Definition: nvenc.h:135
AV_PROFILE_H264_HIGH_10
#define AV_PROFILE_H264_HIGH_10
Definition: defs.h:115
NV_ENC_H264_PROFILE_HIGH
@ NV_ENC_H264_PROFILE_HIGH
Definition: nvenc.h:171
ctx
static AVFormatContext * ctx
Definition: movenc.c:49
SEI_TYPE_USER_DATA_REGISTERED_ITU_T_T35
@ SEI_TYPE_USER_DATA_REGISTERED_ITU_T_T35
Definition: sei.h:34
av_rescale_q
int64_t av_rescale_q(int64_t a, AVRational bq, AVRational cq)
Rescale a 64-bit integer by 2 rational numbers.
Definition: mathematics.c:142
AV_FRAME_DATA_3D_REFERENCE_DISPLAYS
@ AV_FRAME_DATA_3D_REFERENCE_DISPLAYS
This side data contains information about the reference display width(s) and reference viewing distan...
Definition: frame.h:256
nvenc_setup_extradata
static av_cold int nvenc_setup_extradata(AVCodecContext *avctx)
Definition: nvenc.c:2140
timestamp_queue_enqueue
static void timestamp_queue_enqueue(AVFifo *queue, int64_t timestamp)
Definition: nvenc.c:2598
P1
#define P1
Definition: cavsdsp.c:37
AV_PIX_FMT_YUV420P
@ AV_PIX_FMT_YUV420P
planar YUV 4:2:0, 12bpp, (1 Cr & Cb sample per 2x2 Y samples)
Definition: pixfmt.h:73
AVCodecContext::rc_max_rate
int64_t rc_max_rate
maximum bitrate
Definition: avcodec.h:1282
timestamp_queue_dequeue
static int64_t timestamp_queue_dequeue(AVFifo *queue)
Definition: nvenc.c:2603
av_mallocz
#define av_mallocz(s)
Definition: tableprint_vlc.h:31
AVPacket::opaque
void * opaque
for some private data of the user
Definition: packet.h:620
NvencDynLoadFunctions::nvenc_dl
NvencFunctions * nvenc_dl
Definition: nvenc.h:138
AVCPBProperties
This structure describes the bitrate properties of an encoded bitstream.
Definition: defs.h:282
AV_CODEC_ID_H264
@ AV_CODEC_ID_H264
Definition: codec_id.h:79
LIST_DEVICES
@ LIST_DEVICES
Definition: nvenc.h:202
NvencSurface::pitch
int pitch
Definition: nvenc.h:121
tmp
static uint8_t tmp[40]
Definition: aes_ctr.c:52
AV_PIX_FMT_YUVJ444P
@ AV_PIX_FMT_YUVJ444P
planar YUV 4:4:4, 24bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV444P and setting col...
Definition: pixfmt.h:87
AV_PROFILE_H264_HIGH_422
#define AV_PROFILE_H264_HIGH_422
Definition: defs.h:118
AVCodecContext::codec_id
enum AVCodecID codec_id
Definition: avcodec.h:449
NvencSurface::input_surface
NV_ENC_INPUT_PTR input_surface
Definition: nvenc.h:116
AVCodecDescriptor::props
int props
Codec properties, a combination of AV_CODEC_PROP_* flags.
Definition: codec_desc.h:54
if
if(ret)
Definition: filter_design.txt:179
AVCodecContext::rc_buffer_size
int rc_buffer_size
decoder bitstream buffer size
Definition: avcodec.h:1267
NVENC_CAP
#define NVENC_CAP
Definition: nvenc.c:49
AV_PIX_FMT_GBRP16
#define AV_PIX_FMT_GBRP16
Definition: pixfmt.h:561
IS_10BIT
#define IS_10BIT(pix_fmt)
Definition: nvenc.c:98
AV3DReferenceDisplaysInfo::ref_viewing_distance_flag
uint8_t ref_viewing_distance_flag
A flag to indicate the presence of reference viewing distance.
Definition: tdrdi.h:65
fabs
static __device__ float fabs(float a)
Definition: cuda_runtime.h:182
NULL
#define NULL
Definition: coverity.c:32
AVHWFramesContext::sw_format
enum AVPixelFormat sw_format
The pixel format identifying the actual data layout of the hardware frames.
Definition: hwcontext.h:213
IS_YUV422
#define IS_YUV422(pix_fmt)
Definition: nvenc.c:124
NvencSurface::reg_idx
int reg_idx
Definition: nvenc.h:118
AVCodecContext::color_range
enum AVColorRange color_range
MPEG vs JPEG YUV range.
Definition: avcodec.h:677
av_buffer_unref
void av_buffer_unref(AVBufferRef **buf)
Free a given reference and automatically free the buffer if there are no more references to it.
Definition: buffer.c:139
SEI_TYPE_TIME_CODE
@ SEI_TYPE_TIME_CODE
Definition: sei.h:95
AV_CODEC_ID_AV1
@ AV_CODEC_ID_AV1
Definition: codec_id.h:284
AVRational
Rational number (pair of numerator and denominator).
Definition: rational.h:58
NVENC_ONE_PASS
@ NVENC_ONE_PASS
Definition: nvenc.h:195
AVCodecContext::internal
struct AVCodecInternal * internal
Private context used for internal data.
Definition: avcodec.h:474
AV_PIX_FMT_YUVJ420P
@ AV_PIX_FMT_YUVJ420P
planar YUV 4:2:0, 12bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV420P and setting col...
Definition: pixfmt.h:85
AVCodecContext::bit_rate
int64_t bit_rate
the average bitrate
Definition: avcodec.h:489
ff_nvenc_encode_close
av_cold int ff_nvenc_encode_close(AVCodecContext *avctx)
Definition: nvenc.c:2174
FrameData::duration
int64_t duration
Definition: librav1e.c:60
AV_PICTURE_TYPE_I
@ AV_PICTURE_TYPE_I
Intra.
Definition: avutil.h:278
AV3DReferenceDisplay::exponent_ref_display_width
uint8_t exponent_ref_display_width
The exponent part of the reference display width of the n-th reference display.
Definition: tdrdi.h:114
P3
#define P3
Definition: dsp_template.c:820
av_fifo_can_read
size_t av_fifo_can_read(const AVFifo *f)
Definition: fifo.c:87
flush
void(* flush)(AVBSFContext *ctx)
Definition: dts2pts.c:552
FrameData::frame_opaque
void * frame_opaque
Definition: librav1e.c:62
NvencDynLoadFunctions::cuda_dl
CudaFunctions * cuda_dl
Definition: nvenc.h:137
AV_FRAME_DATA_MASTERING_DISPLAY_METADATA
@ AV_FRAME_DATA_MASTERING_DISPLAY_METADATA
Mastering display metadata associated with a video frame.
Definition: frame.h:120
nvenc_setup_h264_config
static av_cold int nvenc_setup_h264_config(AVCodecContext *avctx)
Definition: nvenc.c:1271
AV3DReferenceDisplaysInfo::prec_ref_display_width
uint8_t prec_ref_display_width
The exponent of the maximum allowable truncation error for {exponent,mantissa}_ref_display_width as g...
Definition: tdrdi.h:58
ANY_DEVICE
@ ANY_DEVICE
Definition: nvenc.h:203
AVPixFmtDescriptor::flags
uint64_t flags
Combination of AV_PIX_FMT_FLAG_...
Definition: pixdesc.h:94
AV_PROFILE_HEVC_MAIN_10
#define AV_PROFILE_HEVC_MAIN_10
Definition: defs.h:160
AV_PROFILE_HEVC_REXT
#define AV_PROFILE_HEVC_REXT
Definition: defs.h:162
index
int index
Definition: gxfenc.c:90
AV_FRAME_DATA_SEI_UNREGISTERED
@ AV_FRAME_DATA_SEI_UNREGISTERED
User data unregistered metadata associated with a video frame.
Definition: frame.h:178
AVCodecContext::time_base
AVRational time_base
This is the fundamental unit of time (in seconds) in terms of which frame timestamps are represented.
Definition: avcodec.h:543
av_fifo_reset2
void av_fifo_reset2(AVFifo *f)
Definition: fifo.c:280
AV_PIX_FMT_X2BGR10
#define AV_PIX_FMT_X2BGR10
Definition: pixfmt.h:614
AVCUDADeviceContext::stream
CUstream stream
Definition: hwcontext_cuda.h:44
desc
const char * desc
Definition: nvenc.c:135
nvenc_pop_context
static int nvenc_pop_context(AVCodecContext *avctx)
Definition: nvenc.c:405
HW_CONFIG_ENCODER_DEVICE
#define HW_CONFIG_ENCODER_DEVICE(format, device_type_)
Definition: hwconfig.h:95
AVFifo
Definition: fifo.c:35
AVCodecContext::gop_size
int gop_size
the number of pictures in a group of pictures, or 0 for intra_only
Definition: avcodec.h:1017
height
#define height
Definition: dsp.h:89
av_frame_ref
int av_frame_ref(AVFrame *dst, const AVFrame *src)
Set up a new reference to the data described by the source frame.
Definition: frame.c:278
nvenc_check_codec_support
static int nvenc_check_codec_support(AVCodecContext *avctx)
Definition: nvenc.c:443
AV_PIX_FMT_FLAG_RGB
#define AV_PIX_FMT_FLAG_RGB
The pixel format contains RGB-like data (as opposed to YUV/grayscale).
Definition: pixdesc.h:136
AV_CODEC_PROP_REORDER
#define AV_CODEC_PROP_REORDER
Codec supports frame reordering.
Definition: codec_desc.h:92
ff_nvenc_hw_configs
const AVCodecHWConfigInternal *const ff_nvenc_hw_configs[]
Definition: nvenc.c:88
i
#define i(width, name, range_min, range_max)
Definition: cbs_h264.c:63
MAX_REGISTERED_FRAMES
#define MAX_REGISTERED_FRAMES
Definition: nvenc.h:41
ff_alloc_timecode_sei
int ff_alloc_timecode_sei(const AVFrame *frame, AVRational rate, size_t prefix_len, void **data, size_t *sei_size)
Check AVFrame for S12M timecode side data and allocate and fill TC SEI message with timecode info.
Definition: utils.c:982
P6
#define P6
Definition: filter_template.c:407
for
for(k=2;k<=8;++k)
Definition: h264pred_template.c:424
nvenc_alloc_surface
static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
Definition: nvenc.c:2038
AV_NOPTS_VALUE
#define AV_NOPTS_VALUE
Undefined timestamp value.
Definition: avutil.h:247
AVFrameSideData::data
uint8_t * data
Definition: frame.h:291
nvenc_check_device
static av_cold int nvenc_check_device(AVCodecContext *avctx, int idx)
Definition: nvenc.c:694
nvenc_register_frame
static int nvenc_register_frame(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2386
AVCodecHWConfigInternal
Definition: hwconfig.h:25
frame_data
FrameData * frame_data(AVFrame *frame)
Get our axiliary frame data attached to the frame, allocating it if needed.
Definition: ffmpeg.c:477
AV_PIX_FMT_NV16
@ AV_PIX_FMT_NV16
interleaved chroma YUV 4:2:2, 16bpp, (1 Cr & Cb sample per 2x1 Y samples)
Definition: pixfmt.h:198
ff_nvenc_receive_packet
int ff_nvenc_receive_packet(AVCodecContext *avctx, AVPacket *pkt)
Definition: nvenc.c:3284
AVPacket::dts
int64_t dts
Decompression timestamp in AVStream->time_base units; the time at which the packet is decompressed.
Definition: packet.h:594
AV_PIX_FMT_RGB32
#define AV_PIX_FMT_RGB32
Definition: pixfmt.h:511
nvenc_override_rate_control
static void nvenc_override_rate_control(AVCodecContext *avctx)
Definition: nvenc.c:1014
AVERROR_EXTERNAL
#define AVERROR_EXTERNAL
Generic error in an external library.
Definition: error.h:59
AVPacket::flags
int flags
A combination of AV_PKT_FLAG values.
Definition: packet.h:601
AV_PIX_FMT_D3D11
@ AV_PIX_FMT_D3D11
Hardware surfaces for Direct3D11.
Definition: pixfmt.h:336
AV_PIX_FMT_P216
#define AV_PIX_FMT_P216
Definition: pixfmt.h:620
FrameData::frame_opaque_ref
AVBufferRef * frame_opaque_ref
Definition: librav1e.c:63
xf
#define xf(width, name, var, range_min, range_max, subs,...)
Definition: cbs_av1.c:622
AVCPBProperties::avg_bitrate
int64_t avg_bitrate
Average bitrate of the stream, in bits per second.
Definition: defs.h:297
AV_PIX_FMT_P210
#define AV_PIX_FMT_P210
Definition: pixfmt.h:616
NV_ENC_H264_PROFILE_BASELINE
@ NV_ENC_H264_PROFILE_BASELINE
Definition: nvenc.h:169
get_free_frame
static NvencSurface * get_free_frame(NvencContext *ctx)
Definition: nvenc.c:2311
NV_ENC_HEVC_PROFILE_MAIN
@ NV_ENC_HEVC_PROFILE_MAIN
Definition: nvenc.h:182
AV_LOG_INFO
#define AV_LOG_INFO
Standard information.
Definition: log.h:221
AVCodecContext::b_quant_factor
float b_quant_factor
qscale factor between IP and B-frames If > 0 then the last P-frame quantizer will be used (q= lastp_q...
Definition: avcodec.h:786
AV_FRAME_DATA_VIEW_ID
@ AV_FRAME_DATA_VIEW_ID
This side data must be associated with a video frame.
Definition: frame.h:245
AVCodec::id
enum AVCodecID id
Definition: codec.h:186
nvenc_open_session
static av_cold int nvenc_open_session(AVCodecContext *avctx)
Definition: nvenc.c:417
HW_CONFIG_ENCODER_FRAMES
#define HW_CONFIG_ENCODER_FRAMES(format, device_type_)
Definition: hwconfig.h:98
AV_FRAME_DATA_CONTENT_LIGHT_LEVEL
@ AV_FRAME_DATA_CONTENT_LIGHT_LEVEL
Content light level (based on CTA-861.3).
Definition: frame.h:137
AV3DReferenceDisplay::right_view_id
uint16_t right_view_id
The ViewId of the left view of a stereo pair corresponding to the n-th reference display.
Definition: tdrdi.h:109
av_malloc
#define av_malloc(s)
Definition: ops_asmgen.c:44
AVPacket::pts
int64_t pts
Presentation timestamp in AVStream->time_base units; the time at which the decompressed packet will b...
Definition: packet.h:588
FAST
@ FAST
Definition: vf_guided.c:32
AVCodecContext::extradata
uint8_t * extradata
Out-of-band global headers that may be used by some codecs.
Definition: avcodec.h:522
process_output_surface
static int process_output_surface(AVCodecContext *avctx, AVPacket *pkt, NvencSurface *tmpoutsurf)
Definition: nvenc.c:2724
nvenc_load_libraries
static av_cold int nvenc_load_libraries(AVCodecContext *avctx)
Definition: nvenc.c:350
nvenc_recalc_surfaces
static av_cold int nvenc_recalc_surfaces(AVCodecContext *avctx)
Definition: nvenc.c:1049
AVD3D11VADeviceContext
This struct is allocated as AVHWDeviceContext.hwctx.
Definition: hwcontext_d3d11va.h:45
IS_RGB
#define IS_RGB(pix_fmt)
Definition: nvenc.c:109
AVCPBProperties::max_bitrate
int64_t max_bitrate
Maximum bitrate of the stream, in bits per second.
Definition: defs.h:287
AV_CODEC_ID_HEVC
@ AV_CODEC_ID_HEVC
Definition: codec_id.h:228
nvenc_errors
static const struct @226 nvenc_errors[]
prepare_sei_data_array
static int prepare_sei_data_array(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2835
AV_FRAME_DATA_STEREO3D
@ AV_FRAME_DATA_STEREO3D
Stereoscopic 3d metadata.
Definition: frame.h:64
AV1_METADATA_TYPE_TIMECODE
@ AV1_METADATA_TYPE_TIMECODE
Definition: av1.h:48
FFMIN
#define FFMIN(a, b)
Definition: macros.h:49
av_frame_unref
void av_frame_unref(AVFrame *frame)
Unreference all the buffers referenced by frame and reset the frame fields.
Definition: frame.c:496
AV_PIX_FMT_X2RGB10
#define AV_PIX_FMT_X2RGB10
Definition: pixfmt.h:613
AV3DReferenceDisplay::mantissa_ref_display_width
uint8_t mantissa_ref_display_width
The mantissa part of the reference display width of the n-th reference display.
Definition: tdrdi.h:119
AVCodecContext::hw_device_ctx
AVBufferRef * hw_device_ctx
A reference to the AVHWDeviceContext describing the device which will be used by a hardware encoder/d...
Definition: avcodec.h:1487
AVMasteringDisplayMetadata
Mastering display metadata capable of representing the color volume of the display used to master the...
Definition: mastering_display_metadata.h:38
IS_YUV444
#define IS_YUV444(pix_fmt)
Definition: nvenc.c:116
IS_CBR
#define IS_CBR(rc)
Definition: nvenc.c:52
av_rescale
int64_t av_rescale(int64_t a, int64_t b, int64_t c)
Rescale a 64-bit integer with rounding to nearest.
Definition: mathematics.c:129
AVCodecContext::height
int height
Definition: avcodec.h:600
AVCodecContext::pix_fmt
enum AVPixelFormat pix_fmt
Pixel format, see AV_PIX_FMT_xxx.
Definition: avcodec.h:639
CHECK_CU
#define CHECK_CU(x)
Definition: nvenc.c:47
nvenc_map_buffer_format
static NV_ENC_BUFFER_FORMAT nvenc_map_buffer_format(enum AVPixelFormat pix_fmt)
Definition: nvenc.c:1998
av_calloc
void * av_calloc(size_t nmemb, size_t size)
Definition: mem.c:264
AV_PIX_FMT_P016
#define AV_PIX_FMT_P016
Definition: pixfmt.h:604
AVCodecContext::hw_frames_ctx
AVBufferRef * hw_frames_ctx
A reference to the AVHWFramesContext describing the input (for encoding) or output (decoding) frames.
Definition: avcodec.h:1465
NvencSurface::width
int width
Definition: nvenc.h:119
AVHWFramesContext
This struct describes a set or pool of "hardware" frames (i.e.
Definition: hwcontext.h:118
AVCUDADeviceContext
This struct is allocated as AVHWDeviceContext.hwctx.
Definition: hwcontext_cuda.h:42
AV_PROFILE_H264_HIGH_444_PREDICTIVE
#define AV_PROFILE_H264_HIGH_444_PREDICTIVE
Definition: defs.h:122
ret
ret
Definition: filter_design.txt:187
AV_LOG_FATAL
#define AV_LOG_FATAL
Something went wrong and recovery is not possible.
Definition: log.h:204
AVHWDeviceContext::type
enum AVHWDeviceType type
This field identifies the underlying API used for hardware access.
Definition: hwcontext.h:75
nvenc_setup_encoder
static av_cold int nvenc_setup_encoder(AVCodecContext *avctx)
Definition: nvenc.c:1822
AV_PIX_FMT_NV12
@ AV_PIX_FMT_NV12
planar YUV 4:2:0, 12bpp, 1 plane for Y and 1 plane for the UV components, which are interleaved (firs...
Definition: pixfmt.h:96
FFSWAP
#define FFSWAP(type, a, b)
Definition: macros.h:52
frame
these buffered frames must be flushed immediately if a new input produces new the filter must not call request_frame to get more It must just process the frame or queue it The task of requesting more frames is left to the filter s request_frame method or the application If a filter has several the filter must be ready for frames arriving randomly on any input any filter with several inputs will most likely require some kind of queuing mechanism It is perfectly acceptable to have a limited queue and to drop frames when the inputs are too unbalanced request_frame For filters that do not use the this method is called when a frame is wanted on an output For a it should directly call filter_frame on the corresponding output For a if there are queued frames already one of these frames should be pushed If the filter should request a frame on one of its repeatedly until at least one frame has been pushed Return or at least make progress towards producing a frame
Definition: filter_design.txt:265
averr
int averr
Definition: nvenc.c:134
AV_PIX_FMT_0RGB32
#define AV_PIX_FMT_0RGB32
Definition: pixfmt.h:515
AVHWFramesContext::device_ctx
AVHWDeviceContext * device_ctx
The parent AVHWDeviceContext.
Definition: hwcontext.h:137
AVCPBProperties::buffer_size
int64_t buffer_size
The size of the buffer to which the ratecontrol is applied, in bits.
Definition: defs.h:303
cuda_check.h
atsc_a53.h
AVStereo3D::type
enum AVStereo3DType type
How views are packed within the video.
Definition: stereo3d.h:207
AV_PROFILE_H264_BASELINE
#define AV_PROFILE_H264_BASELINE
Definition: defs.h:110
AV3DReferenceDisplay::mantissa_ref_viewing_distance
uint8_t mantissa_ref_viewing_distance
The mantissa part of the reference viewing distance of the n-th reference display.
Definition: tdrdi.h:129
av_fifo_alloc2
AVFifo * av_fifo_alloc2(size_t nb_elems, size_t elem_size, unsigned int flags)
Allocate and initialize an AVFifo with a given element size.
Definition: fifo.c:47
AV_INPUT_BUFFER_PADDING_SIZE
#define AV_INPUT_BUFFER_PADDING_SIZE
Definition: defs.h:40
AVCodecContext
main external API structure.
Definition: avcodec.h:439
AV_PROFILE_H264_HIGH
#define AV_PROFILE_H264_HIGH
Definition: defs.h:114
AV1_METADATA_TYPE_ITUT_T35
@ AV1_METADATA_TYPE_ITUT_T35
Definition: av1.h:47
AV_PICTURE_TYPE_B
@ AV_PICTURE_TYPE_B
Bi-dir predicted.
Definition: avutil.h:280
ff_get_encode_buffer
int ff_get_encode_buffer(AVCodecContext *avctx, AVPacket *avpkt, int64_t size, int flags)
Get a buffer for a packet.
Definition: encode.c:105
NvencSurface::height
int height
Definition: nvenc.h:120
SEI_TYPE_USER_DATA_UNREGISTERED
@ SEI_TYPE_USER_DATA_UNREGISTERED
Definition: sei.h:35
av_image_copy2
static void av_image_copy2(uint8_t *const dst_data[4], const int dst_linesizes[4], uint8_t *const src_data[4], const int src_linesizes[4], enum AVPixelFormat pix_fmt, int width, int height)
Wrapper around av_image_copy() to workaround the limitation that the conversion from uint8_t * const ...
Definition: imgutils.h:184
AVCodecContext::qmin
int qmin
minimum quantizer
Definition: avcodec.h:1246
AVRational::den
int den
Denominator.
Definition: rational.h:60
AV_PIX_FMT_NONE
@ AV_PIX_FMT_NONE
Definition: pixfmt.h:72
AVCodecContext::profile
int profile
profile
Definition: avcodec.h:1630
nvenc_setup_surfaces
static av_cold int nvenc_setup_surfaces(AVCodecContext *avctx)
Definition: nvenc.c:2094
AV3DReferenceDisplay::additional_shift_present_flag
uint8_t additional_shift_present_flag
An array of flags to indicates that the information about additional horizontal shift of the left and...
Definition: tdrdi.h:135
AVCodecContext::i_quant_offset
float i_quant_offset
qscale offset between P and I-frames
Definition: avcodec.h:809
AVFrameSideData::type
enum AVFrameSideDataType type
Definition: frame.h:290
NvencSurface::output_surface
NV_ENC_OUTPUT_PTR output_surface
Definition: nvenc.h:123
AV_PROFILE_HEVC_MULTIVIEW_MAIN
#define AV_PROFILE_HEVC_MULTIVIEW_MAIN
Definition: defs.h:163
nvenc_find_free_reg_resource
static int nvenc_find_free_reg_resource(AVCodecContext *avctx)
Definition: nvenc.c:2352
nvenc_codec_specific_pic_params
static void nvenc_codec_specific_pic_params(AVCodecContext *avctx, const AVFrame *frame, NV_ENC_PIC_PARAMS *params, NV_ENC_SEI_PAYLOAD *sei_data, int sei_count)
Definition: nvenc.c:2547
AVMasteringDisplayMetadata::min_luminance
AVRational min_luminance
Min luminance of mastering display (cd/m^2).
Definition: mastering_display_metadata.h:52
AV_PIX_FMT_YUV444P
@ AV_PIX_FMT_YUV444P
planar YUV 4:4:4, 24bpp, (1 Cr & Cb sample per 1x1 Y samples)
Definition: pixfmt.h:78
P7
#define P7
Definition: filter_template.c:406
AV_PIX_FMT_P010
#define AV_PIX_FMT_P010
Definition: pixfmt.h:602
AVCodecInternal::draining
int draining
decoding: AVERROR_EOF has been returned from ff_decode_get_packet(); must not be used by decoders tha...
Definition: internal.h:139
AV_PIX_FMT_GBRP
@ AV_PIX_FMT_GBRP
planar GBR 4:4:4 24bpp
Definition: pixfmt.h:165
AV3DReferenceDisplaysInfo::num_ref_displays
uint8_t num_ref_displays
The number of reference displays that are signalled in this struct.
Definition: tdrdi.h:78
NvencDynLoadFunctions::nvenc_funcs
NV_ENCODE_API_FUNCTION_LIST nvenc_funcs
Definition: nvenc.h:140
AV_PICTURE_TYPE_P
@ AV_PICTURE_TYPE_P
Predicted.
Definition: avutil.h:279
mem.h
AVCodecContext::max_b_frames
int max_b_frames
maximum number of B-frames between non-B-frames Note: The output will be delayed by max_b_frames+1 re...
Definition: avcodec.h:777
ff_encode_get_frame
int ff_encode_get_frame(AVCodecContext *avctx, AVFrame *frame)
Called by encoders to get the next frame for encoding.
Definition: encode.c:204
AV3DReferenceDisplay::exponent_ref_viewing_distance
uint8_t exponent_ref_viewing_distance
The exponent part of the reference viewing distance of the n-th reference display.
Definition: tdrdi.h:124
mastering_display_metadata.h
AVFrameSideData
Structure to hold side data for an AVFrame.
Definition: frame.h:289
AVPixFmtDescriptor
Descriptor that unambiguously describes how the bits of a pixel are stored in the up to 4 data planes...
Definition: pixdesc.h:69
P4
#define P4
Definition: filter_template.c:409
av_free
#define av_free(p)
Definition: tableprint_vlc.h:34
AVCodecContext::slices
int slices
Number of slices.
Definition: avcodec.h:1033
to_nv_color_matrix
#define to_nv_color_matrix(n)
Definition: nvenc.c:345
DEFAULT
#define DEFAULT
Definition: avdct.c:30
AVContentLightMetadata::MaxFALL
unsigned MaxFALL
Max average light level per frame (cd/m^2).
Definition: mastering_display_metadata.h:116
AVPacket
This structure stores compressed data.
Definition: packet.h:572
to_nv_color_trc
#define to_nv_color_trc(n)
Definition: nvenc.c:347
AVCodecContext::priv_data
void * priv_data
Definition: avcodec.h:466
NV_ENC_HEVC_PROFILE_REXT
@ NV_ENC_HEVC_PROFILE_REXT
Definition: nvenc.h:184
av_freep
#define av_freep(p)
Definition: tableprint_vlc.h:35
NV_ENC_H264_PROFILE_HIGH_444P
@ NV_ENC_H264_PROFILE_HIGH_444P
Definition: nvenc.h:178
AV_PICTURE_TYPE_BI
@ AV_PICTURE_TYPE_BI
BI type.
Definition: avutil.h:284
nvenc_setup_device
static av_cold int nvenc_setup_device(AVCodecContext *avctx)
Definition: nvenc.c:769
P5
#define P5
Definition: filter_template.c:408
av_frame_side_data_get
static const AVFrameSideData * av_frame_side_data_get(AVFrameSideData *const *sd, const int nb_sd, enum AVFrameSideDataType type)
Wrapper around av_frame_side_data_get_c() to workaround the limitation that for any type T the conver...
Definition: frame.h:1158
AVCodecContext::width
int width
picture width / height.
Definition: avcodec.h:600
imgutils.h
hwcontext.h
AVERROR_BUG
#define AVERROR_BUG
Internal bug, also see AVERROR_BUG2.
Definition: error.h:52
av_log
#define av_log(a,...)
Definition: tableprint_vlc.h:27
av_fifo_freep2
void av_fifo_freep2(AVFifo **f)
Free an AVFifo and reset pointer to NULL.
Definition: fifo.c:286
AVERROR_EXIT
#define AVERROR_EXIT
Immediate exit was requested; the called function should not be restarted.
Definition: error.h:58
AV_PIX_FMT_GBRP10MSB
#define AV_PIX_FMT_GBRP10MSB
Definition: pixfmt.h:568
ff_encode_add_cpb_side_data
AVCPBProperties * ff_encode_add_cpb_side_data(AVCodecContext *avctx)
Add a CPB properties side data to an encoding context.
Definition: encode.c:888
AVStereo3D
Stereo 3D type: this structure describes how two videos are packed within a single video surface,...
Definition: stereo3d.h:203
pkt
static AVPacket * pkt
Definition: demux_decode.c:55
nvenc_setup_codec_config
static av_cold int nvenc_setup_codec_config(AVCodecContext *avctx)
Definition: nvenc.c:1772
width
#define width
Definition: dsp.h:89
FF_QP2LAMBDA
#define FF_QP2LAMBDA
factor to convert from H.263 QP to lambda
Definition: avutil.h:226
NV_ENC_HEVC_PROFILE_MAIN_10
@ NV_ENC_HEVC_PROFILE_MAIN_10
Definition: nvenc.h:183
AV3DReferenceDisplay::left_view_id
uint16_t left_view_id
The ViewId of the left view of a stereo pair corresponding to the n-th reference display.
Definition: tdrdi.h:104
AV_PROFILE_AV1_MAIN
#define AV_PROFILE_AV1_MAIN
Definition: defs.h:169
codec_desc.h
AVCodecContext::sample_aspect_ratio
AVRational sample_aspect_ratio
sample aspect ratio (0 if unknown) That is the width of a pixel divided by the height of the pixel.
Definition: avcodec.h:624
nvenc_setup_hevc_config
static av_cold int nvenc_setup_hevc_config(AVCodecContext *avctx)
Definition: nvenc.c:1462
NVENC_DEPRECATED_PRESET
@ NVENC_DEPRECATED_PRESET
Definition: nvenc.h:198
RC_MODE_DEPRECATED
#define RC_MODE_DEPRECATED
Definition: nvenc.h:42
tdrdi.h
nvenc_send_frame
static int nvenc_send_frame(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:3111
av_get_pix_fmt_name
const char * av_get_pix_fmt_name(enum AVPixelFormat pix_fmt)
Return the short name for a pixel format, NULL in case pix_fmt is unknown.
Definition: pixdesc.c:3376
NV_ENC_H264_PROFILE_MAIN
@ NV_ENC_H264_PROFILE_MAIN
Definition: nvenc.h:170
nvenc_retrieve_frame_data
static int nvenc_retrieve_frame_data(AVCodecContext *avctx, NV_ENC_LOCK_BITSTREAM *lock_params, AVPacket *pkt)
Definition: nvenc.c:2703
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